74AUP1G175GW-Q100H

74AUP1G175-Q100 Low-power D-type flip-flop with reset; positive-edge trigger Rev. 3 — 2 April 2021 Product data sheet 1. General description The 74AUP1G175-Q100 provides a low-power, low-voltage positive-edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output. The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) ESD protection: • MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V • HBM JESD22-A114F Class 3A. Exceeds 5000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial Power-down mode operation 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 3. Ordering information Table 1. Ordering information Type number Package 74AUP1G175GW-Q100 Temperature range Name Description Version -40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 4. Marking Table 2. Marking Type number Marking code [1] 74AUP1G175GW-Q100 aT [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 6 MR 3 1 D FF 1 Q 4 CP 3 CP D 6 MR 001aaa468 Fig. 1. 4 Q 001aaa469 Logic symbol Fig. 2. CP IEC logic symbol C C C Q C C C C C D MR Fig. 3. C C 001aaa466 Logic diagram 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 2 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 6. Pinning information 6.1. Pinning 74AUP1G175 CP 1 6 MR GND 2 5 VCC D 3 4 Q 001aaa467 Fig. 4. Pin configuration SOT363 (SC-88) 6.2. Pin description Table 3. Pin description Symbol Pin Description CP 1 clock input (LOW-to-HIGH, edge-triggered) GND 2 ground (0 V) D 3 data input Q 4 flip-flop output VCC 5 supply voltage MR 6 master reset input (active LOW) 7. Functional description Table 4. Function table H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition; ↑ = LOW-to-HIGH CP transition; X = don’t care. Operating mode Output Input MR CP D Q Reset (clear) L X X L Load ‘1’ H ↑ h H Load ‘0’ H ↑ l L 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 3 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC supply voltage -0.5 +4.6 V IIK input clamping current -50 - VI input voltage IOK output clamping current VO < 0 V -0.5 +4.6 -50 - VO output voltage Active mode and Power-down mode -0.5 +4.6 V IO output current VO = 0 V to VCC - ±20 mA ICC supply current - 50 mA IGND ground current -50 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 250 mW [1] [2] Conditions VI < 0 V [1] Tamb = -40 °C to +125 °C [1] [2] mA V mA The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT886 (XSON6) package: Ptot derates linearly with 3.3 mW/K above 74 °C. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.8 3.6 V VI input voltage 0 3.6 V VO output voltage Active mode 0 VCC V Power-down mode; VCC = 0 V 0 3.6 V -40 +125 °C - 200 ns/V Tamb ambient temperature Δt/ΔV input transition rise and fall rate 74AUP1G175_Q100 Product data sheet VCC = 0.8 V to 3.6 V All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 4 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.70 × VCC - - V VCC = 0.9 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30 × VCC V VCC = 0.9 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.75 × VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.11 - - V IO = -1.9 mA; VCC = 1.65 V 1.32 - - V IO = -2.3 mA; VCC = 2.3 V 2.05 - - V IO = -3.1 mA; VCC = 2.3 V 1.9 - - V IO = -2.7 mA; VCC = 3.0 V 2.72 - - V IO = -4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3 × VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.31 V IO = 1.9 mA; VCC = 1.65 V - - 0.31 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V Tamb = 25 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 0.8 V to 3.6 V VOL LOW-level output voltage VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.2 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.2 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.5 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 40 μA CI input capacitance VCC = 0 V to 3.6 V; VI = GND or VCC - 0.8 - pF CO output capacitance VO = GND; VCC = 0 V - 1.7 - pF 74AUP1G175_Q100 Product data sheet [1] All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 5 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.70 × VCC - - V VCC = 0.9 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30 × VCC V VCC = 0.9 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.7 × VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.03 - - V IO = -1.9 mA; VCC = 1.65 V 1.30 - - V IO = -2.3 mA; VCC = 2.3 V 1.97 - - V IO = -3.1 mA; VCC = 2.3 V 1.85 - - V IO = -2.7 mA; VCC = 3.0 V 2.67 - - V IO = -4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3 × VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.37 V IO = 1.9 mA; VCC = 1.65 V - - 0.35 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V IO = 4.0 mA; VCC = 3.0 V - - 0.45 V Tamb = -40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.6 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.9 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 50 μA 74AUP1G175_Q100 Product data sheet [1] All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 6 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.75 × VCC - - V VCC = 0.9 V to 1.95 V 0.70 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.25 × VCC V VCC = 0.9 V to 1.95 V - - 0.30 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.11 - - V IO = -1.1 mA; VCC = 1.1 V 0.6 × VCC - - V IO = -1.7 mA; VCC = 1.4 V 0.93 - - V IO = -1.9 mA; VCC = 1.65 V 1.17 - - V IO = -2.3 mA; VCC = 2.3 V 1.77 - - V IO = -3.1 mA; VCC = 2.3 V 1.67 - - V IO = -2.7 mA; VCC = 3.0 V 2.40 - - V IO = -4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.11 V IO = 1.1 mA; VCC = 1.1 V - - IO = 1.7 mA; VCC = 1.4 V - - 0.41 V IO = 1.9 mA; VCC = 1.65 V - - 0.39 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V IO = 4.0 mA; VCC = 3.0 V - - 0.50 V Tamb = -40 °C to +125 °C VIH HIGH-level input voltage VIL LOW-level input voltage VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL 0.33 × VCC V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.75 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 1.4 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 75 μA [1] [1] One input at VCC - 0.6 V, other input at VCC or GND. 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 7 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7. Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max - 21.1 - - - - - ns VCC = 1.1 V to 1.3 V 2.4 5.9 11.7 2.2 11.9 2.2 12.0 ns VCC = 1.4 V to 1.6 V 2.0 4.1 6.8 1.8 7.3 1.8 7.6 ns VCC = 1.65 V to 1.95 V 1.6 3.3 5.4 1.3 5.9 1.3 6.2 ns VCC = 2.3 V to 2.7 V 1.3 2.5 3.6 1.1 4.0 1.1 4.2 ns VCC = 3.0 V to 3.6 V 1.2 2.1 2.9 1.0 3.3 1.0 3.5 ns - 17.4 - - - - - ns VCC = 1.1 V to 1.3 V 2.4 5.2 9.7 2.2 10.0 2.2 12.0 ns VCC = 1.4 V to 1.6 V 2.3 3.8 5.2 2.1 6.4 2.1 6.6 ns VCC = 1.65 V to 1.95 V 1.8 3.1 4.9 1.7 5.4 1.7 5.6 ns VCC = 2.3 V to 2.7 V 1.8 2.6 3.6 1.5 4.0 1.5 4.0 ns VCC = 3.0 V to 3.6 V 1.6 2.4 3.1 1.3 3.3 1.3 3.6 ns CL = 5 pF tpd propagation CP to Q; see Fig. 5 delay VCC = 0.8 V MR to Q; see Fig. 6 VCC = 0.8 V fmax maximum frequency 74AUP1G175_Q100 Product data sheet [2] [2] CP; see Fig. 5 VCC = 0.8 V - 50 - - - - - MHz VCC = 1.1 V to 1.3 V - 200 - 170 - 170 - MHz VCC = 1.4 V to 1.6 V - 345 - 310 - 310 - MHz VCC = 1.65 V to 1.95 V - 435 - 400 - 400 - MHz VCC = 2.3 V to 2.7 V - 550 - 490 - 490 - MHz VCC = 3.0 V to 3.6 V - 615 - 550 - 550 - MHz All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 8 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max - 24.7 - - - - - ns VCC = 1.1 V to 1.3 V 2.6 6.8 13.3 2.4 13.6 2.4 13.6 ns VCC = 1.4 V to 1.6 V 2.3 4.8 7.9 2.0 8.4 2.0 8.7 ns VCC = 1.65 V to 1.95 V 2.1 3.9 6.1 1.8 6.6 1.8 6.9 ns VCC = 2.3 V to 2.7 V 1.7 3.0 4.3 1.5 4.7 1.5 5.0 ns VCC = 3.0 V to 3.6 V 1.6 2.7 3.6 1.3 4.0 1.3 4.2 ns - 21.0 - - - - - ns VCC = 1.1 V to 1.3 V 2.6 6.2 11.5 2.6 11.7 2.6 13.6 ns VCC = 1.4 V to 1.6 V 2.5 4.4 6.1 2.4 7.6 2.4 7.8 ns VCC = 1.65 V to 1.95 V 2.5 3.7 5.7 2.2 6.3 2.2 6.3 ns VCC = 2.3 V to 2.7 V 2.1 3.2 4.3 1.9 4.7 1.9 4.9 ns VCC = 3.0 V to 3.6 V 2.0 3.0 3.9 1.8 4.1 1.8 4.3 ns CL = 10 pF tpd propagation CP to Q; see Fig. 5 delay VCC = 0.8 V MR to Q; see Fig. 6 VCC = 0.8 V fmax maximum frequency 74AUP1G175_Q100 Product data sheet [2] [2] CP; see Fig. 5 VCC = 0.8 V - 50 - - - - - MHz VCC = 1.1 V to 1.3 V - 190 - 150 - 150 - MHz VCC = 1.4 V to 1.6 V - 320 - 280 - 280 - MHz VCC = 1.65 V to 1.95 V - 420 - 310 - 310 - MHz VCC = 2.3 V to 2.7 V - 485 - 370 - 370 - MHz VCC = 3.0 V to 3.6 V - 550 - 410 - 410 - MHz All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 9 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max - 28.1 - - - - - ns VCC = 1.1 V to 1.3 V 3.0 7.6 14.8 2.8 15.2 2.8 15.4 ns VCC = 1.4 V to 1.6 V 2.7 5.3 8.7 2.3 9.4 2.3 9.9 ns VCC = 1.65 V to 1.95 V 2.3 4.4 6.8 2.1 7.4 2.1 7.9 ns VCC = 2.3 V to 2.7 V 2.1 3.5 5.0 1.9 5.3 1.9 5.6 ns VCC = 3.0 V to 3.6 V 2.0 3.1 4.3 1.7 4.7 1.7 4.9 ns - 24.6 - - - - - ns VCC = 1.1 V to 1.3 V 3.2 7.0 13.2 2.9 13.5 2.9 15.2 ns VCC = 1.4 V to 1.6 V 3.1 5.0 6.8 2.6 8.6 2.6 9.1 ns VCC = 1.65 V to 1.95 V 2.5 4.3 6.5 2.5 7.2 2.5 7.4 ns VCC = 2.3 V to 2.7 V 2.6 3.7 5.0 2.2 5.4 2.2 5.5 ns VCC = 3.0 V to 3.6 V 2.4 3.5 4.4 2.1 4.8 2.1 5.0 ns CL = 15 pF tpd propagation CP to Q; see Fig. 5 delay VCC = 0.8 V MR to Q; see Fig. 6 VCC = 0.8 V fmax maximum frequency 74AUP1G175_Q100 Product data sheet [2] [2] CP; see Fig. 5 VCC = 0.8 V - 50 - - - - - MHz VCC = 1.1 V to 1.3 V - 180 - 120 - 120 - MHz VCC = 1.4 V to 1.6 V - 300 - 190 - 190 - MHz VCC = 1.65 V to 1.95 V - 405 - 240 - 240 - MHz VCC = 2.3 V to 2.7 V - 420 - 300 - 300 - MHz VCC = 3.0 V to 3.6 V - 480 - 320 - 320 - MHz All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 10 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max - 38.4 - - - - - ns VCC = 1.1 V to 1.3 V 3.6 9.8 19.5 3.4 20.6 3.4 21.0 ns VCC = 1.4 V to 1.6 V 3.3 6.9 11.2 3.2 12.4 3.2 13.0 ns VCC = 1.65 V to 1.95 V 3.1 5.7 8.8 2.9 9.6 2.9 10.2 ns VCC = 2.3 V to 2.7 V 3.0 4.6 6.4 2.6 6.9 2.6 7.3 ns VCC = 3.0 V to 3.6 V 2.8 4.2 5.7 2.5 6.5 2.5 6.9 ns - 35.1 - - - - - ns VCC = 1.1 V to 1.3 V 3.9 9.3 18.0 3.7 18.6 3.7 19.8 ns VCC = 1.4 V to 1.6 V 3.9 6.6 8.9 3.6 11.6 3.6 12.2 ns VCC = 1.65 V to 1.95 V 3.6 5.6 8.6 3.4 9.6 3.4 9.7 ns VCC = 2.3 V to 2.7 V 3.5 4.8 6.4 2.9 7.2 2.9 7.2 ns VCC = 3.0 V to 3.6 V 3.3 4.6 5.7 3.1 6.4 3.1 6.9 ns CL = 30 pF tpd propagation CP to Q; see Fig. 5 delay VCC = 0.8 V MR to Q; see Fig. 6 VCC = 0.8 V fmax maximum frequency [2] [2] CP; see Fig. 5 VCC = 0.8 V - 35 - - - - - MHz VCC = 1.1 V to 1.3 V - 130 - 70 - 70 - MHz VCC = 1.4 V to 1.6 V - 200 - 120 - 120 - MHz VCC = 1.65 V to 1.95 V - 240 - 150 - 150 - MHz VCC = 2.3 V to 2.7 V - 275 - 190 - 190 - MHz VCC = 3.0 V to 3.6 V - 300 - 200 - 200 - MHz VCC = 0.8 V - 5.25 - - - - - ns VCC = 1.1 V to 1.3 V - 1.6 - 1.5 - 1.5 - ns VCC = 1.4 V to 1.6 V - 1.0 - 0.9 - 0.9 - ns VCC = 1.65 V to 1.95 V - 0.75 - 0.7 - 0.7 - ns VCC = 2.3 V to 2.7 V - 0.6 - 0.4 - 0.4 - ns VCC = 3.0 V to 3.6 V - 0.55 - 0.4 - 0.4 - ns VCC = 0.8 V - 9.0 - - - - - ns VCC = 1.1 V to 1.3 V - 3.0 - 4.9 - 4.9 - ns VCC = 1.4 V to 1.6 V - 1.75 - 2.5 - 2.5 - ns VCC = 1.65 V to 1.95 V - 1.35 - 1.8 - 1.8 - ns VCC = 2.3 V to 2.7 V - 0.9 - 1.1 - 1.1 - ns VCC = 3.0 V to 3.6 V - 0.8 - 0.8 - 0.8 - ns CL = 5 pF, 10 pF, 15 pF and 30 pF tW pulse width CP; HIGH or LOW; see Fig. 5 MR; LOW; see Fig. 6 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 11 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions 25 °C Min trec recovery time tsu(H) tsu(L) th CPD [1] [2] [3] set-up time HIGH set-up time LOW hold time -40 °C to +85 °C -40 °C to +125 °C Unit Typ[1] Max Min Max Min Max MR; see Fig. 6 VCC = 0.8 V - - - - - - - ns VCC = 1.1 V to 1.3 V - -1.1 - -1.2 - -1.2 - ns VCC = 1.4 V to 1.6 V - -2.0 - -0.8 - -0.8 - ns VCC = 1.65 V to 1.95 V - -0.5 - -0.7 - -0.7 - ns VCC = 2.3 V to 2.7 V - -0.9 - -0.4 - -0.4 - ns VCC = 3.0 V to 3.6 V - -1.0 - -0.2 - -0.2 - ns VCC = 0.8 V - - - - - - - ns VCC = 1.1 V to 1.3 V - 0.5 - 1.2 - 1.2 - ns VCC = 1.4 V to 1.6 V - 0.4 - 0.8 - 0.8 - ns VCC = 1.65 V to 1.95 V - 0.3 - 0.6 - 0.6 - ns VCC = 2.3 V to 2.7 V - 0.3 - 0.5 - 0.5 - ns VCC = 3.0 V to 3.6 V - 0.2 - 0.5 - 0.5 - ns VCC = 0.8 V - - - - - - - ns VCC = 1.1 V to 1.3 V - 0.8 - 1.7 - 1.7 - ns VCC = 1.4 V to 1.6 V - 0.6 - 1.1 - 1.1 - ns VCC = 1.65 V to 1.95 V - 0.4 - 0.9 - 0.9 - ns VCC = 2.3 V to 2.7 V - 0.4 - 0.9 - 0.9 - ns VCC = 3.0 V to 3.6 V - 0.5 - 0.9 - 0.9 - ns VCC = 0.8 V - - - - - - - ns VCC = 1.1 V to 1.3 V - -0.7 - 0.2 - 0.2 - ns VCC = 1.4 V to 1.6 V - -0.5 - 0 - 0 - ns VCC = 1.65 V to 1.95 V - -0.5 - 0 - 0 - ns VCC = 2.3 V to 2.7 V - -0.3 - 0 - 0 - ns VCC = 3.0 V to 3.6 V - -0.4 - 0 - 0 - ns - 1.6 - - - - - pF VCC = 1.1 V to 1.3 V - 1.7 - - - - - pF VCC = 1.4 V to 1.6 V - 1.8 - - - - - pF VCC = 1.65 V to 1.95 V - 1.9 - - - - - pF VCC = 2.3 V to 2.7 V - 2.2 - - - - - pF VCC = 3.0 V to 3.6 V - 2.7 - - - - - pF D to CP; see Fig. 5 D to CP; see Fig. 5 D to CP; see Fig. 5 fi = 1 MHz; power dissipation VI = GND to VCC capacitance VCC = 0.8 V [3] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; 2 VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC × fo) = sum of the outputs. 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 12 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 11.1. Waveforms and test circuit VI VM D input GND th th tsu 1/fmax tsu VI CP input VM GND tW tPHL tPLH VOH VM Q output VOL 001aaa465 Measurement points are given in Table 9. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The clock input (CP) to output (Q) propagation delays, the clock pulse width, the D to CP set-up, the CP to D hold times and the maximum input clock frequency VI VM MR input GND tW t rec VI CP input VM GND t PHL VOH VM Q output VOL 001aaa464 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. The master reset (MR) input to output (Q) propagation delays, the master reset pulse width and the MR to CP recovery time Table 9. Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 0.8 V to 3.6 V 0.5 x VCC 0.5 x VCC VCC ≤ 3.0 ns 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 13 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger VCC G VI DUT VEXT 5 kΩ VO RT CL RL 001aac521 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 10. Test data Supply voltage Load VEXT VCC CL 0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ [1] RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ open GND 2 x VCC For measuring enable and disable times RL = 5 kΩ. For measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 14 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 12. Package outline Plastic surface-mounted package; 6 leads SOT363 D B E y A X HE 6 5 v M A 4 Q pin 1 index A 1 2 e1 A1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT363 Fig. 8. JEITA EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 SC-88 Package outline SOT363 (SC-88) 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 15 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger 13. Abbreviations Table 11. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AUP1G175_Q100 v.3 20210402 Product data sheet - 74AUP1G175_Q100 v.2 Modifications: • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. (Remark: Legal page was accidentally removed in previous version) Section 8: Derating values for Ptot total power dissipation updated. 74AUP1G175_Q100 v.2 20170310 Modifications: • 74AUP1G175_Q100 v.1 20130131 74AUP1G175_Q100 Product data sheet Product data sheet - 74AUP1G175_Q100 v.1 Section 8: Derating values for Ptot total power dissipation updated. Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 - © Nexperia B.V. 2021. All rights reserved 16 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. 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In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 17 / 18 74AUP1G175-Q100 Nexperia Low-power D-type flip-flop with reset; positive-edge trigger Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................8 11.1. Waveforms and test circuit.......................................13 12. Package outline........................................................ 15 13. Abbreviations............................................................ 16 14. Revision history........................................................16 15. Legal information......................................................17 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 2 April 2021 74AUP1G175_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 2 April 2021 © Nexperia B.V. 2021. All rights reserved 18 / 18