74AUP1G74-Q100
Low-power D-type flip-flop with set and reset; positive-edge
trigger
Rev. 2 — 10 April 2017
1
Product data sheet
General description
The 74AUP1G74-Q100 provides a low-power, low-voltage single positive-edge triggered
D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs and
complementary Q and Q outputs. The SD and RD are asynchronous active LOW inputs
and operate independently of the clock input. Information on the data input is transferred
to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must
be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable
operation.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the
device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2
Features and benefits
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
– Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 0.8 V to 3.6 V
• High noise immunity
• Complies with JEDEC standards:
– JESD8-12 (0.8 V to 1.3 V)
– JESD8-11 (0.9 V to 1.65 V)
– JESD8-7 (1.2 V to 1.95 V)
– JESD8-5 (1.8 V to 2.7 V)
– JESD8-B (2.7 V to 3.6 V)
• ESD protection:
– MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V
– HBM JESD22-A114F Class 3A. Exceeds 5 000 V
– MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
• Low static power consumption; ICC = 0.9 μA (maximum)
• Latch-up performance exceeds 100 mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• Low noise overshoot and undershoot < 10 % of VCC
• IOFF circuitry provides partial power-down mode operation
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
3
Ordering information
Table 1. Ordering information
Type number
Package
Temperature
range
Name
Description
Version
74AUP1G74DC-Q100 -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
4
Marking
Table 2. Marking codes
Type number
Marking code
74AUP1G74DC-Q100
p74
[1]
5
SOT765-1
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Functional diagram
SD
D
CP
SD
Q
D
CP
Q
S
FF
Q
C1
Q
1D
RD
RD
R
001aah725
001aah726
Figure 1. Logic symbol
Figure 2. IEC logic symbol
Q
C
C
C
C
D
RD
Q
C
C
SD
CP
001aae087
C
C
Figure 3. Logic diagram
74AUP1G74_Q100
Product data sheet
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2 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
6
Pinning information
6.1 Pinning
74AUP1G74-Q100
CP
1
8
VCC
D
2
7
SD
Q
3
6
RD
GND
4
5
Q
aaa-018153
Figure 4. Pin configuration SOT765-1
6.2 Pin description
Table 3. Pin description
Symbol
Pin
Description
CP
1
clock input
D
2
data input
Q
3
complement output
GND
4
ground (0 V)
Q
5
true output
RD
6
asynchronous reset input (active LOW)
SD
7
asynchronous set input (active LOW)
VCC
8
supply voltage
7
Functional description
Table 4. Function table for asynchronous operation
[1]
Input
Output
SD
RD
CP
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
74AUP1G74_Q100
Product data sheet
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74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 5. Function table for synchronous operation
[1]
Input
Output
SD
RD
CP
D
Qn+1
Qn+1
H
H
↑
L
L
H
H
H
↑
H
H
L
[1]
H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH CP transition;
Qn+1 = state after the next LOW-to-HIGH CP transition.
8
Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
-0.5
+4.6
V
input voltage
[1]
-0.5
+4.6
V
VO
output voltage
Active mode and Power-down mode
[1]
-0.5
+4.6
V
IIK
input clamping current
VI < 0 V
-50
-
mA
IOK
output clamping current
VO < 0 V
-50
-
mA
IO
output current
VO = 0 V to VCC
-
±20
mA
ICC
supply current
-
+50
mA
IGND
ground current
-50
-
mA
Tstg
storage temperature
-65
+150
°C
-
250
mW
VI
Ptot
[1]
[2]
total power dissipation
Tamb = -40 °C to +125 °C
[2]
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K.
9
Recommended operating conditions
Table 7. Operating conditions
Symbol Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Conditions
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
74AUP1G74_Q100
Product data sheet
Min
Max
0.8
3.6
V
0
3.6
V
Active mode
0
VCC
V
Power-down mode; VCC = 0 V
0
3.6
V
-40
+125
°C
-
200
ns/V
VCC = 0.8 V to 3.6 V
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 April 2017
Unit
© Nexperia B.V. 2017. All rights reserved.
4 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
10 Static characteristics
Table 8. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VCC = 0.8 V
0.70 × VCC
-
-
V
VCC = 0.9 V to 1.95 V
0.65 × VCC
-
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
VCC = 0.8 V
-
-
0.30 × VCC
V
VCC = 0.9 V to 1.95 V
-
-
0.35 × VCC
V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
VCC - 0.1
-
-
V
IO = -1.1 mA; VCC = 1.1 V
0.75 × VCC
-
-
V
IO = -1.7 mA; VCC = 1.4 V
1.11
-
-
V
IO = -1.9 mA; VCC = 1.65 V
1.32
-
-
V
IO = -2.3 mA; VCC = 2.3 V
2.05
-
-
V
IO = -3.1 mA; VCC = 2.3 V
1.9
-
-
V
IO = -2.7 mA; VCC = 3.0 V
2.72
-
-
V
IO = -4.0 mA; VCC = 3.0 V
2.6
-
-
V
IO = 20 μA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.31
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.31
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.31
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.44
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.31
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.44
V
Tamb = 25 °C
VIH
VIL
VOH
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
VI = VIH or VIL
IO = -20 μA; VCC = 0.8 V to 3.6 V
VOL
LOW-level output voltage
VI = VIH or VIL
II
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
±0.1
μA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
±0.2
μA
ΔIOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
-
-
±0.2
μA
ICC
supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
-
-
0.5
μA
74AUP1G74_Q100
Product data sheet
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74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter
Conditions
Min
Typ
Max
ΔICC
additional supply current
VI = VCC - 0.6 V; IO = 0 A;
VCC = 3.3 V; per pin
-
-
40
μA
CI
input capacitance
VCC = 0 V to 3.6 V; VI = GND or VCC
-
0.6
-
pF
CO
output capacitance
VO = GND; VCC = 0 V
-
1.3
-
pF
VCC = 0.8 V
0.70 × VCC
-
-
V
VCC = 0.9 V to 1.95 V
0.65 × VCC
-
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
VCC = 0.8 V
-
-
0.30 × VCC
V
VCC = 0.9 V to 1.95 V
-
-
0.35 × VCC
V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
IO = -20 μA; VCC = 0.8 V to 3.6 V
VCC - 0.1
-
-
V
IO = -1.1 mA; VCC = 1.1 V
0.7 × VCC
-
-
V
IO = -1.7 mA; VCC = 1.4 V
1.03
-
-
V
IO = -1.9 mA; VCC = 1.65 V
1.30
-
-
V
IO = -2.3 mA; VCC = 2.3 V
1.97
-
-
V
IO = -3.1 mA; VCC = 2.3 V
1.85
-
-
V
IO = -2.7 mA; VCC = 3.0 V
2.67
-
-
V
IO = -4.0 mA; VCC = 3.0 V
2.55
-
-
V
IO = 20 μA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.37
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.35
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.33
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.45
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.33
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.45
V
[1]
Unit
Tamb = -40 °C to +85 °C
VIH
VIL
VOH
VOL
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
VI = VIH or VIL
VI = VIH or VIL
II
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
±0.5
μA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
±0.5
μA
ΔIOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
-
-
±0.6
μA
ICC
supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
-
-
0.9
μA
74AUP1G74_Q100
Product data sheet
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74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter
Conditions
ΔICC
VI = VCC - 0.6 V; IO = 0 A;
VCC = 3.3 V; per pin
additional supply current
Min
Typ
Max
-
-
50
μA
VCC = 0.8 V
0.75 × VCC
-
-
V
VCC = 0.9 V to 1.95 V
0.70 × VCC
-
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
VCC = 0.8 V
-
-
0.25 × VCC
V
VCC = 0.9 V to 1.95 V
-
-
0.30 × VCC
V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
IO = -20 μA; VCC = 0.8 V to 3.6 V
VCC - 0.11
-
-
V
IO = -1.1 mA; VCC = 1.1 V
0.6 × VCC
-
-
V
IO = -1.7 mA; VCC = 1.4 V
0.93
-
-
V
IO = -1.9 mA; VCC = 1.65 V
1.17
-
-
V
IO = -2.3 mA; VCC = 2.3 V
1.77
-
-
V
IO = -3.1 mA; VCC = 2.3 V
1.67
-
-
V
IO = -2.7 mA; VCC = 3.0 V
2.40
-
-
V
IO = -4.0 mA; VCC = 3.0 V
2.30
-
-
V
IO = 20 μA; VCC = 0.8 V to 3.6 V
-
-
0.11
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.33 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.41
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.39
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.36
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.50
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.36
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.50
V
[1]
Unit
Tamb = -40 °C to +125 °C
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
VOH
VOL
HIGH-level output voltage
LOW-level output voltage
VI = VIH or VIL
VI = VIH or VIL
II
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
±0.75
μA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
±0.75
μA
ΔIOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
-
-
±0.75
μA
ICC
supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
-
-
1.4
μA
ΔICC
additional supply current
VI = VCC - 0.6 V; IO = 0 A;
VCC = 3.3 V; per pin
-
-
75
μA
[1]
[1]
One input at VCC - 0.6 V, other input at VCC or GND.
74AUP1G74_Q100
Product data sheet
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74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
11 Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.
Symbol Parameter Conditions
Tamb = 25 °C
Min
Typ
[1]
Tamb = -40 °C Tamb = -40 °C Unit
to +85 °C
to +125 °C
Max
Min
Max
Min
Max
CL = 5 pF
tpd
propagation CP to Q, Q; see Figure 5.
delay
VCC = 0.8 V
[2]
-
25.4
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.9
6.7
14.0
2.6
14.2
2.6
14.2
ns
VCC = 1.4 V to 1.6 V
2.4
4.5
7.6
2.3
8.3
2.3
8.6
ns
VCC = 1.65 V to 1.95 V
1.9
3.5
5.7
1.7
6.5
1.7
6.8
ns
VCC = 2.3 V to 2.7 V
1.7
2.6
3.8
1.4
4.4
1.4
4.7
ns
1.5
2.2
3.1
1.2
3.4
1.2
3.7
ns
-
19.6
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.7
5.6
11.0
2.5
11.4
2.5
11.5
ns
VCC = 1.4 V to 1.6 V
2.4
4.0
6.3
2.2
6.9
2.2
7.3
ns
VCC = 1.65 V to 1.95 V
2.0
3.3
4.9
1.7
5.6
1.7
5.9
ns
VCC = 2.3 V to 2.7 V
1.9
2.7
3.7
1.7
4.0
1.7
4.2
ns
1.8
2.5
3.2
1.5
3.6
1.5
3.8
ns
-
19.2
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.6
5.5
11.0
2.5
11.3
2.5
11.5
ns
VCC = 1.4 V to 1.6 V
2.3
3.9
6.3
2.2
6.8
2.2
7.3
ns
VCC = 1.65 V to 1.95 V
1.9
3.2
5.0
1.8
5.6
1.8
5.9
ns
VCC = 2.3 V to 2.7 V
1.9
2.6
3.6
1.7
4.1
1.7
4.3
ns
VCC = 3.0 V to 3.6 V
1.8
2.4
3.3
1.5
3.6
1.5
3.8
ns
VCC = 0.8 V
-
53
-
-
-
-
-
MHz
VCC = 1.1 V to 1.3 V
-
203
-
170
-
170
-
MHz
VCC = 1.4 V to 1.6 V
-
347
-
310
-
300
-
MHz
VCC = 1.65 V to 1.95 V
-
435
-
400
-
390
-
MHz
VCC = 2.3 V to 2.7 V
-
550
-
490
-
480
-
MHz
VCC = 3.0 V to 3.6 V
-
619
-
550
-
510
-
MHz
-
28.9
-
-
-
-
-
ns
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 6.
[2]
VCC = 0.8 V
VCC = 3.0 V to 3.6 V
RD to Q, Q; see Figure 6.
[2]
VCC = 0.8 V
fmax
maximum
frequency
CP; see Figure 5.
CL = 10 pF
tpd
propagation CP to Q, Q; see Figure 5.
delay
VCC = 0.8 V
74AUP1G74_Q100
Product data sheet
[2]
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Rev. 2 — 10 April 2017
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8 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter Conditions
Tamb = 25 °C
Min
Typ
VCC = 1.1 V to 1.3 V
3.1
VCC = 1.4 V to 1.6 V
Max
Min
Max
Min
Max
7.5
15.8
2.9
16.1
2.9
16.1
ns
2.7
5.1
8.7
2.4
9.4
2.4
9.8
ns
VCC = 1.65 V to 1.95 V
2.5
4.1
6.5
2.2
7.2
2.2
7.6
ns
VCC = 2.3 V to 2.7 V
2.0
3.2
4.6
1.8
5.3
1.8
5.6
ns
1.8
2.8
3.8
1.6
4.1
1.6
4.4
ns
-
23.2
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.9
6.5
12.9
2.8
13.3
2.8
13.5
ns
VCC = 1.4 V to 1.6 V
2.7
4.6
7.5
2.3
7.9
2.3
8.3
ns
VCC = 1.65 V to 1.95 V
2.6
3.9
5.6
2.3
6.3
2.3
6.6
ns
VCC = 2.3 V to 2.7 V
2.3
3.2
4.4
2.0
4.8
2.0
5.2
ns
2.2
3.0
3.9
1.9
4.2
1.9
4.4
ns
-
22.7
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.8
6.4
12.8
2.7
13.2
2.7
13.4
ns
VCC = 1.4 V to 1.6 V
2.6
4.5
7.5
2.3
8.1
2.3
8.4
ns
VCC = 1.65 V to 1.95 V
2.5
3.3
5.8
2.3
6.3
2.3
6.7
ns
VCC = 2.3 V to 2.7 V
2.2
3.2
4.4
2.0
4.9
2.0
5.2
ns
VCC = 3.0 V to 3.6 V
2.0
2.9
4.0
1.9
4.3
1.9
4.5
ns
VCC = 0.8 V
-
52
-
-
-
-
-
MHz
VCC = 1.1 V to 1.3 V
-
192
-
150
-
150
-
MHz
VCC = 1.4 V to 1.6 V
-
324
-
280
-
230
-
MHz
VCC = 1.65 V to 1.95 V
-
421
-
310
-
250
-
MHz
VCC = 2.3 V to 2.7 V
-
486
-
370
-
360
-
MHz
VCC = 3.0 V to 3.6 V
-
550
-
410
-
360
-
MHz
-
32.4
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
3.5
8.3
17.6
3.3
17.8
3.3
18.0
ns
VCC = 1.4 V to 1.6 V
3.2
5.6
9.5
2.8
10.5
2.8
11.1
ns
VCC = 1.65 V to 1.95 V
2.7
4.6
7.2
2.5
8.1
2.5
8.6
ns
VCC = 2.3 V to 2.7 V
2.4
3.6
5.2
2.2
5.8
2.2
6.2
ns
2.2
3.2
4.4
2.0
4.9
2.0
5.2
ns
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 6.
[2]
VCC = 0.8 V
VCC = 3.0 V to 3.6 V
RD to Q, Q; see Figure 6.
[2]
VCC = 0.8 V
fmax
maximum
frequency
[1]
Tamb = -40 °C Tamb = -40 °C Unit
to +85 °C
to +125 °C
CP; see Figure 5.
CL = 15 pF
tpd
propagation CP to Q, Q; see Figure 5.
delay
VCC = 0.8 V
[2]
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 6.
74AUP1G74_Q100
Product data sheet
[2]
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9 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter Conditions
Tamb = 25 °C
Min
VCC = 0.8 V
Max
Min
Max
Min
Max
26.7
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
3.3
7.3
14.7
3.1
15.2
3.1
15.4
ns
VCC = 1.4 V to 1.6 V
3.2
5.2
8.3
2.9
9.0
2.9
9.5
ns
VCC = 1.65 V to 1.95 V
2.8
4.3
6.4
2.5
7.1
2.5
7.5
ns
VCC = 2.3 V to 2.7 V
2.8
3.7
5.1
2.2
5.5
2.2
5.8
ns
2.5
3.5
4.6
2.4
5.0
2.4
5.2
ns
-
26.1
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
3.2
7.2
14.5
3.1
15.0
3.1
15.2
ns
VCC = 1.4 V to 1.6 V
3.1
5.1
8.4
2.7
9.2
2.7
9.7
ns
VCC = 1.65 V to 1.95 V
2.7
4.3
6.5
2.6
7.3
2.6
7.7
ns
VCC = 2.3 V to 2.7 V
2.6
3.6
5.0
2.4
5.5
2.4
5.8
ns
VCC = 3.0 V to 3.6 V
2.4
3.4
4.6
2.3
5.0
2.3
5.2
ns
VCC = 0.8 V
-
50
-
-
-
-
-
MHz
VCC = 1.1 V to 1.3 V
-
181
-
120
-
120
-
MHz
VCC = 1.4 V to 1.6 V
-
301
-
190
-
160
-
MHz
VCC = 1.65 V to 1.95 V
-
407
-
240
-
190
-
MHz
VCC = 2.3 V to 2.7 V
-
422
-
300
-
270
-
MHz
VCC = 3.0 V to 3.6 V
-
481
-
320
-
300
-
MHz
-
42.7
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
4.2
10.6
22.5
4.0
23.0
4.0
23.3
ns
VCC = 1.4 V to 1.6 V
3.7
7.2
12.0
3.7
13.3
3.7
14.0
ns
VCC = 1.65 V to 1.95 V
3.5
5.8
9.2
3.4
10.4
3.4
11.0
ns
VCC = 2.3 V to 2.7 V
3.3
4.7
6.6
3.0
7.3
3.0
7.8
ns
3.0
4.3
5.8
2.8
6.8
2.8
7.3
ns
-
37.0
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
4.0
9.5
19.8
3.8
20.8
3.8
21.1
ns
VCC = 1.4 V to 1.6 V
3.8
6.7
10.9
3.7
12.0
3.7
12.7
ns
VCC = 1.65 V to 1.95 V
3.7
5.6
8.4
3.5
9.3
3.5
9.9
ns
VCC = 2.3 V to 2.7 V
3.7
4.8
6.6
3.2
7.2
3.2
7.6
ns
VCC = 3.0 V to 3.6 V
3.4
4.6
6.0
3.1
6.8
3.1
7.1
ns
RD to Q, Q; see Figure 6.
[2]
VCC = 0.8 V
maximum
frequency
[1]
-
VCC = 3.0 V to 3.6 V
fmax
Typ
Tamb = -40 °C Tamb = -40 °C Unit
to +85 °C
to +125 °C
CP; see Figure 5.
CL = 30 pF
tpd
propagation CP to Q, Q; see Figure 5.
delay
VCC = 0.8 V
[2]
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 6.
VCC = 0.8 V
74AUP1G74_Q100
Product data sheet
[2]
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10 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter Conditions
Tamb = 25 °C
Min
RD to Q, Q; see Figure 6.
VCC = 0.8 V
fmax
maximum
frequency
Typ
[1]
Tamb = -40 °C Tamb = -40 °C Unit
to +85 °C
to +125 °C
Max
Min
Max
Min
Max
[2]
-
36.4
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
3.9
9.4
19.5
3.8
20.2
3.8
20.5
ns
VCC = 1.4 V to 1.6 V
3.6
6.6
10.9
3.7
12.0
3.7
12.6
ns
VCC = 1.65 V to 1.95 V
3.5
5.5
8.5
3.5
9.5
3.5
10.1
ns
VCC = 2.3 V to 2.7 V
3.5
4.7
6.5
3.2
7.1
3.2
7.6
ns
VCC = 3.0 V to 3.6 V
3.3
4.4
6.1
3.1
7.1
3.1
7.5
ns
VCC = 0.8 V
-
28
-
-
-
-
-
MHz
VCC = 1.1 V to 1.3 V
-
145
-
70
-
70
-
MHz
VCC = 1.4 V to 1.6 V
-
185
-
120
-
110
-
MHz
VCC = 1.65 V to 1.95 V
-
270
-
150
-
120
-
MHz
VCC = 2.3 V to 2.7 V
-
290
-
190
-
170
-
MHz
VCC = 3.0 V to 3.6 V
-
315
-
200
-
190
-
MHz
VCC = 0.8 V
-
3.4
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
-
0.6
-
1.2
-
1.2
-
ns
VCC = 1.4 V to 1.6 V
-
0.3
-
0.6
-
0.6
-
ns
VCC = 1.65 V to 1.95 V
-
0.4
-
0.5
-
0.5
-
ns
VCC = 2.3 V to 2.7 V
-
0.2
-
0.4
-
0.4
-
ns
VCC = 3.0 V to 3.6 V
-
0.3
-
0.4
-
0.4
-
ns
VCC = 0.8 V
-
3.0
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
-
0.5
-
1.2
-
1.2
-
ns
VCC = 1.4 V to 1.6 V
-
0.3
-
0.7
-
0.7
-
ns
VCC = 1.65 V to 1.95 V
-
0.4
-
0.7
-
0.7
-
ns
VCC = 2.3 V to 2.7 V
-
0.5
-
0.7
-
0.7
-
ns
VCC = 3.0 V to 3.6 V
-
0.6
-
0.8
-
0.8
-
ns
VCC = 0.8 V
-
-1.9
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
-
-0.3
-
0.5
-
0.5
-
ns
VCC = 1.4 V to 1.6 V
-
-0.2
-
0.2
-
0.2
-
ns
CP; see Figure 5.
CL = 5 pF, 10 pF, 15 pF and 30 pF
tsu
set-up time
D to CP HIGH;
see Figure 5.
D to CP LOW;
see Figure 5.
th
hold time
74AUP1G74_Q100
Product data sheet
D to CP; see Figure 5.
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11 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter Conditions
Tamb = 25 °C
Min
trec
recovery
time
Typ
[1]
Tamb = -40 °C Tamb = -40 °C Unit
to +85 °C
to +125 °C
Max
Min
Max
Min
Max
VCC = 1.65 V to 1.95 V
-
-0.2
-
0.1
-
0.1
-
ns
VCC = 2.3 V to 2.7 V
-
-0.2
-
0.1
-
0.1
-
ns
VCC = 3.0 V to 3.6 V
-
-0.2
-
0.1
-
0.1
-
ns
VCC = 1.1 V to 1.3 V
-
-0.5
-
-0.9
-
-0.9
-
ns
VCC = 1.4 V to 1.6 V
-
-0.2
-
-0.6
-
-0.6
-
ns
VCC = 1.65 V to 1.95 V
-
-0.2
-
-0.4
-
-0.4
-
ns
VCC = 2.3 V to 2.7 V
-
-0.1
-
-0.1
-
-0.1
-
ns
VCC = 3.0 V to 3.6 V
-
-0.1
-
-0.1
-
-0.1
-
ns
VCC = 1.1 V to 1.3 V
-
-0.5
-
-0.3
-
-0.3
-
ns
VCC = 1.4 V to 1.6 V
-
-0.4
-
-0.1
-
-0.1
-
ns
VCC = 1.65 V to 1.95 V
-
-0.3
-
0
-
0
-
ns
VCC = 2.3 V to 2.7 V
-
-0.2
-
0.1
-
0.1
-
ns
VCC = 3.0 V to 3.6 V
-
-0.1
-
0.1
-
0.1
-
ns
VCC = 1.1 V to 1.3 V
-
2.1
-
2.7
-
2.7
-
ns
VCC = 1.4 V to 1.6 V
-
1.1
-
1.5
-
1.5
-
ns
VCC = 1.65 V to 1.95 V
-
0.9
-
1.6
-
1.6
-
ns
VCC = 2.3 V to 2.7 V
-
0.6
-
1.7
-
1.7
-
ns
VCC = 3.0 V to 3.6 V
-
0.6
-
1.9
-
1.9
-
ns
VCC = 1.1 V to 1.3 V
-
4.2
-
11.3
-
11.5
-
ns
VCC = 1.4 V to 1.6 V
-
2.3
-
6.2
-
6.4
-
ns
VCC = 1.65 V to 1.95 V
-
1.8
-
4.8
-
5.0
-
ns
VCC = 2.3 V to 2.7 V
-
1.2
-
3.3
-
3.5
-
ns
-
1.1
-
2.6
-
2.8
-
ns
-
2.8
-
-
-
-
-
pF
VCC = 1.1 V to 1.3 V
-
2.9
-
-
-
-
-
pF
VCC = 1.4 V to 1.6 V
-
3.0
-
-
-
-
-
pF
VCC = 1.65 V to 1.95 V
-
3.0
-
-
-
-
-
pF
VCC = 2.3 V to 2.7 V
-
3.5
-
-
-
-
-
pF
RD; see Figure 6
SD; see Figure 6.
tW
pulse width
CP HIGH or LOW;
see Figure 5.
SD or RD LOW;
see Figure 6.
VCC = 3.0 V to 3.6 V
CPD
[3]
fi = 1 MHz;
power
dissipation VI = GND to VCC
capacitance
VCC = 0.8 V
74AUP1G74_Q100
Product data sheet
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12 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter Conditions
Tamb = 25 °C
Min
VCC = 3.0 V to 3.6 V
[1]
[2]
[3]
-
Typ
[1]
Tamb = -40 °C Tamb = -40 °C Unit
to +85 °C
to +125 °C
Max
Min
Max
Min
Max
-
-
-
-
-
3.9
pF
All typical values are measured at nominal VCC.
tpd is the same as tPLH and tPHL.
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
2
Σ(CL × VCC × fo) = sum of outputs.
11.1 Waveforms and test circuit
tW
VI
CP input
VM
GND
1/fmax
VI
VM
D input
GND
th
th
t su
t su
t PHL
t PLH
VOH
VM
Q output
VOL
VOH
Q output
VM
VOL
t PLH
t PHL
001aae365
Measurement points are given in Table 10.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 5. The clock input (CP) to output (Q, Q) propagation delays, the data input (D) to clock input (CP) set-up and
hold times and the clock input (CP) pulse width and maximum frequency
74AUP1G74_Q100
Product data sheet
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13 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
VI
CP input
VM
GND
t rec
VI
SD input
VM
t rec
GND
tW
tW
VI
VM
RD input
GND
t PLH
t PHL
t PHL
t PLH
VOH
VM
Q output
VOL
VOH
VM
Q output
VOL
001aae366
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 6. The set input (SD) and reset input (RD) to output (Q, Q) propagation delays, the set input (SD) and reset
input (RD) pulse widths and the reset input (RD) to clock input (CP) recovery time
Table 10. Measurement points
Supply voltage
Output
Input
VCC
VM
VM
VI
tr = tf
0.8 V to 3.6 V
0.5 × VCC
0.5 × VCC
VCC
≤ 3.0 ns
74AUP1G74_Q100
Product data sheet
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14 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
VCC
G
VI
DUT
VEXT
5 kΩ
VO
RT
CL
RL
001aac521
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Figure 7. Test circuit for measuring switching times
Table 11. Test data
Supply voltage
Load
VEXT
VCC
CL
[1]
RL
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF
5 kΩ or 1 MΩ
[1]
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
open
GND
2 × VCC
For measuring enable and disable times RL = 5 kΩ.
For measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ.
74AUP1G74_Q100
Product data sheet
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15 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
12 Package outline
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
D
SOT765-1
E
A
X
c
y
HE
v
A
Z
5
8
Q
A
A2
A1
pin 1 index
(A3)
θ
Lp
1
detail X
4
e
L
w
bp
0
5 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
A
max.
max
nom
min
1
A1
A2
0.15 0.85
0.00 0.60
A3
0.12
D(1)
E(2)
0.27 0.23
2.1
2.4
0.17 0.08
1.9
2.2
bp
c
e
HE
0.5
3.2
3.0
L
0.4
Lp
Q
0.40 0.21
0.15 0.19
v
w
y
0.2
0.08
0.1
Z(1)
θ
0.4
8°
0.1
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
Outline
version
SOT765-1
References
IEC
JEDEC
JEITA
sot765-1_po
European
projection
Issue date
07-06-02
16-05-31
MO-187
Figure 8. Package outline SOT765-1 (VSSOP8)
74AUP1G74_Q100
Product data sheet
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16 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
13 Abbreviations
Table 12. Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MIL
Military
MM
Machine Model
14 Revision history
Table 13. Revision history
Document ID
Release date
Data sheet status Change notice
Supersedes
74AUP1G74_Q100 v.2
20170410
Product data sheet
74AUP1G74_Q100 v.1
Modifications:
• The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
74AUP1G74_Q100 v.1
20150527
74AUP1G74_Q100
Product data sheet
Product data sheet
-
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 April 2017
-
© Nexperia B.V. 2017. All rights reserved.
17 / 20
74AUP1G74-Q100
Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
15 Legal information
15.1 Data sheet status
Document status
[1][2]
Product status
[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Notwithstanding any damages that
customer might incur for any reason whatsoever, Nexperia's aggregate and
cumulative liability towards customer for the products described herein shall
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
or warranty that such applications will be suitable for the specified use
without further testing or modification. Customers are responsible for the
design and operation of their applications and products using Nexperia
products, and Nexperia accepts no liability for any assistance with
applications or customer product design. It is customer’s sole responsibility
to determine whether the Nexperia product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
any liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
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Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 April 2017
© Nexperia B.V. 2017. All rights reserved.
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Low-power D-type flip-flop with set and reset; positive-edge trigger
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
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Product data sheet
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 April 2017
© Nexperia B.V. 2017. All rights reserved.
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Nexperia
Low-power D-type flip-flop with set and reset; positive-edge trigger
Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
11.1
12
13
14
15
General description ............................................ 1
Features and benefits .........................................1
Ordering information .......................................... 2
Marking .................................................................2
Functional diagram ............................................. 2
Pinning information ............................................ 3
Pinning ............................................................... 3
Pin description ................................................... 3
Functional description ........................................3
Limiting values .................................................... 4
Recommended operating conditions ................ 4
Static characteristics .......................................... 5
Dynamic characteristics .....................................8
Waveforms and test circuit .............................. 13
Package outline .................................................16
Abbreviations .................................................... 17
Revision history ................................................ 17
Legal information .............................................. 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 10 April 2017
Document identifier: 74AUP1G74_Q100