S-34TS04A
2-WIRE SERIAL E2PROM
WITH TEMPERATURE SENSOR
FOR DIMM SERIAL PRESENCE DETECT
www.ablic.com
Rev.2.0_00_U
© ABLIC Inc., 2013-2019
This IC is a 2-wire serial E2PROM with temperature sensor for DIMM serial presence detect which operates in 2.2 V to
3.6 V voltage ranges. This IC has the capacity of 4 K-bit and the organization of 2 pages × 256-word × 8-bit. Page write and
sequential read are available.
This IC operates with the I2C-bus at 1.0 MHz maximum.
A substantial reduction in current consumption may be achieved by using the software programmed shutdown mode which
can be set by the I2C-bus.
Caution
This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or automobile
equipment including car audio, keyless entry and engine control unit, it is imperative to contact our sales
representatives.
Features
Package
E2PROM block
•
•
•
•
•
•
•
•
• DFN-8(2030)B
Page write:
16 bytes / page
Sequential read
Write protect function during low power supply voltage
Write protect:
Individual software data protection for each of four 128-byte blocks
Endurance:
106 cycle / word*1 (Ta = +25°C)
Data retention:
100 years (Ta = +25°C)
Memory capacity:
4 K-bit
Initial delivery state:
FFh
5
8
4
1
(3.0 × 2.0 × t0.8 mm)
Temperature sensor block
• Temperature accuracy:
• Temperature sample rate:
• Selectable hysteresis width:
0.5°C typ. (Ta = +75°C to +95°C)
1.0°C typ. (Ta = +40°C to +125°C)
8 samples / s min.
No hysteresis, 1.5°C, 3.0°C, 6.0°C
Overall
• JEDEC standard compliant:
TSE2004B2
• Current consumption:
E2PROM in standby mode and temperature sensor in shutdown mode:
3.0 μA max.
E2PROM in standby mode and temperature sensor in active mode:
0.1 mA max.
E2PROM in read operation mode and temperature sensor in active mode: 0.4 mA max.
E2PROM in write operation mode and temperature sensor in active mode: 2.0 mA max.
• Operation voltage range:
2.2 V to 3.6 V
• Operation frequency:
1.0 MHz max. (VDD = 2.2 V to 3.6 V)
• Noise suppression:
Schmitt trigger and noise filter on input pins (SCL, SDA)
• Operation temperature range: Ta = −20°C to +125°C
• Lead-free (Sn 100%), halogen-free
*1.
For each address (Word: 8-bit)
1
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Block Diagram
Capabilities register
Configuration register
HIGH limit register
Temperature
sensor
ΔΣ A/D
converter
LOW limit register
TCRIT limit register
Ambient temperature register
Timeout
circuit
VDD
VSS
Power-on reset
SCL
Start / stop
detector
SDA
Manufacture ID register
Device ID / revision register
Resolution register
Pointer register
Serial clock
controller
Voltage detector
High-voltage generator
Device address
comparator
Address
counter
SA2
SA1
SA0
Data register
Xdecoder
E2PROM
High-voltage
detector
Y-decoder
Selector
Data output
ACK output
controller
2
Temperature
controller
EVENT
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Product Name Structure
1.
Product name
S-34TS04A 0
B
-
A8T5
U
5
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
A8T5: DFN-8(2030)B, Tape
Operation temperature
B:
Ta = −20°C to +125°C
Product name
S-34TS04A: 4 K-bit
*1.
2.
Refer to the tape drawing.
Package
Package Name
DFN-8(2030)B
3.
Dimension
PQ008-B-P-SD
Tape
PQ008-B-C-SD
Reel
PQ008-B-R-SD
Land
PQ008-B-L-SD
Product name list
Product Name
S-34TS04A0B-A8T5U5
Capacity
4 K-bit
Package Name
DFN-8(2030)B
Pin Configuration
1.
DFN-8(2030)B
Top view
Pin No.
1
8
2
7
3
6
4
5
*1.
1
2
3
4
5
6
7
8
Symbol
SA0
SA1
SA2
VSS
SDA*1
SCL*1
___________
EVENT
VDD
Description
Select address input
Select address input
Select address input
Ground
Serial data I/O
Serial clock input
Temperature event output
Power supply
Do not use it in "High-Z".
Remark For DFN-8(2030)B package, connect the heatsink of back side to the board, and set electric potential open or VSS.
However, do not use it as the function of electrode.
3
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Absolute Maximum Ratings
Table 1
Item
Power supply voltage
Input voltage (SCL, SA1, SA2)
SA0 pin high level input voltage
I/O voltage (SDA)
___________
Output voltage (EVENT)
Operation ambient temperature
Storage temperature
Symbol
Absolute Maximum Rating
−0.3 to +4.3
−0.3 to +4.3
−0.3 to +10.0
−0.3 to +4.3
−0.3 to +4.3
−20 to +125
−65 to +150
VDD
VIN
VHV
VIO
VOUT
Topr
Tstg
Unit
V
V
V
V
V
°C
°C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
Recommended Operation Conditions
Table 2
Item
Power supply voltage
Operation ambient temperature
High level input voltage
Low level input voltage
SA0 pin high level input voltage
Symbol
VDD
Topr
VIH
VIL
VHV
Condition
TSE2004B2 compliant
TSE2004B2 compliant
−
−
VHV − VDD ≥ 4.8 V
Min.
2.2
−20
0.7 × VDD
−0.3
7.0
Max.
3.6
+125
VDD + 0.5
0.3 × VDD
10.0
Unit
V
°C
V
V
V
Pin Capacitance
Table 3
Item
Input capacitance
I/O capacitance
Output capacitance
Symbol
CIN
CI/O
COUT
Condition
VIN = 0 V (SCL, SA0, SA1, SA2)
VI/O = 0 V (SDA)
___________
VOUT = 0 V (EVENT)
(Ta = +25°C, f = 1.0 MHz, VDD = 2.5 V)
Min.
Max.
Unit
−
6
pF
−
8
pF
−
8
pF
Endurance
Table 4
Item
Symbol
Operation Ambient Temperature
Endurance
NW
Ta = +25°C
*1. For each address (Word: 8-bit)
Min.
106
Max.
−
Unit
cycle / word*1
Min.
Max.
Unit
100
−
year
Data Retention
Table 5
Item
Data retention
4
Symbol
−
Operation Ambient Temperature
Ta = +25°C
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
DC Electrical Characteristics
Table 6
Item
Symbol
Shutdown current consumption
ISD
Standby current consumption
IDD1
Current consumption (READ)
IDDR
Current consumption (WRITE)
IDDW
Input leakage current
ILI
Output leakage current
ILO
Input current 1
IIL
Input current 2
IIH
Input impedance 1
ZIL
Input impedance 2
ZIH
Low level output voltage
VOL
Low level output current 1
IOL1
Low level output current 2
IOL2
Power-on reset threshold voltage
Power-off threshold voltage
VPON
VPOFF
Condition
E2PROM: standby mode
Temperature sensor: shutdown mode
E2PROM: standby mode
Temperature sensor: active mode
E2PROM: read mode
Temperature sensor: active mode
f = 1.0 MHz
E2PROM: write mode
Temperature sensor: active mode
f = 1.0 MHz
SCL, SDA
VIN = V___________
SS to VDD
SDA, EVENT
VOUT = VSS to VDD
SA0, SA1, SA2
VIN < 0.3 × VDD
SA0, SA1, SA2
VIN > 0.7 × VDD
SA0, SA1, SA2
VIN = 0.3 × VDD
SA0, SA1, SA2
VIN = 0.7
× VDD
___________
SDA, EVENT
IOL = 3.0
mA
___________
SDA, EVENT
VOL = 0.4
V
___________
SDA, EVENT
VOL = 0.6 V, f ≤ 400 kHz
−
−
Ta = −20°C to +125°C
VDD = 2.2 V to 3.6 V
Min.
Max.
Unit
−
3.0
μA
−
0.1
mA
−
0.4
mA
−
2.0
mA
−
1.0
μA
−
1.0
μA
−
50.0
μA
−
2.0
μA
30
−
kΩ
800
−
kΩ
−
0.4
V
20
−
mA
6
−
mA
1.6
−
−
0.9
V
V
5
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
AC Electrical Characteristics
Table 7
Measurement Conditions
Input pulse voltage
0.2 × VDD to 0.8 × VDD
20 ns or less
0.3 × VDD to 0.7 × VDD
100 pF
Input pulse voltage
Input pulse rising / falling time
Output reference voltage
Output load
Output reference voltage
0.8 × VDD
0.7 × VDD
0.3 × VDD
0.2 × VDD
Figure 1
Input / Output Waveform during AC Measurement
Table 8
Item
Symbol
SCL clock frequency
SCL clock time "L"
SCL clock time "H"
SCL clock "L" timeout
SCL, SDA rising time
SCL, SDA falling time
Data input setup time
Data input hold time
Data output hold time
Start condition setup time
Start condition hold time
Stop condition setup time
Bus release time
Noise suppression time
Power-off time
Initialize time
Min.
10
1.3
0.6
25
0.02
0.02
100
0
200
0.6
0.6
0.6
1.3
−
1
0.2
fSCL
tLOW
tHIGH
tTIMEOUT
tR
tF
tSU.DAT
tHD.DI
tHD.DAT
tSU.STA
tHD.STA
tSU.STO
tBUF
tI
tPOFF
tINIT
tF
tHIGH
Ta = −20°C to +125°C
VDD = 2.2 V to 3.6 V
400 kHz
1000 kHz
Max.
Min.
Max.
400
10
1000
−
0.5
−
−
0.26
−
35
25
35
0.3
−
0.12
0.3
−
0.12
−
50
−
−
0
−
900
0
350
−
0.26
−
−
0.26
−
−
0.26
−
−
0.5
−
50
−
50
−
1
−
−
0.2
−
tLOW
tR
SCL
tHD.STA
tSU.STA
tHD.DI
tSU.DAT
tSU.STO
SDA
(Input)
tHD.DAT
SDA
(Output)
Figure 2
6
Bus Timing
tBUF
Unit
kHz
μs
μs
ms
μs
μs
ns
ns
ns
μs
μs
μs
μs
ns
ms
ms
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Table 9
Item
Symbol
Write time
Start condition
tWR
Ta = −20°C to +125°C
VDD = 2.2 V to 3.6 V
Min.
Max.
−
5.0
Acknowledge
Write data
Stop condition
Unit
ms
tWR
Start condition
SCL
D0
SDA
Figure 3
Write Cycle Timing
Temperature Characteristics
Table 10
Item
Temperature sensor accuracy
Resolution
Temperature conversion time
Symbol
TACC1
TACC2
TACC3
TRES
tCONV
Condition
Ta = +75°C to +95°C
Ta = +40°C to +125°C
Ta = −20°C to +125°C
Default value
All TRES [1:0] settings
Min.
−
−
−
−
−
VDD = 2.2 V to 3.6 V
Typ.
±0.5
±1.0
±2.0
0.25
−
Max.
±1.0
±2.0
±3.0
−
125
Unit
°C
°C
°C
°C
ms
7
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Pin Functions
1.
VDD (Power supply) pin
The VDD pin is used to apply positive supply voltage. Regarding the applied voltage value, refer to
" Recommended Operation Conditions". Set a bypass capacitor of about 0.1 μF between the VDD pin and the
VSS pin for stabilization as close to IC as possible.
2.
SA0, SA1 and SA2 (Select address input) pins
In this IC, to set the slave address, connect each of the SA0 pin, SA1 pin and SA2 pin to the VSS pin or the VDD pin.
Therefore the users can set 8 types of slave address by a combination of the SA0 pin, SA1 pin, SA2 pin.
Comparing the slave address transmitted from the master device and one that you set, makes possible to select one
slave address from other devices connected onto the bus.
Each of the SA0 pin, SA1 pin and SA2 pin has a built-in pull-down resistor. In open, the pin is set to the same status
as it connected to the VSS pin.
The SA0 pin is used to detect the VHV voltage, when decoding an SWPn or CWP instruction. Refer to Table 11 for pin
setting and device select code.
3.
SDA (Serial data I/O) pin
The SDA pin is used for the bi-directional transmission of serial data. This pin is a signal input pin, and an Nch
open-drain output pin.
In use, generally, connect the SDA line to any other device which has the open-drain or open-collector output with
Wired-OR connection by pulling up to VDD by a resistor.
4.
SCL (Serial clock input) pin
The SCL pin is used for the serial clock input. Since the signals are processed at a rising or falling edge of the SCL
clock, pay attention to the rising and falling time and comply with the specification.
5.
___________
EVENT (Temperature event output) pin
___________
The EVENT pin is an open-drain output
that requires a pull-up resistor to VDD on the system motherboard or
___________
integrated into the master controller. EVENT pin has three operating modes, depending on the configuration register
settings, and the output status is defined by the measured temperature and the temperature limit register setting.
These modes are interrupt, comparator, or TCRIT only.
Figure
4 shows an example of the measured temperature versus time, with the corresponding behavior of the
___________
EVENT pin in each of these three modes.
5. 1
Interrupt mode
___________
In interrupt mode, the EVENT pin will be asserted when the measured temperature crosses any temperature
limit setting. Once the pin has been asserted, the pin will remain asserted until it is released by writing "1" to the
CLEAR bit in the configuration register. After the pin is de-asserted, the pin will be re-asserted when the
measured temperature crosses any temperature limit setting.
5. 2
Comparator mode
___________
In comparator mode, the EVENT pin will be asserted when the measured temperature is above the high limit
or below "the low limit − hysteresis width". The pin will clear itself when the measured temperature is below "the
high limit − hysteresis width" and above the low limit.
5. 3
TCRIT only mode
___________
In TCRIT only mode, the EVENT pin will only be asserted if the measured temperature exceeds the critical
temperature. Once the pin has been asserted, it will remain asserted until the temperature drops below "the
critical temperature − hysteresis width".
8
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
TTCRIT
TTCRIT − THYS
THIGH
THIGH − THYS
TLOW
TLOW − THYS
Comparator mode
EVENT pin
TCRIT only mode
EVENT pin
Interrupt mode
EVENT pin
Interrupt clear Interrupt clear
Figure 4
Interrupt clear
Interrupt clear
___________
EVENT pin (Active "L")
9
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Initial Delivery State
Initial delivery state of all address E2PROM is "FFh". All write protects are cleared.
Operation
This IC behaves as a slave device in the I2C-bus protocol.
This IC has unrelated two functions as 4 K-bit E2PROM with software write protection and temperature sensor measuring
ambient temperature.
All operations are synchronized by the serial clock. Read and write operations are initiated by a start condition, generated
by the master device. The start condition is followed by a device select code and read / write bit, and this IC generates an
acknowledge bit.
The 7-bit device select code is constructed of 4-bit device type identifier code (DTIC) and 3-bit code which shows the
state of the SA0 pin, SA1 pin, and SA2 pin. DTIC is a code to define functions.
When writing data to this IC, this IC generates an acknowledge bit during the 9th bit time, following the master device's
8-bit transmission. When data is read by the master device, the master device acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by a master device which generates stop condition after an acknowledge
for write, and after no acknowledge for read.
This IC has the timeout function. This IC shall not initiate clock stretching, which is an optional I2C-bus feature.
1.
Setting of DTIC
Operation function is identified by DTIC. There are three types of DTIC of which two are used for E2PROM and one is
used for temperature sensor. The E2PROM memory may be accessed using a DTIC of "1010b", and to perform the
software write protection or the E2PROM page address operations a DTIC of "0110b" is required. The temperature
sensor registers are accessed using a DTIC of "0011b".
2.
E2PROM function
This IC has a 4 K-bit E2PROM array. The E2PROM array is devided into two pages consisting of a lower 256-byte
page and an upper 256-byte page, which change over by the set E2PROM page address order. Each page has two
128-byte blocks. Each block can be set to write-protected by software write protect function. Page write operation up
to 16 bytes and sequential read operation are available.
All operations of the E2PROM section are inhibited to be performed during E2PROM write time.
For more detail, refer to " E2PROM Operation".
3.
Temperature sensor function
This IC has a digital temperature sensor. With the nine types of temperature sensor registers, this IC can be
performed to read measured ambient temperature from register and to write configration
data to register. This IC can
___________
output comparison result of ambient temperature and specified limit value from EVENT pin.
Temperature sensor regularly refresh temperature register value after power-on, and can go into shutdown condition
when SHDN bit is set. During shutdown condition, temperature sensor circuit is stopped and holds temperature
sensor register value, reducing current consumption.
All operations of the temperature sensor section are performed anytime.
For more detail, refer to " Temperature Sensor Operation".
10
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
4.
Initialization operation after power-on
By a power-on reset circuit, this IC initializes the internal circuit at the time of power-on. Perform the beginning (start
condition) of the instruction transmission to this IC after the initialization by the power-on reset circuit. Regarding the
datails of power-on reset, refer to " Reset and Initialization".
5.
Start condition
Start is identified by a "H" to "L" transition of the SDA line while the SCL line is stable at "H".
Every operation begins from a start condition.
6.
Stop condition
Stop is identified by a "L" to "H" transition of the SDA line while the SCL line is stable at "H".
When a device receives a stop condition during a read sequence, the read operation is interrupted, and the device
enters standby mode.
When a device receives a stop condition during an E2PROM write sequence, the reception of the write data is halted,
and this IC initiates an E2PROM write cycle.
tINIT
VDD
VDD min.
tSU.STA
tHD.STA
tSU.STO
SCL
SDA
Start condition
Figure 5
Stop condition
Start / Stop Conditions after Power-on
11
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
7.
Data transmission
Changing the SDA line while the SCL line is "L", data is transmitted.
Changing the SDA line while the SCL line is "H", a start or stop condition is recognized.
tHD.DI
tSU.DAT
SCL
SDA
(Input)
Figure 6
8.
Data Transmission Timing
Acknowledge
The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down the SDA
line to acknowledge the receipt of the 8-bit data.
When an E2PROM write cycle is in progress, this IC does not generate an acknowledge for DTIC of "1010b" and
"0110b".
SCL
(Input)
1
8
9
SDA
(Input)
Acknowledge
output
SDA
(Output)
Start condition
tHD.DAT
Figure 7
12
Acknowledge Output Timing
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
9.
Device addressing
To start communication, the master device on the system generates a start condition to the slave device. Following
this, the master device sends the device select code.
Table 11
Device Select Code
____
SA Pin
Device Type Identifier
Select Address Signal R/ W
Instruction
B7
B6
B5
B4
B3
B2
B1
B0
SA2
SA1 SA0
____
2
*1
Read / write E PROM
1
0
1
0
SA2
SA1
SA0 R/ W SA2 SA1 SA0
−*2
−*2 VHV
Set write protection, block 0 (SWP0)
0
1
1
0
0
0
1
0
*2
−
−*2 VHV
Set write protection, block 1 (SWP1)
0
1
1
0
1
0
0
0
−*2
−*2 VHV
Set write protection, block 2 (SWP2)
0
1
1
0
1
0
1
0
*2
−
−*2 VHV
Set write protection, block 3 (SWP3)
0
1
1
0
0
0
0
0
*2
−
−*2 VHV
Clear write protection for all blocks (CWP)
0
1
1
0
0
1
1
0
*2
−
−*2
−*2
Read SWP0 status (RPS0)
0
1
1
0
0
0
1
1
*2
*2
−
−
−*2
Read SWP1 status (RPS1)
0
1
1
0
1
0
0
1
−*2
−*2
−*2
Read SWP2 status (RPS2)
0
1
1
0
1
0
1
1
−*2
−*2
−*2
Read SWP3 status (RPS3)
0
1
1
0
0
0
0
1
*2
*2
−
−
−*2
Set page address to 0 (SPA0)
0
1
1
0
1
1
0
0
*2
*2
−
−
−*2
Set page address to 1 (SPA1)
0
1
1
0
1
1
1
0
*2
*2
−
−*2
Read page address (RPA)
0
1
1
0
1
1
0
1____ −
Read / write temperature register*1
0
0
1
1
SA2
SA1
SA0 R/ W SA2 SA1 SA0
*1. Slave addresses (SA2, SA1, SA0) are compared by the select address input pins (SA2, SA1, SA0) of a memory device
with the address value which is set beforehand.
*2. Connected to the VSS pin or VDD pin.
The device select code consists of a 4-bit device type identifier, and 3-bit select signals (SA2 pin, SA1 pin, SA0 pin).
To address the memory array, the 4-bit device type identifier is "1010b"; to access the write-protection settings and
the page address settings, it is "0110b"; and to access the temperature sensor settings is "0011b".
Up to eight devices can be connected on a single I2C-bus. Address select signals (SA2 pin, SA1 pin, SA0 pin) should
be set on each device, respectively. The device continues the operation only when the received device select code
matches the address select signal.
The SWPn, CWP, RPSn write protect commands and SPAn, RPA E2PROM page address commands do not use the
select address, therefore all devices____
on the I2C-bus will act on these commands simultaneously.
The 8th bit is the read / write bit (R/ W ). This bit is set to "1" for read and "0" for write operations. If a match occurs on
the device select code, the corresponding device gives an acknowledge on serial data (SDA) during the 9th bit time. If
the device does not match the device select code, this IC goes into standby mode automatically.
Table 12
Operating Modes
____
E2PROM
Mode
current address read
E2PROM random read
E2PROM sequential read
E2PROM byte write
E2PROM page write
SWPn and CWP
Set E2PROM page address
Read E2PROM page address
Temperature sensor read
Temperature sensor write
*1. X: Don't care
R/ W
1
0
1
1
0
0
0
0
1
1
0
Byte
1
1
≥1
1
≤ 16
2
2
2
2
2
I/O Sequence
____
Start, device select, R/____
W = 1, data, stop
= 0, address
Start, device select, R/ W____
Restart, device select, R/ W = 1, data, stop
address read or E2PROM random read
Similar to E2PROM current
____
Start, device select, R/____
W = 0, address, data, stop
Start, device select, R/____
W = 0, address, data, stop
Start, device select, R/____
W = 0, X*1, X*1, stop
Start, device select, R/____
W = 0, X*1, X*1, stop
Start, device select, R/____
W = 1, X*1, X*1, stop
Start, device select, R/____
W = 1, data, stop
Start, device select, R/ W = 0, pointer, data, stop
13
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
10.
Timeout
This IC has the timeout function. If the SCL stays "L" for the SCL clock "L" timeout (tTIMEOUT) or more, this IC resets
the serial interface and returns to standby mode. If the SCL stays "L" for less than the tTIMEOUT, this IC does not reset
the serial interface. The tTIMEOUT is 30 ms typ.
tTIMEOUT.MIN
CASE 1
SCL
CASE 2
SCL
CASE 3
SCL
tTIMEOUT.MAX
CASE 1: SCL clock time "L" (tLOW) ≥ tTIMEOUT.MAX, this IC will reset the bus communication and return to standby mode.
CASE 2: tLOW < tTIMEOUT.MIN, this IC will not reset the bus communication.
CASE 3: tTIMEOUT.MIN ≤ tLOW < tTIMEOUT.MAX, this IC may or may not reset the bus communication.
Figure 8
The Examples of the Timeout Timing
When this IC is not in the range of the clock frequency specified by AC characteristics, it may not perform
communication normally.
14
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
E2PROM Operation
1.
Write
1. 1
Byte write
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "0", following a start
condition, this IC generates an acknowledge.
This IC then receives an 8-bit word address and responds with an acknowledge. After this IC receives 8-bit write
data and responds with an acknowledge, it receives a stop condition and that initiates the write cycle at the
designated memory address.
When the certain word address is protected by the write instruction, this IC does not generate an acknowledge
after data byte coding, and write operation is not performed.
During the write operation to this IC, access to the temperature sensor section of this IC are permitted, but all
operations of the E2PROM section are inhibited to be performed and the E2PROM section does not send back an
acknowledge.
S
T
A
R
T
DEVICE
SELECT CODE
1
SDA LINE
W
R
I
T
E
0 1 0 SA2 SA1 SA0 0
M
S
B
WORD ADDRESS
DATA
W7 W6 W5 W4 W3 W2 W1 W0
D7 D6 D5 D4 D3 D2 D1 D0
L R A
S / C
B W K
AA
C
C
KK
Figure 9
1. 2
S
T
O
P
A
C
K
Byte Write
Page write
The page write mode allows up to 16 bytes to be written in a single write operation in this IC.
Its basic process to transmit data is as same as byte write, but it operates page write by sequentially receiving
8-bit write data as much data as the page size has.
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "0", following a start
condition, it generates an acknowledge. Then this IC receives an 8-bit word address, and responds with an
acknowledge. After this IC receives 8-bit write data and responds with an acknowledge, it receives 8-bit write data
corresponding to the next word address, and generates an acknowledge. This IC repeats reception of 8-bit write
data and generation of acknowledge in succession. This IC can receive as many write data as the maximum page
size.
Receiving a stop condition initiates a write cycle of the area starting from the designated memory address and
having the page size equal to the received write data.
S
W
T
R
A
I
R
T
DEVICE
T SELECT CODE E
SDA
LINE
1 0 1 0 SA2 SA1 SA0 0
M
S
B
L R A
S / C
BWK
WORD ADDRESS (n)
DATA (n)
W7W6 W5W4 W3 W2 W1W0
D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
Figure 10
DATA (n + 1)
D7
A
C
K
S
T
O
P
DATA (n + x)
D0
D7
A
C
K
D0
A
C
K
Page Write
The lower 4 bits of the word address are automatically incremented every time when it receives 8-bit write data. If
the size of the write data exceeds 16 bytes, the higher 4 bits (W7 to W4) of the word address remain unchanged,
and the lower 4 bits are rolled over and the last 16-byte data that this IC received will be overwritten.
15
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
1. 3
Software write protect
This IC has set write protection for block n (SWPn), clear write protection for all blocks (CWP) and read protection
status for block n (RPSn).
There are four independent memory blocks, and each block may be independently protected. The memory blocks
are:
•
•
•
•
Block 0 = word addresses 00h to 7Fh, page address = 0
Block 1 = word addresses 80h to FFh, page address = 0
Block 2 = word addresses 00h to 7Fh, page address = 1
Block 3 = word addresses 80h to FFh, page address = 1
1. 3. 1
Set write protect (SWPn) and clear write protect (CWP)
If the software write protect has been set with the SWPn instruction, the block n in memory is write-protected.
The four independent blocks are protected by SWPn instructions. The write-protected block can be cleared with
the CWP instruction.
The CWP instruction clears write protection for all blocks, therefore the CWP instruction can not clear write
protection for each block.
The SWPn and CWP instructions have the same format as a byte write instruction, but have a different device
select code. Like the byte write instruction, it is followed by an address byte and a data byte, but in this case the
contents can be set in all "Don't care". In the instructions of SWPn and CWP, be sure to apply the high voltage of
VHV to the SA0 pin, and input "H" or "L" to the SA1 pin and SA2 pin.
The device select code for each block is shown in Table 11.
S
T
A
R
T
SDA LINE
DEVICE
SELECT CODE
Address
0 1 1 0 Select
0
Signals
M
S
B
Remark
W
R
I
T
E
DATA
X X X X X X X X
X X X X X X X X
L R A
S / C
B W K
A
C
K
A
C
K
X: Don't care
Figure 11
1. 3. 2
WORD ADDRESS
S
T
O
P
Software Write Protect
Read protection status (RPSn)
The RPSn are the instructions to find the write protection status in block n. If a certain block is not protected by
SWPn instruction, this IC generates an acknowledge after the device receives the device select code of the block.
If a certain block is protected by SWPn instruction, this IC does not generate an acknowledge after the device
receives the device select code of the block.
1. 3. 3
Set E2PROM page address (SPAn)
The SPAn are the instructions to select the lower 256-byte page (SPA0) or the higher 256-byte page (SPA1). The
E2PROM page address selects the lower 256 bytes (SPA0) after power-on reset.
1. 3. 4
Read E2PROM page address (RPA)
The RPA are the instructions to find the current page address status. If the current page address is "0", this IC
generates an acknowledge after the device receives the device select code. If the current page address is "1",
this IC does not generate an acknowledge.
16
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Table 13
Status
Software Write
Protect (SWPn)
No Software Write
Protect
Instruction
SWPn in protected block
SWPn in no protected block
CWP
Page write or byte write in
protected block
Page write or byte write in
no protected block
SWPn or CWP
Page write or byte write
Table 14
Status
Software Write
Protect (SWPn)
No Software Write
Protect
____
Acknowledge for Write Instruction (R/ W bit = 0)
ACK
Output
No
Yes
Yes
Word
Address
Don't care
Don't care
Don't care
ACK
Output
No
Yes
Yes
Don't care
Don't care
Don't care
ACK
Output
No
Yes
Yes
No
Yes
Yes
Yes
Word address
Yes
Don't care
No
No
Yes
Word address
Yes
Data
Yes
Yes
Yes
Yes
Don't care
Word address
Yes
Yes
Don't care
Data
Yes
Yes
Yes
Yes
Data
Write
____
Acknowledge for Read Instruction (R/ W bit = 1)
ACK
Output
Instruction
Word
Address
ACK
Output
Data
ACK
Output
RPSn
No
Don't care
No
Don't care
No
RPSn
Yes
Don't care
No
Don't care
No
17
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
1. 4
Acknowledge polling
Acknowledge polling is used to know the completion of the write cycle in this IC.
After this IC receives a stop condition and once starts the write cycle, E2PROM operations are forbidden and no
response is made to the signal transmitted by the master device.
Accordingly the master device can recognize the completion of the write cycle in this IC (slave device) by
detecting a response from the slave device after transmitting the start condition, the device address and the read /
write instruction code to this IC, namely to the slave devices.
That is, if this IC does not generate an acknowledge, the write cycle is in progress and if this IC generates an
acknowledge, the write cycle has been completed.
It is recommended to use the read instruction "1" as the read / write instruction code transmitted by the master
device.
Acknowledge polling during write
DATA
SDA
LINE
D2 D1 D0
S
T
O
P
W
R
I
T
E
S
T
A
R
T
S
T
A
R
T
DEVICE
SELECT CODE 0
W
R
I
T
E
DEVICE
SELECT CODE 0
R N
/ A
W C
K
WORD
ADDRESS
A
C
K
R A
/ C
WK
tWR
Acknowledge polling during read
S
S
T
T
A
O
R
P
DATA
T
SDA
DEVICE
D2 D1 D0
SELECT CODE
LINE
S
T
A
R
T
R
E
A
D
NO ACK from
R Master Device
E
A
D
DEVICE
SELECTCODE 1
1
R N
/ A
W C
K
DATA
R A
/ C
WK
S
T
O
P
S
T
A
R
T
DEVICE
SELECT CODE
R A
/ C
WK
tWR
Remark
Users are able to input data after acknowledge output in acknowledge polling during write.
Users are able to read data after acknowledge output in acknowledge polling during read.
However, after that users input the write instruction, a start condition may not be input during data output. Input a
stop condition and the next instruction after acknowledge output and data output.
Figure 12
18
Usage Example of Acknowledge Polling
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
2.
Read
2. 1
Current address read
Either in writing or in reading this IC holds the last accessed memory address. The memory address is maintained
when the instruction transmission is not interrupted, and the memory address is maintained as long as the power
voltage does not decrease less than the power-on reset threshold voltage (VPON).
The master device can read the data at the memory address of the current address pointer without assigning the
word address as a result, when it recognizes the position of the address pointer in this IC. This is called "current
address read".
In the following the address counter in this IC is assumed to be "n".
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "1" following a start
condition, it responds with an acknowledge.
Next an 8-bit data at the address "n" is sent from this IC synchronous to the SCL clock. The address counter is
incremented and the content of the address counter becomes n + 1. The master device outputs stop condition not
an acknowledge, the reading of this IC is ended.
S
T
A
R
T
SDA LINE
DEVICE
SELECT CODE
1
0
1
NO ACK from
Master Device
R
E
A
D
DATA
0 SA2 SA1 SA0 1
M
S
B
L R
S /
B W
Figure 13
S
T
O
P
D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
ADR INC
Current Address Read
Attention should be paid to the following point on the recognition of the address pointer in this IC.
In read, the memory address counter in this IC is automatically incremented after output of the 8th bit of the data.
In write, on the other hand, the higher bits of the memory address (the higher 4 bits of the word address) are left
unchanged and are not incremented.
19
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
2. 2
Random read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "0" following a start
condition, it responds with an acknowledge.
This IC then receives an 8-bit word address and responds with an acknowledge. The memory address is loaded
to the address counter in this IC by these operations. Reception of write data does not follow in a dummy write
whereas reception of write data follows in byte write and in page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device can
read the data starting from the arbitrary memory address by transmitting a new start condition and performing the
same operation in the current address read.
That is, when this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "1", following a
start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted from this IC synchronously
with the SCL clock. The master device outputs stop condition not an acknowledge, the reading of this IC is ended.
S
T
A
R
T
SDA
LINE
DEVICE
SELECT CODE
W
R
I
T
E
WORD ADDRESS (n)
1 0 1 0 SA2 SA1 SA0 0
M
S
B
S
T
A
R
T
NO ACK from
Master Device
R
E
A
D
DEVICE
SELECT CODE
DATA
1 0 1 0 SA2 SA1 SA0 1
W7 W6 W5 W4 W3 W2 W1 W0
L R A
S / C
B W K
A
C
K
M
S
B
S
T
O
P
D7 D6 D5 D4 D3 D2 D1 D0
L R A
S / C
B W K
ADR INC
DUMMY WRITE
Figure 14
2. 3
Random Read
Sequential read
When this IC receives a 7-bit device address and a 1-bit read / write instruction code set to "1" following a start
condition both in current address read and random read, it responds with an acknowledge.
When an 8-bit data is output from this IC synchronously with the SCL clock, the address counter is automatically
incremented.
When the master device responds with an acknowledge, the data at the next memory address is transmitted.
Response with an acknowledge by the master device has the memory address counter in this IC incremented and
makes it possible to read data in succession. This is called sequential read.
The master device outputs stop condition not an acknowledge, the reading of this IC is ended.
Data can be read in succession in the sequential read mode. When the memory address counter reaches the last
word address, it rolls over to the first word address of same page address.
NO ACK from
Master Device
R
E
DEVICE
A
SELECT CODE D
SDA
LINE
1
R A
/ C
W K
A
C
K
D7
D0
A
C
K
D7
D0
ADR INC
Figure 15
20
D7
DATA (n + 1)
DATA (n)
S
T
O
P
A
C
K
D0
D7
DATA (n + 2)
ADR INC
Sequential Read
ADR INC
D0
DATA (n + x)
ADR INC
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Temperature Sensor Operation
Temperature sensor goes into active condition and regularly refresh ambient temperature register value by ambient
temperature and the comparison value between ambient temperature and temperature limit after power-on.
The Temperature registers store the ambient temperature data, limits, and configuration values. All registers in the
address space from "00h" through "08h" are 16-bit registers, accessed through block read and write commands.
Temperature sensor goes into shutdown condition by setting SHDN bit of configuration register.
Temperature sensor circuit including temperature sensor device and A/D converter circuit are stopped to control the
current consumption during shutdown mode. Ambient temperature register value is held during shutdown condition.
Temperature sensor goes into active condition again by clearing SHDN bit of configuration register.
1.
Temperature sensor register write operation
Writing to the temperature registers are accomplished through continuous write operations for 2-byte data. After the
write operation of the device select code, the master device writes data to the pointer register, then it writes the 16-bit
data every 8 bits. The 16-bit data is stored internally at the time when this IC generates an acknowledge after
receiving the 16-bit data.
W
R
I
DEVICE
T
SELECT CODE E
POINTER REGISTER
MSB DATA
LSB DATA
0 0 1 1 SA2 SA1 SA0 0
0 0 0 0 P3 P2 P1 P0
B15 B14 B13 B12 B11 B10 B9 B8
B7 B6 B5 B4 B3 B2 B1 B0
S
T
A
R
T
SDA
LINE
M
S
B
L R A
S / C
B W K
Figure 16
A
C
K
A
C
K
S
T
O
P
A
C
K
Temperature Sensor Register Write
21
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
2.
Temperature sensor register read operation
Reading data from temperature sensor register may be accomplished in the following ways:
(1) If the location latched in the pointer register is correct, the read sequence may consist of an operation in which
R/W bit of device select code is set to "1", and a following operation in which the 2-byte data is output every 8
bits from this IC.
This way is used to read data from the ambient teperature register repeatedly.
(2) The master device transfers the device select code and the R/W bit "0" and it is followed by the pointer register.
The current location latched in the pointer register becomes clear by sending stop condition after this IC
generates an acknowledge.
After that, reading data from the temperature sensor will be accomplished in the way of (1).
The master device is able to transfer the reading instrcution by sending start condition instead of stop condition after
the pointer regiser is set in the way of (2).
S
T
A
R
T
SDA
LINE
DEVICE
SELECT CODE
0 0 1 1 SA2 SA1 SA0 1
M
S
B
ACK from
Master Device
R
E
A
D
LSB DATA
B15 B14 B13 B12 B11 B10 B9 B8
B7 B6 B5 B4 B3 B2 B1 B0
A
C
K
SDA
LINE
0 0 1 1 SA2 SA1 SA0 0
M
S
B
SDA
LINE
0 0 1 1 SA2 SA1 SA0 0
M
S
B
L R A
S / C
B W K
Figure 19
22
0
0
0
0 0 P3 P2 P1 P0
AA
CC
KK
Pointer Register Write
S
T
A
R
T
POINTER REGISTER
0 0
POINTER REGISTER
L R A
S / C
BW K
Figure 18
W
R
I
DEVICE
T
SELECT CODE E
N
A
C
K
Temperature Sensor Register Read
W
R
I
DEVICE
T
SELECT CODE E
S
T
A
R
T
S
T
O
P
MSB DATA
L R A
S / C
BW K
Figure 17
S
T
A
R
T
NO ACK from
Master Device
DEVICE
SELECT CODE
R
E
A
D
0 0 1 1 SA2 SA1 SA0 1
0 P3 P2 P1 P0
AA
C
C
KK
M
S
B
L R A
S / C
B W K
ACK from
Master Device
NO ACK from
Master Device
MSB DATA
LSB DATA
B15 B14 B13 B12 B11 B10 B9 B8
B7 B6 B5 B4 B3 B2 B1 B0
A
C
K
Pointer Register Write and Temperature Sensor Register Read
S
T
O
P
N
A
C
K
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
3.
Temperature sensor register
The register addresses are shown in Table 15.
Table 15
Address
Not
applicable
R/W
W
Address pointer
00h
R
Capabilities register
Pointer Register Mapping
Name
Function
Default
Address storage for subsequent operations
Undefined
Indicates the functions and capabilities of the temperature
sensor
Controls the operation of the temperature sensor
Temperature high limit
Temperature low limit
Critical temperature
R/W*1
R/W
R/W
R/W
Configuration register
HIGH limit register
LOW limit register
TCRIT limit register
Ambient temperature
05h
R
Current ambient temperature
register
06h
R
Manufacturer ID register PCI-SIG manufacturer ID
07h
R
Device / revision register Device ID and revision number
08h
R/W
Resolution register
Sets temperature resolution
−*2
Undefined register
Undefined
09h to FFh
*1. There are read-only bits, write-only bits, and readable and writable bits in configuration register.
*2. Behavior on accesses to invalid pointer register locations is not assured.
01h
02h
03h
04h
B7
0
B6
0
B5
0
Fixed 0
Figure 20
B4
0
B3
P3
B2
B1
P2
P1
Pointer register bits
00EFh
0000h
0000h
0000h
0000h
Not
applicable
1C85h
2221h
0001h
Undefined
B0
P0
Pointer Register Structure
23
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
3. 1
Capabilities register
The capabitilies register indicates the supported features of the temperature sensor.
B15
RFU
B14
RFU
B7
B6
EVSD
TMOUT
Address : 00h
R/W :
Read only
Default : 00EFh
B13
RFU
B5
VHV
Figure 21
B12
RFU
B11
RFU
B4
B3
TRES[1:0]
B10
RFU
B9
RFU
B8
RFU
B2
RANGE
B1
ACC
B0
EVENT
Capabilities Register Structure
Bit 15 to 8 : RFU
Reserved for future use. These bits are always "0".
Bit 7 : EVSD
___________
EVENT pin operation
during shutdown mode.
___________
"1":
EVENT pin output de-asserts during shutdown.
Bit 6 : TMOUT
Bus timeout period access during normal operation.
"1":
tTIMEOUT is supported within the range of 25 ms to 35 ms.
Bit 5 : VHV
Support SA0 high level input voltage (VHV) for SA0 pin.
"1":
A voltage up to 10 V is supported on the SA0 pin.
Bit 4 to 3 : TRES[1:0]
Indicates the temperature resolution. Temperature resolution is set on the resolution register. Refer to "3. 7
Resolution Register" for resolution register.
"00":
9-bit temperature resolution (0.5°C resolution)
"01" (default): 10-bit temperature resolution (0.25°C resolution)
"10":
11-bit temperature resolution (0.125°C resolution)
"11":
12-bit temperature resolution (0.0625°C resolution)
Bit 2 : RANGE
Indicates the supported temperature range.
"1":
Lower than 0°C can be read and the sign bit will be set appropriately.
Bit 1 : ACC
Indicates the supported temperature accuracy.
±1.0°C max. (+75°C to +95°C)
"1":
Bit 0 : EVENT
Indicates whether interrupt mode is supported.
"1":
Interrupt mode is supported.
24
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
3. 2
Configuration register
___________
The configuration register holds the status bits and setting data of the EVENT pin, as well as temperature
hysteresis width setting data.
B15
RFU
B14
RFU
B13
RFU
B7
B6
B5
TCRIT
EVENT
CLEAR
_LOCK
_LOCK
Address : 01h
R/W :
Readable and Writable
Default : 0000h
Figure 22
B12
RFU
B11
RFU
B4
EVENT
_STS
B3
EVENT
_CTRL
B10
B9
HYST[1:0]
B2
TCRIT
_ONLY
B1
EVENT
_POL
B8
SHDN
B0
EVENT
_MODE
Configuration Register Structure
Bit 15 to 11 : RFU
Reserved for future use. These bits are always "0".
Bit 10 to 9: HYST[1:0]
Control the hysteresis width shown in Table 16. This hysteresis width applies to temperature high limit,
temperature low limit and critical temperature. Once the ambient temperature is above a given threshold, it must
drop below the threshold minus the hysteresis width___________
in order to be flagged as an interrupt event.
Note that hysteresis width is also applied to the EVENT pin functionality. When either of the lock bits is set,
these bits HYST[1:0] cannot be altered.
HYST1
0
0
1
1
Table 16
Hysteresis Width Setting
HYST0
0
1
0
1
Hysteresis Width
No hysteresis
1.5°C
3.0°C
6.0°C
Bit 8 : SHDN
Shutdown setting. The temperature sensing device and A/D converter are disabled to save power, no events will
be generated. When either of the lock bits is set, this bit cannot be set until unlocked. However it can be cleared
at any time.
"0" (default): The temperature sensor is active and converting.
"1":
The temperature sensor is disabled and will not generate interrupts or update the temperature
data.
Bit 7 : TCRIT_LOCK
Locks the TCRIT limit register from being updated.
"0" (default): The TCRIT limit register can be updated normally.
"1":
The TCRIT limit register is locked and cannot be updated. Once this bit has been set, it cannot
be cleared until an internal power-on reset.
Bit 6 : EVENT_LOCK
Locks the HIGH and LOW limit registers from being updated.
"0" (default): The HIGH and LOW limit registers can be updated normally.
"1":
The HIGH and LOW limit registers are locked and cannot be updated. Once this bit has been
set, it cannot be cleared until an internal power-on reset.
25
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Bit 5 : CLEAR
___________
Clears the EVENT pin when it has been asserted. This bit is write-only and will always be read "0".
"0":
Nothing happens.
___________
"1":
In interrupt mode, the EVENT pin is reset and will not be asserted until a new interrupt
condition occurs. This bit is ignored if the device is operating in comparator mode and when
detecting the critical temprature. This bit is self clearing. The read value is fixed to "0".
Bit 4 : EVENT_STS
___________
Indicates if the EVENT
pin is asserted. This bit is read only.
___________
"0" (default): The EVENT
pin is not being asserted.
___________
"1":
The EVENT pin is being asserted.
Bit 3 : EVENT_CTRL
___________
Controls the asserted state of the EVENT pin. If either of the lock bits are set (bit 7 and bit 6), then this bit
cannot be altered. ___________
"0" (default): The EVENT
pin can not be asserted.
___________
"1":
The EVENT pin can be asserted.
Bit 2 : TCRIT_ONLY
___________
Controls whether the EVENT pin will be asserted from a high / low out-of-limit condition. When the
EVENT_LOCK bit is___________
set, this bit cannot be altered.
"0" (default): The EVENT pin will be asserted if the measured temperature is above the temperature high
limit or below the temperature low limit in addition to if the temperature is above the critical
temperature.
___________
"1":
The EVENT pin will only be asserted if the measured temperature is above the critical
temperature.
Bit 1 : EVENT_POL
___________
___________
Controls the active "H" state of the EVENT pin. The EVENT pin is driven to this state when it is asserted. If
either of the lock bits___________
are set (bit 7 and bit 6), then this bit cannot be altered.
"0" (default): The EVENT
pin is active "L". The active "L" state of the pin will be logical "0".
___________
"1":
The EVENT pin is active "H". The active "H" state of the pin will be logical "1".
Bit 0 : EVENT_MODE
___________
___________
Controls the behavior of the EVENT pin. The EVENT pin may function in either comparator or interrupt mode.
If either of the lock bits
are set (bit 7 and bit 6), then this bit cannot be altered.
___________
"0" (default): The EVENT
pin will function in comparator mode.
___________
"1":
The EVENT pin will function in interrupt mode.
26
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
3. 3
Temperature limit register (HIGH limit / LOW limit / TCRIT limit)
Temperature in the HIGH limit register, LOW limit register and TCRIT limit register are set and described in 2's
complement format of Sign bit + 10-bit.
Examples of temperature limit register are shown in Table 17.
B15
−
B14
−
B13
−
B7
B6
B5
23°C
22°C
21°C
HIGH limit register
Address : 02h
R/W :
Readable and writable
Default : 0000h
LOW limit register
Address : 03h
R/W :
Readable and writable
Default : 0000h
TCRIT limit register
Address : 04h
R/W :
Readable and writable
Default : 0000h
Figure 23
B12
Sign
B11
27°C
B10
26°C
B9
25°C
B8
24°C
B4
20°C
B3
2-1°C
B2
2-2°C
B1
−
B0
−
Temperature Limit Register Structure
27
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
3. 4
Ambient temperature register
3 status bits of TCRIT, HIGH and LOW and ambient temperature data described in 2's complement format of
Sign bit + 12-bit can be read.
Examples of ambient temperature register are shown in Table 17.
B15
TCRIT
B13
LOW
B12
Sign
B11
27°C
B10
26°C
B9
25°C
B8
24°C
B7
B6
B5
23°C
22°C
21°C
Address : 05h
R/W :
Read-only
Default : Not applicable (0000h)
B4
20°C
B3
2-1°C
B2
2-2°C*1
B1
2-3°C*1
B0
2-4°C*1
*1.
B14
HIGH
The bits may not be used according to the resolution defined based on value of TRES[1:0] bit of the
capabilties register. Unused/unsupported bits will read as 0.
Figure 24
Ambient Temperature Register Structure
Bit 15 : TCRIT
When set, the ambient temperature is above the critical temperature. This bit will remain set so long as the
ambient temperature is above the critical temperature and will automatically clear once the ambient temperature
has dropped below the limit minus the hysteresis width.
Bit 14 : HIGH
When set, the ambient temperature is above the high limit. This bit will remain set so long as the ambient
temperature is above the high limit. Once set, it will only be cleared when the ambient temperature drops below
or equal to the high limit minus the hysteresis width.
Bit 13 : LOW
When set, the ambient temperature is below the low limit. This bit will remain set so long as the ambient
temperature is below the low limit minus the hysteresis. Once set, it will only be cleared when the ambient
temperature meets or exceeds the low limit.
Bit 12 to 0 : TAMB
Ambient temperature data in 2's complement format of Sign bit + 12-bit.
Table 17
Examples of Temperature
B15 to B0 (binary)
xxx0 0111 1101 00xx
xxx0 0101 0101 00xx
xxx0 0001 1001 00xx
xxx0 0000 0010 11xx
xxx0 0000 0001 00xx
xxx0 0000 0000 01xx
xxx0 0000 0000 00xx
xxx1 1111 1111 11xx
xxx1 1111 1111 00xx
xxx1 1111 1101 01xx
xxx1 1110 1100 00xx
28
Value
+125.00
+85.00
+25.00
+2.75
+1.00
+0.25
+0.00
−0.25
−1.00
−2.75
−20.00
Unit
°C
°C
°C
°C
°C
°C
°C
°C
°C
°C
°C
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
3. 5
Manufacturer ID register
PCI-SIG ID number of ABLIC Inc. can be read.
B15
0
B14
0
B7
B6
1
0
Address : 06h
R/W :
Read-only
Default : 1C85h
B13
0
B12
1
B11
1
B10
1
B9
0
B8
0
B5
0
B4
0
B3
0
B2
1
B1
0
B0
1
Figure 25
3. 6
Manufacturer ID Register Structure
Device ID / revision register
Device ID and revision number of product can be read.
B15
0
B14
0
B7
B6
0
0
Address : 07h
R/W :
Read-only
Default : 2221h
B13
1
B12
0
B11
0
B10
0
B9
1
B8
0
B5
1
B4
0
B3
0
B2
0
B1
0
B0
1
Figure 26
3. 7
Device ID / Revision Register Structure
Resolution register
Resolution register defines temperature sensor resolution.
B15
0
B14
0
B13
0
B12
0
B11
0
B10
0
B9
0
B8
0
B7
B6
B5
0
0
0
Address : 08h
R/W :
Readable and writable
Default : 0001h
B4
0
B3
0
B2
0
B1
B0
Figure 27
RES[1:0]
Resolution Register Structure
Bit 15 to 2 : −
Unimplemented bit. These bits are always "0".
Bit 1 to 0 : RES[1:0]
These bits define resolution.
The resolution here is reflected by TRES[1:0] value of capacities register.
"00":
LSB = 0.5°C
(tCONV ≤ 30 ms max.)
"01" (default): LSB = 0.25°C (tCONV ≤ 60 ms max.)
"10":
LSB = 0.125°C (tCONV ≤ 125 ms max.)
"11":
LSB = 0.0625°C (tCONV ≤ 125 ms max.)
29
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Reset and Initialization
This IC has a power-on reset circuit which prevents malfunction, cancels write at power-on.
At power-on status, the master device should not transfer the data from the time that the power supply voltage reaches
VDD min. to tINIT. And at power-off, all registers are reset when the power supply voltage drops below VPOFF. Therefore if
the power supply voltage remains below VPOFF for tPOFF, all operations of this IC are reset.
Operating this IC will be required to apply the stable power supply voltage (VDD). The power supply voltage must remain
stable until the end of the transmission of the data and, for a write instruction and temperature conversion time.
tINIT
tPOFF
tINIT
VDD min.
VPON
VPOFF
VDD
Reset status
Figure 28
30
Normal operation
Reset status
Operation when Power Supply Voltage Drops and Power-on
Normal
operation
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Usage
1.
A pull-up resistor to SDA I/O pin and SCL input pin
In consideration of I2C-bus protocol function, the SDA I/O pin and SCL input pin should be connected with a pull-up
resistor. This IC cannot transmit normally without using a pull-up resistor.
In case that the SCL input pin of this IC is connected to the Nch open-drain output pin of the master device, connect
the SCL pin with a pull-up resistor. As well, in case the SCL input pin of this IC is connected to the tri-state output pin
of the master device, connect the SCL pin with a pull-up resistor in order not to set it in "High-Z". This prevents this IC
from error caused by an uncertain output (High-Z) from the tri-state pin when resetting the master device during the
voltage drop.
___________
___________
Pull-up resistor of the EVENT pin is also required to transmit EVENT behavior.
2.
Equivalent circuits of input pin and I/O pin
The SCL pin and the SDA pin of this IC do not have a built-in pull-down or pull-up resistor. Each of the SA0 pin, SA1
pin and SA2 pin has a built-in pull-down resistor. The SDA pin is an open-drain output. The followings are equivalent
circuits of the pins.
SDA
SCL
Figure 29
SCL Pin
Figure 30
EVENT
Figure 31
3.
___________
EVENT Pin
SDA Pin
SA0, SA1, SA2
Figure 32
SA0, SA1, SA2 Pin
Acknowledge check
The I2C-bus protocol includes an acknowledge check function as a handshake function to prevent a communication
error. This function allows detection of a communication failure during data communication between the master
device and this IC. This function is effective to prevent malfunction, so it is recommended to perform an acknowledge
check with the master device.
31
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
4.
SDA pin and SCL pin noise suppression time
This IC includes a built-in low-pass filter at the SDA pin and the SCL pin to suppress noise. If the power supply
voltage is 2.2 V, noise with a pulse width of 75 ns or less can be suppressed.
For details of the assurable value, refer to noise suppression time (tl) in Table 8 in " AC Electrical
Characteristics".
400
300
Noise suppression time
200
(tI) max.
[ns]
100
0
2.0
2.5
3.0
4.0
3.5
Power supply voltage (VDD)
[V]
Figure 33
5.
Noise Suppression Time for SDA Pin and SCL Pin
Operation when inputting stop condition during write
This IC does the E2PROM write operation only when it receives data of 1 byte or more and receives a stop condition
immediately after an acknowledge output.
Refer to Figure 34 for details.
Write valid
by stop condition
Write invalid
by stop condition
S
T
A
DEVICE
R
T SELECT CODE
SDA
LINE
WORD ADDRESS (n)
DATA (n)
1 0 1 0 SA2 SA1 SA0 0
W7W6 W5W4 W3 W2 W1W0
D7 D6 D5 D4 D3 D2 D1 D0
L R A
S / C
BWK
Figure 34
6.
Write invalid
by stop condition
W
R
I
T
E
M
S
B
A
C
K
Write valid
by stop condition
Write invalid
by stop condition
DATA (n + 1)
D7
A
C
K
Write valid
by stop condition
S
T
O
P
DATA (n + x)
D0
D7
A
C
K
D0
A
C
K
Write Operation by Inputting Stop Condition during Write
Command cancel by start condition
By a start condition, users are able to cancel command which is being input. However, users are not able to input a
start condition when this IC is outputting "L". When users cancel the command, there may be a case that the address
will not be identified. Use random read for the read operation, not current address read.
32
2-WIRE SERIAL E2PROM WITH TEMPERATURE SENSOR FOR DIMM SERIAL PRESENCE DETECT
Rev.2.0_00_U
S-34TS04A
Precautions
• Do not operate these ICs in excess of the absolute maximum ratings. Attention should be paid to the power supply
voltage, especially. The surge voltage which exceeds the absolute maximum ratings can cause latch-up and
malfunction. Perform operations after confirming the detailed operation condition in the data sheet.
• Operations with moisture on this IC's pins may occur malfunction by short-circuit between pins. Especially, in
occasions like picking this IC up from low temperature tank during the evaluation. Be sure that not remain frost on this
IC's pin to prevent malfunction by short-circuit.
Also attention should be paid in using on environment, which is easy to dew for the same reason.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement of the
products including this IC upon patents owned by a third party.
33
2.0±0.1
(1.60)
0.5
0.25±0.1
The heat sink of back side has different electric
potential depending on the product.
Confirm specifications of each product.
Do not use it as the function of electrode.
No. PQ008-B-P-SD-1.0
TITLE
DFN-8-B-PKG Dimensions
No.
PQ008-B-P-SD-1.0
ANGLE
UNIT
mm
ABLIC Inc.
ø1.5 +0.1
-0
2.0±0.05
4.0±0.1
0.2±0.05
0.9±0.1
+0.1
ø1.0 - 0
4.0±0.1
2.3±0.1
4 3 21
5 6 78
Feed direction
No. PQ008-B-C-SD-1.0
TITLE
DFN-8- B - C a r r i e r T a p e
PQ008-B-C-SD-1.0
No.
ANGLE
UNIT
mm
ABLIC Inc.
12.5max.
9.2±0.5
Enlarged drawing in the central part
ø13±0.2
No. PQ008-B-R-SD-1.0
DFN-8- B - R e e l
TITLE
PQ008-B-R-SD-1.0
No.
QTY.
ANGLE
UNIT
mm
ABLIC Inc.
4,000
1.6
0.30
0.50
No. PQ008-B-L-SD-1.0
TITLE
DFN-8-B-Land Recommendation
PQ008-B-L-SD-1.0
No.
ANGLE
UNIT
mm
ABLIC Inc.
Disclaimers (Handling Precautions)
1.
All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2.
The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4.
Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5.
Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6.
When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7.
The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8.
The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9.
In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
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