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PMS154C-S08

PMS154C-S08

  • 厂商:

    JSMICRO(杰盛微)

  • 封装:

    SOP-8

  • 描述:

    8位OTP型1O控制器

  • 数据手册
  • 价格&库存
PMS154C-S08 数据手册
PMS154C 8bit OTP Type IO Controller Table of Contents Features ............................................................................................................................. 06 Special Features .................................................................................................................06 1.2. System Features .................................................................................................................06 1.3. CPU Features .....................................................................................................................06 1.4. Package Information ...........................................................................................................06 or 1.1. ct 1. General Description and Block Diagram ........................................................................ 07 3. Pin Definition and Functional Description...................................................................... 08 4. Device Characteristics ..................................................................................................... 13 on du 2. DC/AC Characteristics ........................................................................................................13 4.2. Absolute Maximum Ratings .................................................................................................14 4.3. Typical IHRC Frequency vs. VDD (calibrated to 16MHz) .....................................................15 4.4. Typical ILRC Frequency vs. VDD ........................................................................................15 4.5. Typical IHRC Frequency vs. Temperature (calibrated to 16MHz) ........................................16 4.6. Typical ILRC Frequency vs. Temperature ...........................................................................16 4.7. Typical Operating Current vs. VDD and CLK=IHRC/n .........................................................17 4.8. Typical Operating Current vs. VDD and CLK=ILRC/n..........................................................17 4.9. Typical Operating Current vs. VDD and CLK=32KHz EOSC / n (reserved) .........................18 4.10. Typical Operating Current vs. VDD and CLK=1MHz EOSC / n............................................18 JS MI CR O  S em ic 4.1. 5. 4.11. Typical Operating Current vs. VDD and CLK=4MHz EOSC / n............................................19 4.12. Typical IO pull high resistance.............................................................................................19 4.13. Typical IO input high/low threshold voltage (VIH/VIL) ............................................................20 4.14. Typical IO driving current (IOH) and sink current (IOL) ...........................................................20 Functional Description ..................................................................................................... 22 5.1. Program Memory – OTP .....................................................................................................22 5.2. Boot-Up ...............................................................................................................................22 5.3. Data Memory – SRAM ........................................................................................................23 5.4. Oscillator and clock .............................................................................................................23 5.4.1. Internal High RC oscillator and Internal Low RC oscillator ......................................23 5.4.2. IHRC calibration .....................................................................................................23 5.4.3. IHRC Frequency Calibration and System Clock ......................................................24 www.jsmsemi.com 第1/82页 PMS154C 8bit OTP Type IO Controller 5.4.4. External Crystal Oscillator.......................................................................................25 5.4.5. System Clock and LVR levels .................................................................................27 16-bit Timer (Timer16).........................................................................................................28 5.6. Watchdog Timer ..................................................................................................................29 5.7. Interrupt Controller ..............................................................................................................30 5.8. Power-Save and Power-Down ............................................................................................33 or 5.5. 5.8.1. Power-Save mode (“stopexe”) ................................................................................33 ct 5.8.2. Power-Down mode (“stopsys”)................................................................................34 5.8.3. Wake-up .................................................................................................................35 IO Pins ................................................................................................................................36 5.10. Reset ..................................................................................................................................37 du 5.9. on 5.10.1. Reset ......................................................................................................................37 5.10.2. LVR reset ...............................................................................................................37 VDD/2 Bias Voltage Generator............................................................................................37 5.12. Comparator .........................................................................................................................38 ic 5.11. em 5.12.1. Internal reference voltage (Vinternal R) ........................................................................38 5.12.2. Using the comparator .............................................................................................41 8-bit Timer with PWM generation (Timer2, Timer3) .............................................................43 CR O 5.13.  S 5.12.3. Using the comparator and band-gap 1.20V ............................................................41 5.13.1. Using the Timer2 to generate periodical waveform .................................................44 5.13.2. Using the Timer2 to generate 8-bit PWM waveform ................................................45 JS MI 5.13.3. Using the Timer2 to generate 6-bit PWM waveform ................................................46 5.14. 11-bit PWM generation........................................................................................................48 5.14.1. PWM Waveform .....................................................................................................48 5.14.2. Hardware and Timing Diagram ...............................................................................48 5.14.3. Equations for 11-bit PWM Generator ......................................................................49 6. IO Registers ....................................................................................................................... 50 6.1. ACC Status Flag Register (flag), IO address = 0x00 ...........................................................50 6.2. Stack Pointer Register (sp), IO address = 0x02 ...................................................................50 6.3. Clock Mode Register (clkmd), IO address = 0x03................................................................50 6.4. Interrupt Enable Register (inten), IO address = 0x04...........................................................51 6.5. Interrupt Request Register (intrq), IO address = 0x05 .........................................................51 6.6. Timer 16 mode Register (t16m), IO address = 0x06 ............................................................52 6.7. External Oscillator setting Register (eoscr, write only), IO address = 0x0a ..........................52 www.jsmsemi.com 第2/82页 PMS154C 8bit OTP Type IO Controller Interrupt Edge Select Register (integs), IO address = 0x0c .................................................53 6.9. Port A Digital Input Enable Register (padier), IO address = 0x0d ........................................53 6.10. Port B Digital Input Enable Register (pbdier), IO address = 0x0e ........................................53 6.11. Port A Data Registers (pa), IO address = 0x10 ...................................................................53 6.12. Port A Control Registers (pac), IO address = 0x11 ..............................................................53 6.13. Port A Pull-High Registers (paph), IO address = 0x12 .........................................................53 6.14. Port B Data Registers (pb), IO address = 0x14 ...................................................................54 6.15. Port B Control Registers (pbc), IO address = 0x15 ..............................................................54 6.16. Port B Pull-High Registers (pbph), IO address = 0x16 .........................................................54 6.17. MISC Register (misc), IO address = 0x08 ...........................................................................54 6.18. Timer2 Control Register (tm2c), IO address = 0x1c.............................................................55 6.19. Timer2 Counter Register (tm2ct), IO address = 0x1d ..........................................................55 6.20. Timer2 Scalar Register (tm2s), IO address = 0x17 ..............................................................55 6.21. Timer2 Bound Register (tm2b), IO address = 0x09 .............................................................56 6.22. Timer3 Control Register (tm3c), IO address = 0x32 ............................................................56 6.23. Timer3 Counter Register (tm3ct), IO address = 0x33 ..........................................................56 6.24. Timer3 Scalar Register (tm3s), IO address = 0x34 ..............................................................57 6.25. Timer3 Bound Register (tm3b), IO address = 0x35 .............................................................57 6.26. Comparator Control Register (gpcc), IO address = 0x18 .....................................................57 6.27. Comparator Selection Register (gpcs), IO address = 0x19 ..................................................58 6.28. PWMG0 control Register (pwmg0c), IO address = 0x20 .....................................................58 6.29. PWMG0 Scalar Register (pwmg0s), IO address = 0x21 ......................................................58 JS MI CR O  S em ic on du ct or 6.8. 6.30. PWMG0 Counter Upper Bound High Register (pwmg0cubh), IO address = 0x24 ...............59 6.31. PWMG0 Counter Upper Bound Low Register (pwmg0cubl), IO address = 0x25 .................59 6.32. PWMG0 Duty Value High Register (pwmg0dth), IO address = 0x22 ...................................59 6.33. PWMG0 Duty Value Low Register (pwmg0dtl), IO address = 0x23 .....................................59 6.34. PWMG1 control Register (pwmg1c), IO address = 0x26 .....................................................59 6.35. PWMG1 Scalar Register (pwmg1s), IO address = 0x27 ......................................................60 6.36. PWMG1 Counter Upper Bound High Register (pwmg1cubh), IO address = 0x2a ...............60 6.37. PWMG1 Counter Upper Bound Low Register (pwmg1cubl), IO address = 0x2b .................60 6.38. PWMG1 Duty Value High Register (pwmg1dth), IO address = 0x28 ...................................60 6.39. PWMG1 Duty Value Low Register (pwmg1dtl), IO address = 0x29 .....................................60 6.40. PWMG2 control Register (pwmg2c), IO address = 0x2c......................................................61 6.41. PWMG2 Scalar Register (pwmg2s), IO address = 0x2d ......................................................61 www.jsmsemi.com 第3/82页 PMS154C 8bit OTP Type IO Controller PWMG2 Counter Upper Bound High Register (pwmg2cubh), IO address = 0x30 ...............61 6.43. PWMG2 Counter Upper Bound Low Register (pwmg2cubl), IO address = 0x31 .................61 6.44. PWMG2 Duty Value High Register (pwmg2dth), IO address = 0x2e ...................................61 6.45. PWMG2 Duty Value Low Register (pwmg2dtl), IO address = 0x2f ......................................62 Instructions ....................................................................................................................... 62 Data Transfer Instructions ...................................................................................................63 7.2. Arithmetic Operation Instructions ........................................................................................66 7.3. Shift Operation Instructions .................................................................................................68 7.4. Logic Operation Instructions ................................................................................................69 7.5. Bit Operation Instructions ....................................................................................................71 7.6. Conditional Operation Instructions.......................................................................................73 7.7. System control Instructions .................................................................................................75 7.8. Summary of Instructions Execution Cycle ...........................................................................76 7.9. Summary of affected flags by Instructions ...........................................................................77 on du ct or 7.1. ic 7. 6.42. Code Options .................................................................................................................... 78 9. Special Notes .................................................................................................................... 79 em 8. Warning...............................................................................................................................79 9.2. Using IC ..............................................................................................................................79  S 9.1. CR O 9.2.1. IO pin usage and setting .........................................................................................79 9.2.2. Interrupt ..................................................................................................................79 9.2.3. System clock switching ...........................................................................................80 JS MI 9.2.4. Watchdog ...............................................................................................................80 9.2.5. TIMER16 time out ...................................................................................................80 9.2.6. IHRC Calibration .....................................................................................................80 9.2.7. LVR ........................................................................................................................80 9.2.8. Instructions .............................................................................................................81 9.2.9. BIT definition...........................................................................................................81 9.2.10. Program writing ......................................................................................................81 9.3. Using ICE ............................................................................................................................82 www.jsmsemi.com 第4/82页 PMS154C 8bit OTP Type IO Controller Major Differences between PMS154B and PMS154C Function PMS154B PMS154C 1 Operating voltage range 2.2V ~ 5.5V 1.8V ~ 5.5V One Set : Three Sets: 2 11-bit PWM PWMG0 PWMG0, PWMG1 & PWMG2 JS MI CR O  S em ic on du ct or Item www.jsmsemi.com 第5/82页 PMS154C 8bit OTP Type IO Controller 1. Features 1.1. Special Features  Please don’t apply to AC RC step-down powered, high power ripple or high EFT requirement application  Operating temperature range: -20°C ~ 70°C 1.2. System Features or  2KW OTP program memory  128 Bytes data RAM ct  One hardware 16-bit timer  Two hardware 8-bit timer with PWM generators du  Three hardware 11-bit PWM generators  Provide one hardware comparator on  14 IO pins with optional pull-high resistor  Three different IO driving capability groups to meet different application requirement  Optional IO driving capability for each port:normal drive and low drive ic  Every IO pin can be configured to enable wake-up function  Built-in half VDD bias voltage generator to provide maximum 4x10 dots LCD display 1 em  Clock sources: IHRC, ILRC & EOSC(XTAL mode, 32KHz Reserved )  For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast  Two external interrupt pins CR O 1.3. CPU Features  S  Eight levels of LVR: 4.0V, 3.5V, 3.0V, 2.75V, 2.5V, 2.2V, 2.0V, 1.8V  One processing unit operating mode  86 powerful instructions JS MI  Most instructions are 1T execution cycle  Programmable stack pointer and adjustable stack level  Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of Indirect addressing mode  IO space and memory space are independent 1.4. Package Information  PMS154C series ◎ PMS154C-U06: SOT23-6 (60mil) ◎ PMS154C-S08: SOP8 (150mil) ◎ PMS154C-M10: MSOP10 (118mil) ◎ PMS154C-S14: SOP14 (150mil) ◎ PMS154C-S16: SOP16 (150mil) ◎ PMS154C-D16: DIP16 (300mil) ◎ PMS154C-1J16A: QFN3*3-16pin (0.5pitch) www.jsmsemi.com 第6/82页 PMS154C 8bit OTP Type IO Controller 2. General Description and Block Diagram The PMS154C is an IO-Type, fully static, OTP-based controller; it employs RISC architecture and most the instructions are executed in one cycle except that few instructions are two cycles that handle indirect memory access. 2KW OTP program memory and 128 bytes data SRAM are inside, one hardware 16-bit timer, two hardware 8-bit timers with PWM generation (Timer2, Timer3) and Three hardware 11-bit timers with PWM generation (PWMG0,1,2) is also included, PMS154C also supports one hardware comparator and VDD/2 bias JS MI CR O  S em ic on du ct or voltage generator for LCD display application. www.jsmsemi.com 第7/82页 PMS154C 8bit OTP Type IO Controller 3. Pin Definition and Functional Description 1 16 PB3/PG2PWM PB5/TM3PWM/PG0PWM 2 15 PB2/TM2PWM/PG2PWM PB6/TM3PWM/CIN2-/PG1PWM 3 14 PB1 PB7/TM3PWM/CIN3-/PG1PWM 4 13 PB0/INT1/COM1 VDD 5 12 GND PA7/X1 6 11 PA0/INT0/COM2/CO/PG0PWM PA6/X2 7 10 PA4/COM3/CIN+/CIN4-/PG1PWM PA5/PRST#/PG2PWM 8 9 PA3/TM2PWM/COM4/CIN1-/PG2PWM PMS154C-S16:SOP16 (150mil) JS MI CR O  S em ic on du PMS154C-D16:DIP16 (300mil) ct or PB4/TM2PWM/PG0PWM PMS154C-1J16A: QFN3*3-16pin (0.5pitch) PB5/TM3PWM/PG0PWM 1 14 PB2/TM2PWM/PG2PWM PB6/TM3PWM/CIN2-/PG1PWM 2 13 PB1 PB7/TM3PWM/CIN3-/PG1PWM 3 12 PB0/INT1/COM1 VDD 4 11 GND PA7/X1 5 10 PA0/INT0/COM2/CO/PG0PWM PA6/X2 6 9 PA4/COM3/CIN+/CIN4-/PG1PWM PA5/PRST#/PG2PWM 7 8 PA3/TM2PWM/COM4/CIN1-/PG2PWM PMS154C-S14:SOP14 (150mil) www.jsmsemi.com 第8/82页 PMS154C 8bit OTP Type IO Controller PB7/TM3PWM/CIN3-/PG1PWM 1 10 PB0/INT1/COM1 VDD 2 9 GND PA7/X1 3 8 PA0/INT0/COM2/CO/PG0PWM PA6/X2 4 7 PA4/COM3/CIN+/CIN4-/ PA5/PRST#/PG2PWM 5 6 PA3/TM2PWM/COM4/CIN1-/PG2PW on du ct or PMS154C-M10: MSOP10 (118mil)  S em ic PMS154C-S08: SOP8 (150mil) Pin & Buffer PA7 / X1 Description Type JS MI Pin Name CR O PMS154C-U06: SOT23-6 (60mil) IO ST / CMOS This pin can be used as: (1) Bit 7 of port A. It can be configured as digital input, two-state output with pull-up resistor by software independently. (2) X1 when crystal oscillator is used. When this pin is configured as crystal oscillator function, please use bit 7 of register padier to disable the digital input to prevent current leakage. This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 7 of padier register is “0”. This pin can be used as: (1) Bit 6 of port A. It can be configured as digital input, two-state output with pull-up IO PA6 / ST / X2 CMOS resistor by software independently. (2) X2 when crystal oscillator is used. When this pin is configured as crystal oscillator function, please use bit 6 of register padier to disable the digital input to prevent current leakage. This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 6 of padier register is “0”. www.jsmsemi.com 第9/82页 PMS154C 8bit OTP Type IO Controller Pin Name Pin & Buffer Description Type This pin can be used as: (1) Bit 5 of port A. It can be configured as digital input, open drain output with pull-up resistor by software independently. IO PRST# / ST / PG2PWM CMOS (2) Hardware reset (3) Output of 11-bit PWM generator PWMG2. (ICE does NOT Support.) or PA5 / This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 5 of padier register is “0”. ct Please put 33Ω resistor in series to have high noise immunity when this pin is in input mode. du This pin can be used as: (1) Bit 3 of port A. It can be configured as digital input, two-state output with pull-up CIN+ / CIN4- / ST / CMOS resistor by software independently. on COM3 / IO (2) COM3 to provide (1/2 VDD) for LCD display (3) Plus input source of comparator (4) Minus input source 4 of comparator ic PA4 / PG1PWM (5) Output of 11-bit PWM generator PWMG2 em This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 4 of padier register is “0”.  S This pin can be used as: (1) Bit 3 of port A. It can be configured as digital input, two-state output with pull-up TM2PWM / COM4 / CIN1- / ST / CMOS PA0 / INT0 / PG0PWM / CO / COM2 resistor by software independently. (2) Minus input source 1 of comparator (3) Output of 8-bit Timer2 (TM2) (4) COM4 to provide (1/2 VDD) for LCD display (5) Output of 11-bit PWM generator PWMG2 JS MI PG2PWM IO CR O PA3 / IO ST / CMOS This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 3 of padier register is “0”. This pin can be used as: (1) Bit 0 of port A. It can be configured as digital input, two-state output with pull-up resistor by software independently. (2) External interrupt line 0. Both rising edge and falling edge are accepted to request interrupt service. (3) Output of comparator (4) Output of 11-bit PWM generator PWMG0 (5) COM2 to provide (1/2 VDD) for LCD display This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 0 of padier register is “0”. www.jsmsemi.com 第10/82页 PMS154C 8bit OTP Type IO Controller Pin Name Pin & Buffer Description Type This pin can be used as: (1) Bit 7 of port B. It can be configured as digital input, two-state output with pull-up IO TM3PWM / ST / CIN3- / CMOS PG1PWM resistor by software independently. (2) Minus input source 3 of comparator. (3) Output of 8-bit timer Timer3 (TM3) or PB7 / (4) Output of 11-bit PWM generator PWMG1 This pin can be used to wake-up system during sleep mode; however, wake-up ct function is also disabled if bit 7 of pbdier register is “0”. This pin can be used as: IO TM3PWM / ST / CIN2- / CMOS PG1PWM resistor by software independently. (2) Minus input source 2 of comparator. on PB6 / du (1) Bit 6 of port B. It can be configured as digital input, two-state output with pull-up (3) Output of 8-bit timer Timer3 (TM3) (4) Output of 11-bit PWM generator PWMG1 ic This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 6 of pbdier register is “0”. PG0PWM ST / CMOS (1) Bit 5 of port B. It can be configured as digital input, two-state output with pull-up resistor by software independently.  S PB5 / TM3PWM / IO em This pin can be used as: (2) Output of 8-bit timer Timer3 (TM3) (3) Output of 11-bit PWM generator PWMG0 CR O This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 5 of pbdier register is “0”. This pin can be used as: JS MI IO PB4 / TM2PWM / PG0PWM ST / CMOS (1) Bit 4 of port B. It can be configured as digital input, two-state output with pull-up resistor by software independently. (2) Output of 8-bit timer Timer2 (TM2) (3) Output of 11-bit PWM generator PWMG0 This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 4 of pbdier register is “0”. This pin can be used as: IO PB3 / ST / PG2PWM CMOS (1) Bit 3 of port B. It can be configured as digital input, two-state output with pull-up resistor by software independently. (2) Output of 11-bit PWM generator PWMG2 This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 3 of pbdier register is “0”. www.jsmsemi.com 第11/82页 PMS154C 8bit OTP Type IO Controller Pin Name Pin & Buffer Description Type This pin can be used as: TM2PWM / PG2PWM ST / CMOS resistor by software independently. (2) Output of 8-bit timer Timer2 (TM2) (3) Output of 11-bit PWM generator PWMG2 or PB2 / (1) Bit 2 of port B. It can be configured as digital input, two-state output with pull-up IO This pin can be used to wake-up system during sleep mode; however, wake-up This pin can be used as: PB1 ST / CMOS (1) Bit 1 of port B. It can be configured as digital input, two-state output with pull-up resistor by software independently. du IO ct function is also disabled if bit 2 of pbdier register is “0”. This pin can be used to wake-up system during sleep mode; however, wake-up This pin can be used as: on function is also disabled if bit 1 of pbdier register is “0”. (1) Bit 0 of port A. It can be configured as digital input, two-state output with COM1 pull-up resistor by software independently. ST / CMOS ic INT1 / IO (2) External interrupt line 1. Both rising edge and falling edge are accepted to request interrupt service. em PB0 / (3) COM1 to provide (1/2 VDD) for LCD display  S This pin can be used to wake-up system during sleep mode; however, wake-up function is also disabled if bit 0 of pbdier register is “0”. Positive power GND Ground CR O VDD ST: Schmitt Trigger input; CMOS: CMOS voltage level JS MI Notes: IO: Input/Output; www.jsmsemi.com 第12/82页 PMS154C 8bit OTP Type IO Controller 4. Device Characteristics 4.1. DC/AC Characteristics All data are acquired under the conditions of VDD=3.3V, fSYS=2MHz unless noted. 1.8* 5.5 V Low Voltage Reset tolerance -5 5 % fSYS System clock (CLK)* = IHRC/2 IHRC/4 IHRC/8 ILRC 0 0 0 8M 4M 2M VPOR Power On Reset Voltage Operating Voltage Typ 70K 1.9 2.0 2.1 0.3 on 10 ic IPD 12 Operating Current Power Down Current 0.5 (by stopsys command) Power Save Current (by stopexe command) VIL *Disable IHRC Input low voltage for IO lines CR O Input high voltage for IO lines IOL IOH VIN IINJ (PIN) RPH fIHRC 0 0.2 VDD 0 0.7 VDD 0.1 VDD VDD 10 *PA6,PA7,PB0,PB1,PB3,PB4,PB7 6 *PA5 *Others 2 IO lines drive current (normal) -5 IO lines drive current (low) uA fSYS=EOSC=32KHz@3V (reserved) uA fSYS= 0Hz, VDD =3.3V uA VDD =3.3V PA5 V other IO mA VDD=3.3V, VOL=0.33V mA VDD=3.3V, VOH=2.97V -1.6 -0.3 VDD + 0.3 1 Injected current on pin Pull-high Resistance Interrupt pulse width V mA fSYS=IHRC/16=1MIPS@3V uA fSYS=ILRC=70KHz@3V mA VDD=3.3V, VOL=0.33V 200 15.84* 16.16* 15.20* 16.80* 16* 13.60* tINT Hz IO lines sink current (low) 5 Frequency of IHRC after calibration * VDD ≧ 3.5V VDD ≧ 2.5V VDD ≧ 1.8V VDD = 3V 5 *PA5 Input voltage * Subject to LVR tolerance IO lines sink current (normal) *PA0,PA3,PA4,PB2,PB5,PB6 JS MI VIH 5  S IPS em IOP o Conditions(Ta=25 C) or Unit LVR% Min ct Max VDD Description du Symbol 30 www.jsmsemi.com V mA VDD +0.3≧VIN≧ -0.3 KΩ VDD=3.3V o VDD=5V, Ta=25 C VDD =2.0V~5.5V, MHz -20oC
PMS154C-S08 价格&库存

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