ESD5Z7V
ESD5Z7V
1-Line, Uni-directional, Transient Voltage Suppressors
http//:www.sh-willsemi.com
Descriptions
The ESD5Z7V is a TVS (Transient Voltage Suppressor)
designed to protect sensitive electronic components which
are connected to power lines, low speed data lines and
transmission
lines
from
over-stress
caused by ESD
(Electrostatic Discharge), EFT (Electrical Fast Transients)
SOD-523
and surge.
The ESD5Z7V may be used to provide ESD protection up to
±30kV (contact discharge) according to IEC61000-4-2, and
withstand peak pulse current up to 9.5A (8/20μs) according
Pin1
to IEC61000-4-5.
Pin2
The ESD5Z7V is available in SOD-523 package. Standard
products are Pb-free and Halogen-free.
Features
Stand-off voltage: 7V Max
Transient protection for each line according to
Circuit diagram
IEC61000-4-2 (ESD): ±30kV (contact and air discharge)
IEC61000-4-4 (EFT): 80A (5/50ns)
IEC61000-4-5 (surge): 9.5A (8/20μs)
Capacitance: CJ = 47pF typ.
Low leakage current
Low clamping voltage
Solid-state silicon technology
Applications
Computers and peripherals
Cellular handsets
Microprocessors
Power lines
Portable Electronics
Notebooks
Will Semiconductor Ltd.
*
1
J
J
= Device code
*
= Month code
2
Marking & Pin configuration (Top View)
Order information
1
Device
Package
Shipping
ESD5Z7V-2/TR
SOD-523
3000/Tape&Reel
Revision 3.0, 2014/07/11
ESD5Z7V
Absolute maximum ratings
Parameter
Symbol
Rating
Unit
Peak pulse power (tp = 8/20μs)
PPK
171
W
Peak pulse current (tp = 8/20μs)
IPP
9.5
A
ESD according to IEC61000-4-2 air discharge
±30
VESD
ESD according to IEC61000-4-2 contact discharge
Operation junction temperature
±30
125
o
TL
260
o
TSTG
-55~150
o
TJ
Lead temperature
Storage temperature
kV
C
C
C
Electrical characteristics (TA = 25oC, unless otherwise noted)
I
IPP
VF
Forward voltage
VRWM Reverse stand-off voltage
IF
Forward current
IR
Reverse leakage current
VFC
Forward clamping voltage
VBR
Reverse breakdown voltage
IPP
Peak pulse current
VCL
Clamping voltage
IPP
Peak pulse current
VFC VF
IBR
IR
VRWM VBR VCL
V
IF
IPP
Definitions of electrical characteristics
Will Semiconductor Ltd.
2
Revision 3.0, 2014/07/11
ESD5Z7V
o
Electrical characteristics (TA = 25 C, unless otherwise noted)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
7
V
1
µA
Reverse stand-off voltage
VRWM
Reverse leakage current
IR
VRWM = 7V
Reverse breakdown voltage
VBR
IBR = 1mA
7.5
10
V
Forward voltage
VF
IF = 20mA
0.55
1.25
V
IPP = 1A, tp = 8/20μs
12
V
IPP = 9.5A, tp = 8/20μs
18
V
65
pF
Clamping voltage
1)
VCL
Junction capacitance
CJ
VR = 0V, f = 1MHz
47
Notes:
1)
Non-repetitive current pulse, according to IEC61000-4-5.
110
100
90
80
70
60
50
40
30
20
10
0
100
90
Front time: T1= 1.25 × T = 8µs
Time to half-value: T2= 20µs
Current (%)
Peak pulse current (%)
Typical characteristics (TA = 25oC, unless otherwise noted)
T2
10
0
5
T
T1
10
15 20 25
Time (µs)
30
35
8/20μs waveform per IEC61000-4-5
Will Semiconductor Ltd.
30ns
40
tr = 0.7~1ns
60ns
t
Time (ns)
Contact discharge current waveform per IEC61000-4-2
3
Revision 3.0, 2014/07/11
ESD5Z7V
o
Typical characteristics (TA = 25 C, unless otherwise noted)
13
50
12
11
10
9
f = 1MHz
45
Junction capacitance (pF)
VC - Clamping voltage (V)
Pulse waveform: tp = 8/20µs
40
35
30
25
20
8
0
1
15
2
3 4 5 6 7 8 9 10
IPP - Peak pulse current (A)
Clamping voltage vs. Peak pulse current
0
1
2
3
4
5
6
VR - Reverse voltage (V)
Capacitance vs. Reveres voltage
7
1000
100
% of Rated power
Peak pulse power (W)
100
10
80
60
40
20
1
0
1
10
100
Pulse time (µs)
1000
0
25
50
75
100
125
TA - Ambient temperature (oC)
Non-repetitive peak pulse power vs. Pulse time
Power derating vs. Ambient temperature
ESD clamping
ESD clamping
(+8kV contact discharge per IEC61000-4-2)
(-8kV contact discharge per IEC61000-4-2)
Will Semiconductor Ltd.
150
4
Revision 3.0, 2014/07/11
ESD5Z7V
Package outline dimensions
SOD-523
Symbol
Dimensions In Millimeters
Min.
Typ.
Max.
A
0.510
--
0.770
A1
0.500
--
0.700
b
0.250
0.300
0.350
c
0.080
--
0.150
D
0.750
0.800
0.850
E
1.100
1.200
1.300
E1
1.500
1.600
1.700
E2
L
0.200 REF.
0.010
--
θ
0.070
o
7 REF.
Recommend Land Pattern (Unit: mm)
0.60
Notes:
0.70
This recommended land pattern is for reference
purposes only. Please consult your manufacturing
group to ensure your PCB design guidelines are met.
1.40
Will Semiconductor Ltd.
5
Revision 3.0, 2014/07/11
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