COS1177/2177/4177
36V, Precision
Low-Noise Operational Amplifiers
Features
General Description
■
Low Offset Voltage: 50µV (Max.)
The COS1177 (single), COS2177 (dual) and
■
Low Drift: 0.2µV/ºC
COS4177 (quad) are low power, precision
■
Low Input Bias Current: 2nA (Max.)
operational amplifiers operated on ±2.25V to
■
Gain Bandwidth Product: 2MHz
±18V supplies. The COSx177 family has very
■
Wide Supply Range:±2.25V ~ ±18V
low input offset voltage (50μV) maximum that is
■
Low Quiescent Current: 330µA
obtained by trimming at the wafer stage. These
■
Slew Rate: 0.7V/µs
low offset voltages generally eliminate any
■
Unity Gain Stable
need for external nulling. The COSx177 also
■
Input Over-Voltage Protection
features low input bias current and high
■
Extended Temperature Ranges
open-loop gain. The low offset and high
From -40°C to +125°C
open-loop gain make the COSx177 particularly
Small Packaging
useful
COS1177 available in SOP8/MSOP8
applications.
■
for
high
gain
instrumentation
COS2177 available in SOP8/MSOP8
COS4177 available in SOP14/TSSOP14
The wide input voltage range of ±13 V
minimum combined with a high CMRR of
Applications
125dB and high input impedance provide high
accuracy in the noninverting circuit config-
■
Sensors and Controls
uration. Excellent linearity and gain accuracy
■
Precision Filters
can be maintained even at high closed-loop
■
Data Acquisition
gains. Stability of offsets and gain with time or
■
Medical Instrumentation
variations in temperature is excellent. The
■
Optical Network Control Circuits
accuracy and stability of the COSx177, even at
■
Wireless Base Station Control Circuits
high gain, combined with the freedom from
external nulling have made the COSx177 an
Rev1.0
Copyright@2018 Cosine Nanoelectronics Inc. All rights reserved
ideal choice for instrumentation applications.
The information provided here is believed to be accurate and reliable. Cosine Nanoelectronics assumes
no reliability for inaccuracies and omissions. Specifications described and contained here are subjected
to change without notice on the purpose of improving the design and performance. All of this information
described herein should not be implied or granted for any third party.
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COS1177/2177/4177
1. Pin Configuration and Functions
COS1177
COS2177
COS4177
Pin Functions
Name
Description
Note
A bypass capacitor of 0.1μF as close to the part as
Positive power supply
possible should be placed between power supply pins
or between supply pins and ground.
Negative power supply If it is not connected to ground, bypass it with a
or ground
capacitor of 0.1μF as close to the part as possible.
Inverting input of the amplifier. Voltage range of this
Negative input
pin can go from -Vs to +Vs
Non-inverting input of the amplifier. This pin has the
Positive input
same voltage range as -IN.
The output voltage range extends to within millivolts
Output
of each supply rail.
+Vs
-Vs
-IN
+IN
OUT
NC
No connection
2. Package and Ordering Information
Model
Channel
COS1177
1
COS2177
2
COS4177
4
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Order Number
Package
Package Option
Marking
Information
COS1177SR
SOP-8
Tape and Reel, 3000
COS1177
COS1177MR
MSOP-8
Tape and Reel, 3000
COS1177
COS2177SR
SOP-8
Tape and Reel, 3000
COS2177
COS2177MR
MSOP-8
Tape and Reel, 3000
COS2177
COS4177SR
SOP-14
Tape and Reel, 3000
COS4177
COS4177TR
TSSOP-14
Tape and Reel, 3000
COS4177
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COS1177/2177/4177
3. Product Specification
3.1 Absolute Maximum Ratings (1)
Parameter
Power Supply: +Vs to -Vs
Differential Input Voltage Range
Common Mode Input voltage Range(2)
Output Current
Storage Temperature Range
Junction Temperature
Operating Temperature Range
ESD Susceptibility, HBM
Rating
Units
36
V
±0.5
V
-Vs to +Vs
V
50
mA
-65 to 150
°C
150
°C
-40 to 125
°C
2000
V
(1) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute
maximum ratings are stress ratings only.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the
supply rails should be current-limited to 10mA or less.
3.2 Thermal Data
Parameter
Rating
Unit
Package Thermal Resistance
190 (SOT23-5)
206 (MSOP8)
155 (SOP8)
105 (TSSOP14)
82 (SOP14)
°C/W
Rating
Unit
DC Supply Voltage
±2.5V ~ ±18V
V
Input common-mode voltage range
-Vs+1 ~ +Vs-1
V
-40 to +85
°C
3.3 Recommended Operating Conditions
Parameter
Operating ambient temperature
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COS1177/2177/4177
3.4 Electrical Characteristics
(+VS=+15V, -VS=-15V, TA=+25°C, RL=10kΩ to VS/2, unless otherwise noted)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
±15
±50
μV
0.2
0.7
μV/°C
Input Characteristics
Input Offset Voltage
VOS
Input Offset Voltage Drift
ΔVOS/ΔT
Input Bias Current
IB
±0.5
±2
nA
Input Offset Current
IOS
±0.2
±1
nA
Common-Mode Voltage Range
VCM
±13
±14
V
Common-Mode Rejection Ratio
CMRR
120
125
dB
Open-Loop Voltage Gain
AOL
100
120
dB
+14
+14.1
V
-40 to 125°C
RL ≥ 2kΩ, VO = ±10V
Output Characteristics
Output Voltage High
VOH
Output Voltage Low
VOL
Output Current
IOUT
Short-Circuit Current
ISC
-14.1
VDROPOUT < 1.2 V
-13.9
V
±10
mA
±28
mA
Power Supply
Operating Voltage Range
±2.5
Power Supply Rejection Ratio
PSRR
Quiescent Current / Amplifier
IQ
120
±18
130
330
V
dB
430
μA
Dynamic Performance
Gain Bandwidth Product
GBWP
CL=100pF, RL=10kΩ
2.0
MHz
Slew Rate
SR
CL=100pF, RL=10kΩ,
Av=1
0.7
V/μs
en
f=1kHz
8.0
nV/√Hz
Noise Performance
Voltage Noise Density
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COS1177/2177/4177
4.0 Application Notes
Driving Capacitive Loads
Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the
load capacitance increases, the feedback loop’s phase margin decreases, and the closed loop
bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and
ringing in the step response. A unity gain buffer (G = +1) is the most sensitive to capacitive loads, but
all gains show the same general behavior.
When driving large capacitive loads with these op amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (RISO in Figure 1) improves the feedback loop’s phase margin (stability) by
making the output load resistive at higher frequencies. It does not, however, improve the bandwidth.
To select RISO, check the frequency response peaking (or step response overshoot) on the bench. If
the response is reasonable, you do not need RISO. Otherwise, start RISO at 1 kΩ and modify its value
until the response is reasonable.
RISO
VOUT
VIN
CL
Figure 1. Indirectly Driving Heavy Capacitive Load
An improvement circuit is shown in Figure 2. It provides DC accuracy as well as AC stability. RF
provides the DC accuracy by connecting the inverting signal with the output, CF and RISO serve to
counteract the loss of phase margin by feeding the high frequency component of the output signal
back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop.
Figure 2. Indirectly Driving Heavy Capacitive Load with DC Accuracy
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COS1177/2177/4177
For noninverting configuration, there are two others ways to increase the phase margin: (a) by
increasing the amplifier’s gain or (b) by placing a capacitor in parallel with the feedback resistor to
counteract the parasitic capacitance associated with inverting node, as shown in Figure 3.
Figure 3. Adding a Feedback Capacitor in the Noninverting Configuration
Power-Supply Bypassing and Layout
The COSx177 operates from a single +5V to +36V supply or dual ±2.5V to ±18V supplies. For
single-supply operation, bypass the power supply +Vs with a 0.1μF ceramic capacitor which should
be placed close to the +Vs pin. For dual-supply operation, both the +Vs and the -Vs supplies should
be bypassed to ground with separate 0.1μF ceramic capacitors. 2.2μF tantalum capacitor can be
added for better performance.
The length of the current path is directly proportional to the magnitude of parasitic inductances and
thus the high frequency impedance of the path. High speed currents in an inductive ground return
create an unwanted voltage noise. Broad ground plane areas will reduce the parasitic inductance.
Thus a ground plane layer is important for high speed circuit design.
Typical Application Circuits
Differential Amplifier
The circuit shown in Figure 4 performs the differential function. If the resistors ratios are equal (R4 /
R3 = R2 / R1), then VOUT = (VIP – VIN) × R2 / R1 + VREF.
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COS1177/2177/4177
R2
R1
VIN
VOUT
VIP
R3
R4
VREF
Figure 4. Differential Amplifier
Low Pass Active Filter
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is
often required. The simplest way to establish this limited bandwidth is to place an RC filter at the
noninverting terminal of the amplifier. If even more attenuation is needed, a multiple pole filter is
required. The Sallen-Key filter can be used for this task, as Figure 5. For best results, the amplifier
should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to follow this
guideline can result in reduction of phase margin. The large values of feedback resistors can couple
with parasitic capacitance and cause undesired effects such as ringing or oscillation in high-speed
amplifiers. Keep resistors value as low as possible and consistent with output loading consideration.
Figure 5. Two-Pole Low-Pass Sallen-Key Active Filter
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COS1177/2177/4177
5. Package Information
5.1 SOP8 (Package Outline Dimensions)
5.2 MSOP8 (Package Outline Dimensions)
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COS1177/2177/4177
5.3 SOP14 (Package Outline Dimensions)
5.4 TSSOP14 (Package Outline Dimensions)
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