MD1621/2/4
3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MINGDA
MICROELECTRONICS
FEATURES
PRODUCT DESCRIPTION
⚫
⚫
Low Cost
Rail-to-Rail Input and Output
0.8mV Typical VOS
⚫
⚫
⚫
⚫
⚫
Unity Gain Stable
Gain-Bandwidth Product: 3MHz
Very Low Input Bias Current: 10pA
Supply Voltage Range: 1.8V to 5.5V
Input Voltage Range:
-0.1V to +5.6V with (VDD - VSS) = 5.5V
Low Supply Current: 200μA/Amplifier
Small Packaging
MD1621 Available in SOT-23-5
MD1622 Available in SOIC-8
MD1624 Available in SOIC-14
The MD1621 (single), MD1622 (dual) and MD1624
(quad) are low cost, rail-to-rail input and output voltage
feedback amplifiers. They have a wide input common
mode voltage range and output voltage swing, and take
the minimum operating supply voltage down to 1.8V.
The maximum recommended supply voltage is 5.5V. It
is specified over the extended -40 ℃ to +85 ℃
temperature range.
⚫
⚫
The MD1621/2/4 provide 3MHz bandwidth at a low
current consumption of 200μA per amplifier. Very low
input bias currents of 10pA enable MD1621/2/4 to be
used for integrators, photodiode amplifiers, and
piezoelectric sensors. Rail-to-rail input and output are
useful to designers for buffering ASIC in single-supply
systems.
APPLICATIONS
⚫
ASIC Input or Output Amplifier
⚫
Sensor Interface
⚫
Piezoelectric Transducer Amplifier
⚫
Medical Instrumentation
⚫
Mobile Communication
⚫
Audio Output
⚫
Portable Systems
⚫
Smoke Detectors
⚫
Notebook PC
⚫
PCMCIA Cards
⚫
Battery-Powered Equipment
⚫
DSP Interface
Applications for this series of amplifiers include safety
monitoring, portable equipment, battery and power
supply control, and signal conditioning and interfacing
for transducers in very low power systems.
The MD1621 is available in the Green SOT-23-5
Package. The MD1622 comes in the Green SOIC-8
package. The MD1624 comes in the Green SOIC-14
package.
PIN CONFIGURATIONS (TOP VIEW)
1
VSS
2
VIN-
3
VOUTA 1
MD1622
MD1621
VIN+
MD1624
5 VDD
4 VOUT
SOT-23-5
14 VOUTD
VOUTA 1
8 VDD
VINA-
2
13 VIND-
VINA-
2
7 VOUTB
VINA+
3
12 VIND+
VINA+
3
VDD
4
11 VSS
VSS
4
6 VINB5 VINB+
VINB+
5
10 VINC+
VINB-
6
9 VINC-
SOIC-8
VOUTB 7
8 VOUTC
SOIC-14
MD Micro Corp
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REV. A. 1.1
1
3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
ORDER INFORMATION
PACKAGE
MODEL
ORDER NUMBER
MARKING
PACKAGE OPTION
DESCRIPTION
INFORMATION
MD1621
--
SOT23-5
Tape and Reel, 3000
--
MD1622
--
SOIC-8
Tape and Reel, 4000
--
MD1624
--
SOIC-14
Tape and Reel, 4000
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD to VSS...............................................................6V
Common Mode Input Voltage…...................VSS - 0.3V to VDD + 0.3V
Storage Temperature Range.......................................-65℃ to +150℃
Junction Temperature...................................................................150℃
Operating Temperature Range......................................-40℃ to +85℃
Package Thermal Resistance @ TA = +25℃
SOIC-8, θJA....................................................................125 ℃/W
Lead Temperature (Soldering 10sec)................................260 ℃
NOTE:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
ESD, Electrostatic Discharge Protection
Symbol
2
Parameter
HBM
Human Body Model ESD
MM
Machine Model ESD
Condition
Minimum Level
Unit
4
kV
300
V
MD Micro Corp
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are At TA=25℃, VDD = +5V, VSS = GND,
RL = 100kΩ connected to VDD/2, and VOUT = VDD/2.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
INPUT CHARACTERISTICS
VCM = VDD/2
Input Offset Voltage
VOS
VCM = VDD/2
0.8
●
5
mV
6.6
Input Bias Current
IB
10
pA
Input Offset Current
IOS
10
pA
ΔVOS/ΔT
2
μV/℃
-0.1-5.6
V
VDD = 5.5V, VCM = -0.1V to 4V
76
dB
RL = 100kΩ, VOUT = 2.5V
120
dB
RL = 100kΩ, VOUT = +0.2V to +4.8V
119
dB
Input Offset Voltage Drift
Input Common Mode Voltage Range
Common Mode Rejection Ratio
VCM
CMRR
Open-Loop Voltage Gain
AOL
VDD = 5.5V
OUTPUT CHARACTERISTICS
VOH
RL = 100kΩ
4.980
4.995
V
VOL
RL = 100kΩ
25
5
mV
VOH
RL = 10kΩ
4.970
4.994
V
VOL
RL = 10kΩ
35
6
mV
Output Voltage Swing from Rail
ISOURCE
Output Current
90
RL = 10Ω to VDD/2
mA
ISINK
90
POWER SUPPLY
1.8
Operating Voltage Range
Power Supply Rejection Ratio
●
PSRR
V
1.8
VDD = +1.8V to +5.5V, VCM = +0.5V
5.5
85
dB
200
Quiescent Current/Amplifier
IQ
●
120
V
μA
270
DYNAMIC PERFORMANCE (CL = 100pF)
Gain-Bandwidth Product
GBP
3
MHz
Phase Margin
PM
RL = 100kΩ, CL = 100pF
45
°
HD2
f = 10kHz, G = +1, RL=100k,VOUT=2VPP
80
HD3
f = 10kHz, G = +1, RL=100k,VOUT=2VPP
80
Harmonic Distortion
dBc
Slew Rate
SR
G = +1, 2V Output Step
1.8
V/μs
Settling Time to 0.1%
ts
G = +1, 2V Output Step
6
μs
VIN·G = VDD
2
μs
f = 1kHz
20
nV/√Hz
f = 10kHz
12
nV/√Hz
Overload Recovery Time
NOISE PERFORMANCE
Voltage Noise Density
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
TYPICAL PERFORMANCE CHARACTERISTICS
At TA = +25℃, VDD = +5V, VSS = GND, and RL = 100kΩ connected to VDD/2, unless otherwise specified.
200
0.25
180
160
Supply Current (uA)
0.2
VCM=VDD/2
0.15
0.1
0.05
140
120
100
80
60
40
20
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
5.5
-40
-20
0
Input Voltage (V)
Figure 1. Supply Current vs. Supply Voltage
40
60
80
100
120
140
Figure 2. Supply Current vs. Temperature
140
140
Source
120
120
Sink
Open-Loop Gain (dB)
Output Short Circuit Current (mA)
20
Temperature (℃)
100
80
Sink
60
Source
40
100
80
60
40
20
20
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-40
5.5
-20
0
20
40
60
80
100
120
Input Voltage (V)
Temperature (℃)
Figure 3. Output Short Circuit Current vs. Supply Voltage
Figure 4. Open-Loop Gain vs. Temperature
140
100
120
90
100
80
70
PSRR (dB)
CMRR (dB)
80
60
40
50
40
30
VDD=5.5V
0V≤VCM≤4V
20
20
10
0
0
-40
4
60
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100
Temperature (℃)
Temperature (℃)
Figure 5. CMRR vs. Temperature
Figure 6. PSRR vs. Temperature
120
140
MD Micro Corp
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
TYPICAL PERFORMANCE CHARACTERISTICS
At TA = +25℃, VDD = +5V, VSS = GND, and RL = 100kΩ connected to VDD/2, unless otherwise specified.
90%
80%
80%
70%
+OS
-OS
Small-Signal Overshoot
Small-Signal Overshoot
70%
60%
50%
40%
30%
20%
-OS
50%
40%
30%
20%
G=-1
RFB=10kΩ
10%
G=+1
10%
+OS
60%
0%
0%
1
10
100
1000
1
10
Load Capacitance(pF)
Figure 7. Small-Signal Overshoot vs. Load Capacitance
1000
Figure 8. Small-Signal Overshoot vs. Load Capacitance
5
2.5
VDD=+5V
4.5
Source
Sink
2
3.5
Output Voltage (V)
4
Output Voltage (V)
100
Load Capacitance(pF)
Source
Sink
3
2.5
2
1.5
1
VDD=+1.8V
1.5
1
0.5
0.5
0
0
0
20
40
60
80
0
2
4
Output Current (mA)
6
8
10
Output Current (mA)
Figure 9. Output Voltage vs. Output Current
Figure 10. Output Voltage vs. Output Current
6
VDD=+5.5V
Maximum Output Voltage (VPP)
Voltage Noise (nV/√Hz)
10000
1000
100
10
1
0.01
5
VDD=+5V
4
3
2
VDD=+1.8V
1
0
0.1
1
10
100
Frequency (kHz)
Figure 11. Input Voltage Noise Spectral Density vs. Frequency
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1
10
100
1000
10000
Frequency (Hz)
Figure 12. Maximum Output Voltage vs. Frequency
5
3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
TYPICAL PERFORMANCE CHARACTERISTICS
At TA = +25℃, VDD = +5V, VSS = GND, and RL = 100kΩ connected to VDD/2, unless otherwise specified
G=-5
Offset=2.5V
G=-5
Offset=2.5V
Offset=2.5V
Figure 13. Positive Overload Recovery Time
Offset=2.5V
Figure 14. Negative Overload Recovery Time
Offset=2.5V
Figure 15. Phase Reversal
Figure 16. Large-Signal Step Response
G=+1
G=-1
Offset=2.5V
Offset=2.5V
RFB=10kΩ
Figure 17. Small-Signal Step Response
6
Figure 18. Small-Signal Step Response
MD Micro Corp
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
TYPICAL PERFORMANCE CHARACTERISTICS
At TA = +25℃, VDD = +5V, VSS = GND, and RL = 100kΩ connected to VDD/2, unless otherwise specified.
120
200
100
PSRR
90
100
150
40
50
20
0
0
PSRR and CMRR(dB)
100
60
Open-Loop Phase(°)
Open-Loop Gain (dB)
CMRR
80
80
70
60
50
40
30
20
-50
-20
10
-40
0.01
-100
0.1
1
10
100
0
0.01
1000
0.1
Frequency (kHz)
1
10
100
1000
Frequency (kHz)
Figure 19. Gain and Phase vs. Frequency
Figure 20. CMRR and PSRR vs. Frequency
120
1000
100
80
Zol(ohms)
Channel Separation(dB)
100
60
40
10
1
0.1
20
0
0.01
0.1
1
10
100
Frequency (kHz)
Figure 21. Channel Separation vs. Frequency
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1000
0.01
0.01
0.1
1
10
100
1000
Frequency (kHz)
Figure 22. Zol vs. Frequency
7
3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
APPLICATION INFORMATION
MD1621/2/4 are CMOS, rail-to-rail input and output voltage
VDD
feedback amplifiers designed for general purpose applications.
RISO
Operating Voltage
VP
The MD1621/2/4 are specified over a power-supply range of
MD1622
VOUT
CL
+1.8V to +5.5V (±0.9V to ±2.75V), Supply voltages higher
than 6V (absolute maximum) can permanently damage the
Figure 23. Driving Large Capacitive Loads
amplifier.
loop’s phase margin (stability) by making the output load
Parameters that vary over supply voltage or temperature are
resistive at higher frequencies.
shown in the typical characteristics section of this datasheet.
PCB Surface Leakage
Rail-to-Rail Input
In Applications where low input bias current is critical, PC
The input stage of the amplifiers is a true rail-to-rail
board surface leakage effects need to be considered. Surface
architecture, allowing the input common-mode voltage range
leakage is caused by humidity, dust or other contamination on
of the op amp to extend to both positive and negative supply
the board. Under low humidity conditions, a typical resistance
rails. This maximizes the usable voltage range of the amplifier,
between nearby traces is 1012Ω. A 5V difference would cause
an important feature for single-supply and low voltage
5pA of current to flow; which is similar to the MD1621/2/4 op
applications. This rail-to-rail input range is achieved with a
amps’ bias current at +25℃ (±10pA, typical).
complementary input stage—an NMOS input differential pair
The best way to reduce surface leakage is to use a guard ring
in parallel with a PMOS differential pair. The NMOS pair is
around sensitive pins (or traces). The guard ring is biased at
active at the upper end of the common-mode voltage range,
the same voltage as the sensitive pin. An example of this type
typically VDD – 1.2V to 100mV above the positive supply,
of layout is shown in Figure 24.
while the PMOS pair is active for inputs from 100mV below
1.
the negative supply to approximately VDD – 1.2V.
Non-inverting Gain and Unity-Gain Buffer:
a)
Rail-to-Rail Output
with a wire that does not touch the PCB surface.
A class AB output stage with common-source transistors is
b)
used to achieve rail-to-rail output. The maximum output
proximity of the output voltage to the supply rail. This is a
characteristic of all rail-to-rail output amplifiers. See the
Connect the guard ring to the inverting input pin
(VIN-). This biases the guard ring to the Common
voltage swing is proportional to the output current, and larger
currents will limit how close the output voltage can get to the
Connect the non-inverting pin (VIN+) to the input
Mode input voltage.
2.
Inverting Gain and Transimpedance Gain Amplifiers
(convert current to voltage, such as photo detectors):
a)
Connect the guard ring to the non-inverting input
typical performance characteristic Figure 9, Output Voltage
pin (VIN+). This biases the guard ring to the same
Swing vs. Output Current.
reference voltage as the op amp (e.g., VDD/2 or
Capacitive Loads
ground).
The MD1621/2/4 op amps can directly drive large capacitive
b)
Connect the inverting pin (VIN-) to the input with a
loads. As the load capacitance increases, the feedback loop’s
wire that does not touch the PCB surface.
phase margin decreases and the closed-loop’s bandwidth is
Guard Ring
reduced. This produces gain peaking in the frequency
VIN-
VIN+
VSS
response, with overshoot and ringing in the step response.
While a op amp in unity gain configuration (G = +1 V/V) is
most susceptible to the effects of capacitive loading.
When driving large capacitive loads with the MD1621/2/4
amplifiers (e.g., > 100pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 23) improves the feedback
8
Figure 24. Example Guard Ring Layout for Inverting Gain
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
TYPICAL APPLICATION
Differential Amplifier
excessive output offset. In addition, a resistor is not needed on
The circuit shown in Figure 25 performs the difference function.
the noninverting input to cancel bias current offset because
If the resistor ratios are equal to (R4 / R3 = R2 / R1), then VOUT =
the bias current-related output offset is not significant when
(VP - VN) × R2 / R1 + VREF.
compared to the voltage offset contribution. For best
performance, follow the standard high impedance layout
R2
techniques, which include the following:
VDD
R1
VN
VP
VOUT
MD1622
R3
R4
2.5VREF
⚫
Shielding the circuit.
⚫
Cleaning the circuit board.
⚫
Putting a trace connected to the noninverting input
around the inverting input.
⚫
Using separate analog and digital power supplies.
C
100pF
Figure 25. Differential Amplifier
Photodiode Application
R
10MΩ
The MD1621/2/4 have very high impedance with an input bias
current typically around 10 pA. This characteristic allows the
VDD
OR
MD1621/2/4 op amp to be used in photodiode applications and
VOUT
MD1622
other applications that require high input impedance. Note that
the MD1621/2/4 have significant voltage offset that can be
removed by capacitive coupling or software calibration.
Figure 26 illustrates a photodiode or current measurement
application. The feedback resistor is limited to 10 MΩ to avoid
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2.5VREF
2.5VREF
Figure 26. High Input Impedance Application—Photodiode
Amplifier
9
3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
RECOMMENDED MOUNTING METHOD
Soldering Methods, Recommended Soldering Method for Moisture-Proof Packing and Flux Cleaning are in the following
Mounting was evaluated with the following profiles in our company, so there was no problem. However, confirm mounting by the
condition of your company beforehand.
1.Soldering Temperature Profile of Reflow
Recommended reflow soldering temperature profile is in the following
2.Soldering Temperature Profile of Flow
Recommended flow soldering temperature profile is in the following.
3.Soldering Temperature Profile of Iron
Recommended iron soldering temperature profile is in the following.
At 1 lead
Temperature: Lower than 350°C
Time: within 3s
4.Note
It is not good for IC's reliability to keep IC high temperature for long time within limit of recommended ranges.
Please finish soldering as soon as possible within limit of recommended ranges.
See the next section, “IC storage Conditions and Duration” for Moisture-Proof Packing and Deaeration Packing.
10
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
PACKAGE OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARD MS-012-AA
Figure 27 8-Lead Small Outline Package [SOIC]
Dimensions shown in millimeters
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
PACKAGE OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARD MO-178-AA
Figure 28 5-Lead Small Outline Transistor Package [SOT-23]
Dimensions shown in millimeters
12
MD Micro Corp
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3MHz, 200μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
MD1621/2/4
PACKAGE OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARD MS-012-AB
Figure 29 14-Lead Small Outline Package [SOIC]
Dimensions shown in millimeters
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