LP3352QVF

LP3352 Preliminary Datasheet 6-Channel LED Driver for Backlights General Description Features LP3352 is a cost effective LED driver optimized for media size LCD backlighting application. It provides a high performance LED backlight solution with minimized bill of material count.      LP3352 have a high performance boost converter with integrated 2.5A/40V power MOS. The boost structure which uses current mode control and fixed frequency operation to regulate the LED current. The 6-CH sink current can be adjusted through an external resistor. In addition, the LP3352 offers external frequency PWM dimming method for a wide range of dimming control. Other features include over current protection (OCP), output over voltage protection (OVP), and under-voltage lockout (UVLO). The LP3352 is available in a space saving QFN-16 (0.5mm pitch) package. Applications Order Information LP3352 □□□ Wide VIN Range: 2.7V to 24V Current-Mode Boost Converter Integrated 2.5A/40V boost power MOS Built-in Internal Current soft-start Six programmable current sinks  Current up to 30mA per channel  PWM dimming from 100Hz to 30kHz  2.5% current matching  3% current accuracy  LED string open/short detection  Under-Voltage Lockout  Over Voltage Protection  Over Current Protection  Over-Temperature Protection  Available in QFN-16 (3mm×3mm)  RoHS Compliant and Halogen Free  Pb-Free Package F: Green Package Type QV: QFN-16    Notebook LED Backlight TFT LCD Monitor LED Backlight Tablet Display Backlight Marking Information Device Marking Package Shipping LP3352 LPS QFN-16 5K/REEL LP3352 YWX Y: Y is year code. W: W is week code. X: X is series number. LP3352 Version 0.2 AUG-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 10 LP3352 Preliminary Datasheet Typical Application Circuit L1 10uH VIN CIN 22uF Rin 10Ω Cin 10uF CVL 100nF ROUT 100Ω LX IN PGND EN CTRL VL EN PWM VOUT COUT 4.7uF OUT CH1 CH6 LED Lighting ISET RISET 62kΩ LP3352 Figure 1. Typical Application Circuit of LP3352 Pin Configuration PGND 1 LX 2 VIN 3 OUT 4 NC EN 16 15 CH6 CH5 14 13 EP 12 CH4 11 CTRL 10 AGND 9 5 ISET 6 7 CH3 8 VL CH1 CH2 Figure 2. QFN-16 Package Top View LP3352 Version 0.2 AUG-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 10 LP3352 Preliminary Datasheet Function Block Diagram IN VL UVLO Internal Regulator EN Control Logic CTRL SCP OSC OCP OTP Dimming Control LX Boost GND PGND OUT CH1 OVP LED Sink Current Current Setting CH6 ISET Figure 3. Function Block Diagram Functional Pin Description Pin NO. Pin Name 1 PGND 2 LX Boost Regulator Switching Node. Connect the inductor and the schottky diode to LX. 3 IN Input Supply Pin. Decouple with 10μF ceramic capacitor close to the pin. 4 OUT Output Voltage Sense Pin. 5 ISET LED Current Set Pin. Connect external resistor between this pin to gnd. 6 VL 7 CH1 LED string current sink channel 1. 8 CH2 LED string current sink channel 2. 9 CH3 LED string current sink channel 3. 10 AGND Analog Ground. 11 CTRL External PWM Dimming Control Pin. 12 CH4 LED string current sink channel 4. 13 CH5 LED string current sink channel 5. 14 CH6 LED string current sink channel 6. 15 EN Enable Pin. 16 NC No Connection. 17 EP Exposed thermal pad. Connect to AGND or PGND. LP3352 Version 0.2 AUG-2018 Description Power Ground. Regulator Output Pin. Connect a ceramic capacitor between VL and GND. Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 10 LP3352 Preliminary Datasheet Absolute Maximum Ratings Note 1  VIN to GND -------------------------------------------------------------------------------------------------------- −0.3V to +27V  CH1~CH6, LX, OUT to GND --------------------------------------------------------------------------------- −0.3V to +40V  EN, CTRL to GND ----------------------------------------------------------------------------------------------- −0.3V to +27V  VL, ISET to GND ------------------------------------------------------------------------------------------------- −0.3V to +7V  Operating Junction Temperature Range (TJ)  Operation Ambient Temperature Range -------------------------------------------------------------- −40°C to +85°C  Storage Temperature Range ---------------------------------------------------------------------------- −65°C to +150°C  Maximum Soldering Temperature (at leads, 10sec) ----------------------------------------------- +260°C  Maximum Junction Temperature ----------------------------------------------------------------------- +150°C ------------------------------------------------------ −40℃ to +150℃ Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Information  Thermal Resistance QFN-16, θJA --------------------------------------------------------------------------------------------------- 88°C/W QFN-16, θJC -------------------------------------------------------------------------------------------------- 39°C/W Recommended Operating Conditions  Input Voltage, VIN ------------------------------------------------------------------------------------------------- 2.7V to 24V  LED Current per Channel, ILED ------------------------------------------------------------------------------- 3mA to 30mA  Junction Temperature, TJ -------------------------------------------------------------------------------------- -40°C to 125°C  Ambient temperature, TA --------------------------------------------------------------------------------------- -40°C to 85°C LP3352 Version 0.2 AUG-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 4 of 10 LP3352 Preliminary Datasheet Electrical Characteristics (VIN=12V, VEN=VCTRL=3V, TA=25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units 24 V General Input Supply Voltage VIN Internal Voltage Output VL VIN Supply Current IQ VOUT Input Current IQ_OUT Input UVLO Threshold VUVLO UVLO Threshold Hysteresis VUVLO(H) Current Soft Start Time TSS Thermal Shutdown Threshold TSD Thermal Shutdown Hysteresis ∆TSD 2.7 VIN=12V 5 V Shutdown Current 2 18 uA Operation Current 2.5 3 mA 30 uA VIN Rising 2.6 V Falling Hysteresis 100 mV 1 ms Temperature Rising 140 160 180 15 °C °C Logic Control (EN, CTRL) 1.5 VIH V EN/CTRL Threshold Voltage VIL EN/CTRL Logic Sink Current Dimming Frequency ILS 0.4 VEN=VCTRL=3V 15 FDIM 100 FOSC 0.8 V uA 30k Hz 1 1.2 MHz 250 450 mΩ 1 uA Boost Regulator Internal Oscillator Frequency Switch On Resistance RDS(ON) LX Leakage current ILeak_LX Maximum Duty Cycle DMAX Minimum Duty Cycle DMIN LP3352 Version 0.2 AUG-2018 EN=L, VLX=35V Email: marketing@lowpowersemi.com 85 93 % 70 ns www.lowpowersemi.com Page 5 of 10 LP3352 Preliminary Datasheet Electrical Characteristics (Continued) (VIN=12V, VEN=VCTRL=3V, TA=25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ 600 700 Max Units LED Current Regulation Minimum Regulation Voltage of CHx CHx Leakage Current ILeak_CHx EN=L, VCHx=20V CHx Maximum Current ILED_MAX VIN>2.7, CHx>0.7V ISET Voltage VISET ISET to ICHx Current Ratio KISET ICHx Current Accuracy ILED ICHx Current Matching mV 3 uA 30 mA 1.204 1.229 1.253 V ISET=20uA 970 1000 1030 A/A ISET=20uA 19.4 20 20.6 mA 1 2.5 % 39 40 V (IMAX-IMIN)/IAVG, ILED=20mA Protection Threshold VOUT Over Voltage Protection VO_OVP VOUT Over Voltage Protection Hysteresis VO_OVP(H) CHx Over Voltage Protection VCH_OVP LP3352 Version 0.2 AUG-2018 Threshold of OVP 38 1 Threshold of OVP Email: marketing@lowpowersemi.com 15 17 V 20 www.lowpowersemi.com V Page 6 of 10 LP3352 Preliminary Datasheet Power On/ Off Sequence VIN EN VOUT 2ms 2ms 2ms 35ms CTRL Figure 4. Power Sequence LP3352 Version 0.2 AUG-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 10 LP3352 Preliminary Datasheet Application Information The LP3352 is designed in a current mode, constant frequency PWM boost converter. It can use dimming input that can by external control signal with a duty ratio of 1%-100% in 100Hz to 30kHz. The LP3352 include a boost converter with a built-in 2.5A/40V power MOS, six LED string current sink regulators of up to 30mA per channel, LED string open and short detection, output over-current protection, over-voltage protection, and over-temperature protection. Under Voltage Lockout (UVLO) The LP3352 had an UVLO internal circuit that enable the device once the voltage on the VIN voltage exceeds the UVLO threshold voltage. Soft Start To ensure a LED flash and low input inrush current can be control, the chip features a built-in soft-start current controller. Boost Controller The LP3352 uses 1MHz fixed-frequency, current mode architecture to fixed the output current. The output voltage automatically adjusts its voltage to the LED forward voltage to improve performance. Boost Over Current Protection The internal power MOS switch current is monitored cycle-by-cycle and current limited value not exceed 2.5A(Typ.). When the inductor current exceeds the current limit, the switching will turns off immediately. It prevents large current damaging the external component. Output Over Voltage Protection The LP3352 converter has an over voltage protection by VOUT pin. When the LEDs fail open circuit or LEDs are disconnected from the circuit, the over voltage function will monitor the output voltage through VOUT pin to protect the converter. When LP3352 Output occur OVP, it will close LX function. LED Current Setting The LED current is specified by current sense resistor between the ISET pin to ground. In order to have accurate LED current, precision resistors are preferred. The LED current can be programmed by: ILED=( VISET /RISET)x KISET Dimming Control The LED brightness is controlled by the PWM signal at CTRL pin which has different duty cycle. LP3352 can accept an external PWM signal to CTRL pin in the range of 100Hz to 30kHz. LP3352 Version 0.2 AUG-2018 Input Capacitor Selection For better input bypassing, low-ESR ceramic capacitors are recommended for performance. A 20μF input capacitor is sufficient for most applications. For a lower output power requirement application, this value can be decreased. Boost Diode Selection To achieve high efficiency, Schottky diode is good choice for low forward drop voltage and fast switching time. The output diode rating should be able to handle the maximum output voltage, average power dissipation and the pulsating diode peak current. Output Capacitor Selection For lower output voltage ripple, low-ESR ceramic capacitors are recommended. The tantalum capacitors can be used as well, but the ESR is bigger than ceramic capacitor. The output voltage ripple consists of two components: one is the pulsating output ripple current flows through the ESR, and the other is the capacitive ripple caused by charging and discharging. VRIPPLE = VRIPPLE(ESR) +VRIPPLE(C) ≅ IPEAK ×RESR + IPEAK VOUT -VIN COUT VOUT ×FOSC Inductor Selection For a better efficiency in high switching frequency converter, the inductor selection has to use a proper core material such as ferrite core to reduce the core loss and choose low ESR wire to reduce copper loss. The most important point is to prevent the core saturated when handling the maximum peak current. Using a shielded inductor can minimize radiated noise in sensitive applications. The maximum peak inductor current is the maximum input current plus the half of inductor ripple current. The calculated peak current has to be smaller than the current limitation in the electrical characteristics. Depending on the application, the recommended inductor value is between 4.7μH to 10μH. Over Temperature Protection The LP3352 device enters over temperature protection(OTP) if its junction temperature exceeds 160°C (Typ.). During over temperature protection none of the device's functions are available. To resume normal operation the junction temperature need cool down, and the outputs will restart. Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 8 of 10 LP3352 Preliminary Datasheet Application Information (Continued) LED Open Protection If one of the LED strings is open at any time, the boost converter output voltage rises to the OVP threshold during the start-up period before the LP3352 auto-detect the open LED string. The controller removes the open CHx pin and continues to regulate current for the other strings. LED Short Protection If there are several shorted LEDs in one string, that total voltage will smaller than other LED strings and the voltage on the affected CHx pin will be higher than on the other CHx pins. If any CHx pin voltage exceeds CHx OVP threshold, the IC turns off the corresponding current sink and removes this CHx pin from regulation loop, the other CHx pins’ current regulation is not affected. This state will keep until the chip is power restart or EN cycled. Layout Guideline The proper PCB layout and component placement are critical for all circuit. The careful attention should be prevent electromagnetic interference (EMI) problems. Here are some suggestions to the layout of LP3352 design. 1. Connected all ground together with one uninterrupted ground plane with at least two vias . 2. The input capacitor should be located as closed as possible to the VIN and ground plane. 3. Minimize the distance of all traces connected to the LX node, that the traces short and wide route to obtain optimum efficiency. 4. All output capacitor must be closed to ground plane. The ground terminal of COUT must be located as closed as possible to ground plane. 5. Radiated noise can be decreased by choosing a shielded inductor. VIN CIN NC EN CH6 16 15 14 13 L PGND 1 Cin ROUT 10 AGND OUT 4 9 CH3 5 ISET RISET COUT 11 CTRL EP VIN 3 6 7 8 CH2 VL CH1 CVL Diode LX 2 Rin CH5 12 CH4 VOUT GND GND Figure 5. Recommended PCB Layout Diagram . LP3352 Version 0.2 AUG-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 9 of 10 LP3352 Preliminary Datasheet Outline Information QFN-16 Package (3×3) pitch 0.5 (Unit: mm) E2 E D Ne L LPS LP3352 YWX e D2 Nd h 2 h b A A1 C SYMBOL A LP3352 Version 0.2 AUG-2018 1 DIMENSION IN MILLIMETER MIN NOM MAX 0.700 0.750 0.800 A1 --- 0.020 0.050 b 0.180 0.250 0.300 C 0.180 0.200 0.250 D 2.900 3.000 3.100 D2 1.550 1.650 1.750 E 2.900 3.000 3.100 E2 1.550 1.650 1.750 e 0.500 BSC Nd 1.500 BSC Ne 1.500 BSC L 0.350 0.400 0.450 h 0.200 0.250 0.300 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 10 of 10