PDL0504S1-T6B0

ESD Protection Diode PDL0504S1-T6B0 Description Features The PDL0504S1-T6B0 is a 2-line ultra-low capacitance TVS diode array, utilizing leading monolithic silicon technology to provide fast response time and low ESD clamping voltage, making this device an ideal solution for protecting voltage sensitive high-speed data lines. The PDL0504S1-T6B0 has a very low capacitance with a typical value at 0.3pF, and complies with the IEC 61000-4-2(ESD) standard with ±18kV air and ±18kV contact discharge. It is assembled into a leadfree SOT-143 package. The small size, very low capacitance and high ESD surge protection make PDL0504S1-T6B0 an ideal choice to protect cell phone, digital video interfaces, high speed data ports, and many other portable applications.  Ultra low capacitance: 0.3pF typical  Ultra low leakage：nA level  Operating voltage：5V  Low clamping voltage  4-pin SOT-143 package  Protects two data lines and one power line  Complies with following standards: – IEC 61000-4-2 (ESD) immunity test Air discharge: ±18kV Contact discharge: ±18kV – IEC61000-4-4 (EFT) 40A (5/50ns) – IEC61000-4-5 (Lightning) 4A (8/20µs)  RoHS Compliant Mechanical Characteristics Applications  Package: SOT-143  Lead Finish: Matte Tin  Case Material: “Green” Molding Compound.  UL Flammability Classification Rating 94V-0  Moisture Sensitivity: Level 3 per J-STD-020  Terminal Connections: See Diagram Below  Marking Information: See Below         Dimensions and Pin Configuration Marking Information Cellular Handsets and Aceessories Notebooks and Handhelds Personal Digital Assistants Portable Instrumentation Digital Cameras Peripherals Audio Players, Keypads, Side Keys, LCD USB 2.0 Pin 4 4 1 Pin 2 Pin 3 R05 2 3 Pin 1 Circuit Diagram Pin Schematic Ordering Information Part Number Marking Packaging Reel Size PDL0504S1-T6B0 R05 3000/Tape & Reel 7 inch www.pdwsemi.com 1 -5 © 2022 PDW, Inc. Specifications are subject to change without notice. Revised: 2022/04/08 ESD Protection Diode PDL0504S1-T6B0 Absolute Maximum Ratings (TA=25°C unless otherwise specified) Parameter Symbol Value Unit Peak Pulse Power(8/20µs) Ppk 60 W Peak Pulse Current(8/20µs) IPP 4 A ESD per IEC 61000−4−2 (Air) ±18 VESD ESD per IEC 61000−4−2 (Contact) Operating Temperature Range Storage Temperature Range ±18 kV TJ −55 to +125 °C Tstg −55 to +150 °C Electrical Characteristics (TA=25°C unless otherwise specified) Parameter Reverse Working Voltage Punch-Through Voltage Symbol Min Typ VRWM VBR Max Unit 5 V Any I/O pin to ground V IT = 1mA, any I/O pin to ground 0.5 µA VRWM = 5V, any I/O pin to ground 6 Reverse Leakage Current IR Clamping Voltage VC 11 V IPP = 1A (8 x 20µs pulse), any I/O pin to ground Clamping Voltage VC 15 V IPP = 4A (8 x 20µs pulse), any I/O pin to ground Junction Capacitance CJ 0.4 pF VR=0, f=1MHz, between I/O pins Junction Capacitance CJ 0.8 pF VR=0, f=1MHz, any I/O pin to ground www.pdwsemi.com 0.01 Test Condition 0.3 2 -5 © 2022 PDW, Inc. Specifications are subject to change without notice. Revised: 2022/04/08 ESD Protection Diode PDL0504S1-T6B0 Peak Pulse Power_Ppp (W) Junction Capacitance_Cj (pF) Typical Performance Characteristics (TA=25℃ unless otherwise Specified) 0 0.01 0 1 2 3 4 Reverse Voltage_VR (V) 5 0.1 1 10 100 1000 Pulse Duration_tp (us) Peak Pulse Power vs. Pulse Time Junction Capacitance vs. Reverse Voltage 120 % of Rated Power 100 80 60 40 20 0 0 25 50 75 100 125 Ambient Temperature_Ta(℃) 150 ESD Clamping Voltage Power Derating Curve 8 kV Contact per IEC61000−4−2 25 100 Clamping Voltage_Vc (V) % of Peak Pulse Current 90 80 70 60 50 40 30 20 10 15 10 5 0 0 0 20 40 Time_t(uS) 60 80 0 1 2 3 4 Peak Pulse Current_Ipp (A) 8 X 20uS Pulse Waveform www.pdwsemi.com 20 Clamping Voltage vs. Peak Pulse Current 3 -5 © 2022 PDW, Inc. Specifications are subject to change without notice. Revised: 2022/04/08 ESD Protection Diode PDL0504S1-T6B0 PDL0504S1-T6B0 on USB Port Application The PDL0504S1-T6B0 tvs can be used to protect the USB port on the monitors, computers, peripherals or portable systems. The ESD protection scheme for single USB ports is shown below figure ,the voltage bus(VBUS) of USB port is connected to the power pin (pin4) of tvs YL0504S1-T6B0. Each data line (D+/D-) of USB port is connected to the ESD protection pin (pin2/pin3) of tvs YL0504S1-T6B0. When ESD voltage pulse appears on the data line, the ESD pulse current will be conducted by tvs YL0504S1-T6B0 away from the USB controller chip. In addition, the ESD pulse current also can be conducted by tvs YL0504S1-T6B0 away from the USB controller chip when the ESD voltage pulse appears on the voltage bus (VBUS) of USB port. Therefore, the data lines (D+/D-) and voltage bus (VBUS) of two USB ports are complementally protected with one YL0504S1-T6B0. YL0504S1-T6B0 www.pdwsemi.com 4 -5 © 2022 PDW, Inc. Specifications are subject to change without notice. Revised: 2022/04/08 ESD Protection Diode PDL0504S1-T6B0 SOT-143 Package Outline Drawing D A e H e/2 4 3 GAUGE PLANE SEATING PLANE B C 1 c DIM MIN 0.25 E E1 0 DETAIL A L L1 2 bxN e1 bbb C A B SIDE VIEW A2 A 4X SEE DETAIL A A A1 A2 b b1 c D E E1 e e1 L L1 N 0 aaa bb b ccc .031 .000 .02 9 .011 .029 .003 .11 0 .082 .047 .01 5 0° DIMENSIONS INCHES MILLIMETERS NOM MAX MIN NOM MAX .03 5 .114 .093 .05 1 .075 .00 8 .02 0 (.021) 4 .00 6 .00 8 .00 4 .048 .006 .04 2 .020 .037 .008 .120 .104 .055 0.80 0.013 0.75 0.30 0.76 0.08 2.80 2.10 1.20 .02 4 0.40 8° 0° 0.90 2.90 2.37 1.30 1.92 BSC 0.20 BSC 0.50 (0.54) 4 0.15 0.20 0.10 1.22 0.15 1.07 0.51 0.94 0.20 3.04 2.64 1.40 0.60 8° ccc C SEATING PLANE b1 A1 aaa C C A B Suggested Land Pattern X1 X1 SYM C E1 E2 Y Z C E1 G E2 Y X2 www.pdwsemi.com DIMENSIONS MILLIMETERS INCHES 2.20 0.087 1.92 0.076 1.72 0.068 G 0.80 0.031 X1 1.00 0.039 X2 Y Z 1.20 1.40 3.60 0.047 0.055 0.141 X1 5 -5 © 2022 PDW, Inc. Specifications are subject to change without notice. Revised: 2022/04/08