CONSONANCE
Linear SuperCapacitor Charger IC With Cell Balancing
CN3125
General Description:
Features:
The CN3125 is a complete constant-current /constant
voltage linear charger IC to charge single cell or
2-cell superCapacitors from a power supply of 2.7V
to 6V. The device contains an on-chip power
MOSFET and eliminates the need for the external
sense resistor and blocking diode. Thermal feedback
regulates the charge current to limit the die
temperature during high power operation or high
ambient temperature. The regulation voltage is
externally set by a resistor divider. The charge
current can be set externally with a single resistor.
An internal active balancing circuit maintains equal
voltages across each supercapacitor. When the input
supply is removed, the CN3125 automatically enters
a low power sleep mode, dropping the supercapacitor
current to less than 3uA.
Other features include chip enable, undervoltage
lockout and supercapacitor power good indicator.
The CN3125 is available in a thermally enhanced
8-pin SOP package.
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Operating Voltage Range: 2.7V to 6V
On-chip Power MOSFET
No external Blocking Diode or Current Sense
Resistors Required
Constant Voltage is set by External Resistors
Charge Current is set by an external resistor
Continuous Charge Current Up to 1.5A
Automatic Cell Balancing to Prevent
Suercapacitors Overvoltage During Charging
Constant-Current/Constant-Voltage Operation
with Thermal Regulation to Maximize Charge
Rate Without Risk of Overheating
Automatic Low-Power Sleep Mode When Input
Supply Voltage is Removed
Indication for Supercapacitor Power Good
Chip Enable
Available in eSOP8 Package
Pb-free, rohs-Compliant and Halogen Free
Pin Assignment
Applications:
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Electric Meter
SuperCap Backup Circuit
PC Card, USB Modems
Portable Equipments
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Typical Application Circuit
Figure 1 Typical Application Circuit(Charge 2 series-connected Supercapacitors)
Figure 2 Application Circuit(Charge Single-cell Supercapacitor)
In Figure 1 and 2,
⚫ R3 is for LED current limiting and should be chosen based on LED brightness.
⚫ R4 can be 100 ohm with the size of 0603 or 0402.
⚫ C2 and C3 are 1uF with the size of 0603, respectively.
⚫ For the other components selection, please refer to the section of Application Information in this Datasheet.
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Ordering Information:
Part No.
CN3125
Package
eSOP8
Shipping
Operating Temperature Range
Tape and Reel, 4000/Reel
-40℃ to +85℃
Block Diagram
Figure 3 Block Diagram
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Pin Description
Pin No.
Name
1
CE
Function Description
Chip Enable Pin. A high input will put the device in the normal operating
mode. Pulling the CE pin to low level will put the CN3125 into disable mode.
When disabled, the whole device is turned off.
The CE pin can be driven by TTL or CMOS logic level.
Constant Charge Current Setting and Charge Current Monitor Pin. The
2
ISET
3
GND
4
5
6
charge current is set by connecting a resistor RISET from this pin to GND.
When in constant current charge mode, the ISET pin’s voltage is regulated to
1.205V. In all modes during charging, the voltage on ISET pin can be used to
measure the charge current as follows:
ICH = (VISET/RISET)×986
Ground Terminal (Ground).
VIN
Positive Input Supply Voltage. VIN is the power supply to the internal circuit.
When VIN drops to within 10mv of the TOP pin voltage, CN3125 enters low
power sleep mode, dropping TOP and MID pins’ current to less than 3uA.
TOP
The Positive Terminal Connection Pin of Top Supercapacitor. The charge
current is delivered from this pin to supercapacitors. If two supercapacitors are
charged, the top one’s positive terminal should be connected to TOP pin; If
only one supercapacitor is charged, then it is tied between TOP pin and GND.
MID
The Connection Pin for the Middle of the 2 Supercapacitors. The negtive
terminal of the top supercapacitor is connected to this pin, and also the positive
terminal of the bottom supercapacitor is connected to this pin.
Open Drain Power Good Output. When the supercapacitors’ voltage rises
above 94.1% of the final regulation voltage set by the external resistor divider,
this pin becomes low to indicate that the supercapacitor is ready to provide
power. When the supercapacitors’ voltage falls below 90% of the regulation
7
8
FB
9
Exposed PAD
voltage, the
pin outputs high impedance.
When CN3125 is disabled or in sleep mode,
pin outputs high impedance.
Supercapacitor Voltage Feedback Pin.The regulation voltage in constant
voltage mode is set by an external resistor divider connected at FB pin.
Soldered to GND.
Absolute Maximum Ratings
All Terminal Voltage……………-0.3V to 6.5V
TOP Short-Circuit Duration………...Continuous
MID Short-Circuit Duration………...Continuous
Thermal Resistance (eSOP8)……………….TBD
Maximum Junction Temperature………....150℃
Operating Temperature………....-40℃ to 85℃
Storage Temperature….............-65℃ to 150℃
Lead Temperature(Soldering, 10s)…….....260℃
Stresses beyond those listed under ‘Absolute Maximum Ratings’ may cause permanent damage to the device. These are stress
ratings only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of
the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect
device reliability.
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Electrical Characteristics
(VIN=5V, TA=-40℃ to 85℃, Typical Values are measured at TA=25℃,unless otherwise noted)
Parameters
Symbol
Test Conditions
Min
Typ
Max
Input Supply Voltage
VIN
Operating Current
VCE=5.0V, Normal operation
370
Sleep Mode Current
IVIN
ISLP
Sleep mode, VIN current
Shutdown Current
Ioff
VCE=0V, Measure VIN current
Undervoltage Lockout
Vuvlo
Undervoltage Lockout
Hysteresis
Huvlo
Soft Start Time
tSS
FB Regulation Voltage
VREGFB
FB Leakage Current
IFB
TOP pin Current
ICC
ILEAK
2.7
RISET=1.18K, VFB=1.0V
570
uA
1.5
2.95
4.4
uA
1.5
2.95
4.4
uA
2.4
2.65
V
200
320
1.193
1.205
900
1000
Sleep mode or Disabled VCE=low
V
440
uS
1.217
V
100
nA
1100
mA
3
uA
Voltage at pin FB rises
91.6%
94.1%
96.6%
Voltage at pin FB falls
87.5%
90%
92.5%
Maximum Junction
Temperature
TJMAX
Constant Temperature Mode
ISHTOP
Shunt current from VTOP=3V
TOP to MID
VTOP=5V
ISHBOT
VIN=3V
Shunt current from VMID=2V
MID to GND
VIN=5V
VMID=4V
VDROP
470
–100
VPG
Drop Out Voltage
V
0.12
Power Good Threshold
Cell-Balancing Shunt
Current
6.0
VIN falling
Constant Voltage Mode
Unit
℃
130
13
18
26
40
55
77
13
18
26
36
50
70
Measure (VIN–VTOP) @0.5A
0.28
Measure (VIN–VTOP) @1A
0.45
Measure (VIN–VTOP) @1.5A
0.68
VREGFB
mA
V
Sleep Mode
Sleep Mode Threshold
VSLP
VIN from high to low, measures
the voltage (VIN-VTOP)
10
mV
Sleep mode Release
Threshold
VSLPR
VIN from low to high, measures
the voltage (VIN-VTOP)
60
mV
VISET
Constant current mode
Logic Input Low
VCEL
CE voltage falling, Chip disabled
Logic Input High
VCEH
CE voltage rising, Chip enabled
2.2
ICEL
CE=GND, VIN=6V
-1
ICEH
CE=VIN=6V
IPG1
IPG2
VPG=0.3V, VFB>VFBREG×97%
ISET Pin
ISET Pin Voltage
1.183
1.205
1.227
V
0.7
V
CE PIN
CE input Current
V
1
uA
Pin
Sink Current
Leakage Current
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VPG=6V, VFB≤VFBREG×87%
5
10
mA
1
uA
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Detailed Description
The CN3125 is a linear charger IC designed primarily for charging single cell or dual-cell supercapacitors.
Featuring an internal P-channel power MOSFET, the charger uses a constant-current/constant-voltage to charge
the supercapacitors without the need of the external blocking diode and sense resistor. Continuous charge current
can be set up to 1.5A with an external resistor. The supercapacitor’s final regulation voltage or the constant
voltage is also set by an external resistor divider at FB pin, the on-chip reference voltage and error amplifier
provide regulation voltage at pin FB with 1% accuracy which can meet the requirement of supercapacitors. The
internal thermal regulation circuit reduces the programmed charge current if the die temperature attempts to rise
above a preset value of approximately 130℃. This feature protects the CN3125 from excessive temperature, and
allows the user to push the limits of the power handling capability of a given circuit board without risk of
damaging the CN3125 or the external components. Another benefit of adopting thermal regulation is that charge
current can be set according to typical, not worst-case, ambient temperatures for a given application with the
assurance that the charger will automatically reduce the current in worst-case conditions.
The charge cycle begins when the voltage at the VIN pin rises above the UVLO level and above the voltage at
TOP pin, a current set resistor is connected from the ISET pin to ground. At the beginning of the charge cycle,
the charger charges the supercapacitors with a constant-current, which is named constant-current mode. When
the battery approaches the regulation voltage, the charge current begins to decrease as the CN3125 enters the
constant-voltage mode, and the CN3125 will remain in constant-voltage mode as long as the input supply is
present.
The open-drain output
indicates if the supercapacitor voltage has approached its final regulation value. The
will remain in high impedance state until the voltage at pin TOP rises above 94.1% of its final regulation
voltage, and become high impedance again if the voltage falls below 90% of its final regulation voltage.
The on-chip automatic cell balancing function is provided to prevent supercapacitors from overvoltage during
charging, which eliminates the need of the external balancing resistors.
When the input voltage is not present, the charger goes into a sleep mode, dropping the supecapacitors’ drain
current to less than 3uA. This greatly reduces the current drain on the supercapacitors and increases the standby
time.
The charging profile is shown in Figure 4.
Figure 4 Charging Profile
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Application Information
Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors the input voltage and keeps the charger in shutdown mode
until VIN rises above the undervoltage lockout voltage(2.4V typical). The UVLO circuit has a built-in hysteresis
of 0.12V.
Chip Enable/Disable
The CN3125 can be disabled by pulling the CE pin to less than 0.7V. For normal operation, pull the CE pin
above 2.2V. Applying a voltage between 0.7V to 2.2V to this pin may cause larger operating current, and the
CN3125 may be in uncertain state. When the chip is disabled, the internal linear regulator and the power
MOSFET are turned off, the device only consumes 1.7uA current from input supply.
Soft-Start
The CN3125 includes a soft-start circuit to minimize the inrush current at the start of a charge cycle. When a
charge cycle is initiated, the charge current ramps from zero to full-scale over a period of approximately 320us,
this has the effect of minimizing the transient current load on the power supply during start-up.
Sleep mode
There is an on-chip sleep comparator. The comparator keeps the charger in sleep mode if VIN falls below sleep
mode threshold(VTOP+10mv). Once in sleep mode, the charger will not come out of sleep mode until VIN rises
60mv(typical) above the voltage at pin TOP.
In sleep mode, the internal circuits are turned off, TOP pin and MID pin’s current consumption is less than 3uA.
Setting the regulation voltage in constant voltage mode
The final regulation voltage in constant voltage mode at pin TOP can be set by an external resistor divider at FB
pin as shown in Figure 1 and Figure 2, in which resistors R1 and R2 serve the purpose.
The final regulation voltage in constant voltage mode will be given by the following equation:
VREG = 1.205×(1+R1∕R2)
Where,
VREG is in volt
R1 and R2 are in ohm
R1 and R2’s accuracy should be within 1% with the size of 0603 or 0402.
Setting Charge Current
The formula for setting the supercapacitors’ charge current in constant current mode is:
ICH = 1188V / RISET
Where:
ICH is the charge current in ampere
RISET is the total resistance from the ISET pin to ground in ohm
For example, if 1000mA charge current is required, calculate:
RISET = 1188V/1A = 1.18kΩ
For best stability over temperature and time, 1% metal film resistors are recommended. If the charger is in
constant-temperature or constant voltage mode, the charge current can be monitored by measuring the voltage at
ISET pin, and the charge current is calculated as the following equation:
ICH = (VISET / RISET) × 986
Constant-Current/Constant-Voltage/Constant-Temperature
The CN3125 use a unique architecture to charge the supercapacitors in a constant-current, constant-voltage,
constant temperature fashion as shown in Figure 3. Amplifiers Iamp, Vamp, and Tamp are used in three separate
feedback loops to force the charger into constant-current, constant-voltage, or constant-temperature mode,
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respectively. In constant current mode the charge current delivered to the capacitors equal to 1188V/RISET. If the
power dissipation of the CN3125 results in the junction temperature approaching 130℃, the amplifier Tamp will
begin decreasing the charge current to limit the die temperature to approximately 130℃. As the battery voltage
rises, the CN3125 either returns to constant-current mode or it enters constant voltage mode straight from
constant-temperature mode.
Automatic Cell Balancing
Due to manufacturing tolerances, capacitance and leakage current can vary from supercapacitor to
supercapacitor. Without the automatic cell balancing scheme, the voltages across the supercapacitors could differ
from each other and potentially overvoltage a cell. This can affect the performance and lifetime of a
supercapacitor.
The CN3125 constantly monitors the voltage difference across both supercapacitors while charging. When the
voltage across the supercapacitors is equal, both capacitors are charged with equal currents. If the voltage across
one supercapacitor is higher than the other, a voltage-dependent shunt current in parallel with the supercapacitor
begins flowing, hence the higher supercapacitor’s charge current is decreased. Here the voltage-dependent shunt
current means the shunt current is dependent on the input supply voltage, the voltage at TOP pin and MID pin.
Since the shunt current is limited, in some cases it can not balance the capacitors’ voltage if the leakage currents
or capacitances of the two supercapacitors are mismatched largely enough.
When the voltage difference between the 2 supercapacitors is greater than 0.1V, the charge current will be
reduced to 10% of the constant current, so it is easier for the cell balancing block to balance the cell voltage.
However, since the CN3125 is designed to handle slight mismatch of the supercapacitors, not to correct gross
mismatch due to defects. So sometimes there is still risk that the cell voltages can not be balanced due to the
capacitors’ serious mismatch, if this is the case, the external zener diodes in parallel with the supercapacitors are
needed to prevent the supercapacitors from overvoltage.
For example, suppose the constant charge current is 1A, the shunt current of cell balancing is 30mA, then in
constant current mode, 3% mismatch can be corrected; When the voltage difference of the 2 supercapacitors is
over 0.1V, the charge current will be reduced to 100mA, then about 30% mismatch can be corrected. If the
mismatch is over 30%, the external zener diodes in parallel with the supercapacitors are needed, the maximum
current flowing through the zener diodes is 10% of the constant current.
Over Current Protection
The CN3125 has built-in over current protection as well as silicon temperature regulation, which will limit the
maximum charge current to 1.6A(Typical) in some extreme cases including ISET pin being shorted to GND.
Charging a Single-cell Supercapacitor
The CN3125 can be used to charge single-cell supercapacitor by connecting 2 series-connected capacitors with a
capacitance of 1uF from TOP pin to GND and an 100 ohm resistor from MID pin to the middle of the 2
series-connected capacitors as shown in Figure 2, in which resistor R4, capacitor C2 and C3 are for the purpose.
Open-Drain Output
The CN3125 have an open-drain status output
to indicates if the supercapacitors’ voltage has approached
its final regulation value. When charge cycle starts, the
is in high impedance state, and becomes low if the
voltage at pin FB rises above 94.1% of its final regulation voltage, and becomes high impedance again if the
voltage falls below 90% of its final regulation voltage.
pin’s being in logic low does not mean the charging is terminated, as a matter of fact the charging is
ongoing until the supercapacitors are fully charged.
The pin
The pin
if not used.
is in high impedance state if pin CE is low or the CN3125 is in sleep mode.
is open drain output, so a pull-up resistor is needed for a certain state, and should be tied to ground
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VIN Bypass Capacitor
Many types of capacitors can be used for input bypassing(C1 in Figure 1 and 2), Generally, a 1uF ceramic
capacitor, placed in close proximity to VIN and GND pins, works well. In some applications depending on the
power supply characteristics and cable length, it may be necessary to increase the capacitor's value.
The ceramic input capacitor’s size should be 0805 or larger.
If the ceramic capacitor is used as the input supply bypassing purpose, a voltage spike may be created when the
input voltage is applied to the CN3125 via a cable. If the cable is a bit long, the circuit shown in Figure 5 or a
TVS diode from VIN pin to GND should be considered to prevent the CN3125 from being damaged by the
voltage spike. Diode D2 in Figure 5 is for the purpose.
For the consideration of the bypass capacitor, please refer to the Application Note AN102 from our website.
Figure 5 Adding Diode D2 to Suppress Voltage Spike
Stability
If the supercapacitor is present at pin TOP, there is no need to use additional capacitors between TOP pin to
GND to stabilize the feedback loop. In case of supercapacitors’ absence, a capacitor from pin TOP to GND is
needed, generally the feedback loop is stable with an 1uF to 22uF ceramic capacitor. If electrolytic capacitor is
used, the capacitance can be as high as 100uF.
In constant current mode, the stability is also affected by the impedance at the ISET pin. With no additional
capacitance on the ISET pin, the loop is stable with current set resistors values as high as 50KΩ. However,
additional capacitance on ISET pin reduces the maximum allowed current set resistor. The pole frequency at
ISET pin should be kept above 200KHz. Therefore, if ISET pin is loaded with a capacitance C, the following
equation should be used to calculate the maximum resistance value for RISET:
RISET < 1/(6.28×2×105×C)
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Board Layout Considerations
1. RISET at ISET pin should be as close to CN3125 as possible, also the parasitic capacitance at ISET pin
should be kept as small as possible.
2. The capacitance at VIN pin, TOP pin and MID pin should be as close to CN3125 as possible.
3. It is very important to use a good thermal PC board layout to maximize charging current. The thermal path
for the heat generated by the IC is from the die to the copper lead frame through the package lead(especially
the ground lead) to the PC board copper, the PC board copper is the heat sink. The footprint copper pads
should be as wide as possible and expand out to larger copper areas to spread and dissipate the heat to the
surrounding ambient. Feedthrough vias to inner or backside copper layers are also useful in improving the
overall thermal performance of the charger. Other heat sources on the board, not related to the charger,
must also be considered when designing a PC board layout because they will affect overall temperature rise
and the maximum charge current.
The ability to deliver maximum charge current under all conditions require that the exposed metal pad on
the back side of the CN3125 package be soldered to the PC board ground. Failure to make the thermal
contact between the exposed pad on the backside of the package and the copper board will result in larger
thermal resistance.
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Package Information
Consonance does not assume any responsibility for use of any circuitry described. Consonance reserves the
right to change the circuitry and specifications without notice at any time.
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