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NUC029SGE

NUC029SGE

  • 厂商:

    NUVOTON(新唐)

  • 封装:

    LQFP64_7X7MM

  • 描述:

    Arm®Cortex®-M 32位微控制器

  • 数据手册
  • 价格&库存
NUC029SGE 数据手册
NUC029xGE Arm® Cortex® -M 32-bit Microcontroller NuMicro® Family NUC029xGE Series Datasheet Nuvoton is providing this document only for reference purposes of NuMicro® microcontroller based system design. Nuvoton assumes no responsibility for errors or omissions. All data and specifications are subject to change without notice. For additional information or questions, please contact: Nuvoton Technology Corporation. www.nuvoton.com Oct 18, 2019 Page 1 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. NUC029xGE TABLE OF CONTENTS 1 GENERAL DESCRIPTION .............................................................................. 8 1.1 Key Feature and Application ........................................................................................ 8 2 FEATURES.....................................................................................................10 3 ABBREVIATIONS ..........................................................................................17 3.1 Abbriviations ................................................................................................................. 17 4 PARTS INFORMATION LIST AND PIN CONFIGURATION ..........................19 4.1 NuMicro® NUC029 Series Naming Rule .................................................................. 19 4.2 NuMicro® NUC029 Series Selection Guide ............................................................. 20 4.3 Pin Configuration.......................................................................................................... 21 ® 4.3.1 NuMicro NUC029xGE Pin Diagram .......................................................................... 21 4.4 Pin Description ............................................................................................................. 24 4.4.1 NUC029xGE Pin Description ....................................................................................... 24 4.4.2 GPIO Multi-function Pin Summary .............................................................................. 43 5 BLOCK DIAGRAM .........................................................................................60 5.1 NuMicro® NUC029xGE Block Diagram .................................................................... 60 6 FUNCTIONAL DESCRIPTION .......................................................................61 6.1 Arm® Cortex®-M0 Core ................................................................................................ 61 6.2 System Manager .......................................................................................................... 63 NUC029XGE SERIES DATASHEET 6.2.1 Overview ......................................................................................................................... 63 6.2.2 System Reset ................................................................................................................. 63 6.2.3 Power Modes and Wake-up Sources.......................................................................... 70 6.2.4 System Power Distribution ........................................................................................... 73 6.2.5 System Memory Map..................................................................................................... 75 6.2.6 SRAM Memory Orginization ......................................................................................... 77 6.2.7 Register Lock .................................................................................................................. 79 6.2.8 Auto Trim ......................................................................................................................... 86 6.2.9 UART1_TXD modulation with PWM ........................................................................... 86 6.2.10 Voltage Detector (VDET) .............................................................................................. 87 6.2.11 System Timer (SysTick) ................................................................................................ 88 6.2.12 Nested Vectored Interrupt Controller (NVIC) ............................................................. 89 6.2.13 System Control ............................................................................................................... 92 6.3 Clock Controller ............................................................................................................ 93 6.3.1 Overview ......................................................................................................................... 93 6.3.2 System Clock and SysTick Clock ................................................................................ 96 6.3.3 Peripherals Clock ........................................................................................................... 97 6.3.4 Power-down Mode Clock .............................................................................................. 98 6.3.5 Clock Output ................................................................................................................... 98 Oct 18, 2019 Page 2 of 159 Rev 1.02 NUC029xGE 6.4 Flash Memeory Controller (FMC) ............................................................................ 100 6.4.1 Overview ....................................................................................................................... 100 6.4.2 Features ........................................................................................................................ 100 6.5 Analog Comparator Controller (ACMP) .................................................................. 101 6.5.1 Overview ....................................................................................................................... 101 6.5.2 Features ........................................................................................................................ 101 6.6 Analog-to-Digital Converter (ADC) .......................................................................... 102 6.6.1 Overview ....................................................................................................................... 102 6.6.2 Features ........................................................................................................................ 102 6.7 CRC Controller (CRC) ............................................................................................... 103 6.7.1 Overview ....................................................................................................................... 103 6.7.2 Features ........................................................................................................................ 103 6.8 External Bus Interface (EBI) ..................................................................................... 104 6.8.1 Overview ....................................................................................................................... 104 6.8.2 Features ........................................................................................................................ 104 6.9 General Purpose I/O (GPIO) .................................................................................... 105 6.9.1 Overview ....................................................................................................................... 105 6.9.2 Features ........................................................................................................................ 105 6.10 Hardware Divider (HDIV) .................................................................................... 106 6.10.1 Overview ....................................................................................................................... 106 6.10.2 Features ........................................................................................................................ 106 6.11 I2C Serial Interface Controller (I2C) ................................................................... 107 6.11.2 Features ........................................................................................................................ 107 6.12 PDMA Controller (PDMA) ................................................................................... 108 6.12.1 Overview ....................................................................................................................... 108 6.12.2 Features ........................................................................................................................ 108 6.13 PWM Generator and Capture Timer (PWM) .................................................... 109 6.13.1 Overview ....................................................................................................................... 109 6.13.2 Features ........................................................................................................................ 109 6.14 Real Time Clock (RTC) ....................................................................................... 111 6.14.1 Overview ....................................................................................................................... 111 6.14.2 Features ........................................................................................................................ 111 6.15 Smart Card Host Interface (SC) ......................................................................... 112 6.15.1 Overview ....................................................................................................................... 112 6.15.2 Features ........................................................................................................................ 112 6.16 Serial Peripheral Interface (SPI) ........................................................................ 113 6.16.1 Overview ....................................................................................................................... 113 6.16.2 Features ........................................................................................................................ 113 Oct 18, 2019 Page 3 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET 6.11.1 Overview ....................................................................................................................... 107 NUC029xGE 6.17 Timer Controller (TMR) ....................................................................................... 114 6.17.1 Overview ....................................................................................................................... 114 6.17.2 Features ........................................................................................................................ 114 6.18 USB Device Controller (USBD).......................................................................... 116 6.18.1 Overview ....................................................................................................................... 116 6.18.2 Features ........................................................................................................................ 116 6.19 USCI - Universal Serial Control Interface Controller ...................................... 117 6.19.1 Overview ....................................................................................................................... 117 6.19.2 Features ........................................................................................................................ 117 6.20 USCI – UART Mode............................................................................................. 118 6.20.1 Overview ....................................................................................................................... 118 6.20.2 Features ........................................................................................................................ 118 6.21 USCI - SPI Mode .................................................................................................. 119 6.21.1 Overview ....................................................................................................................... 119 6.21.2 Features ........................................................................................................................ 119 6.22 USCI - I2C Mode ................................................................................................... 121 6.22.1 Overview ....................................................................................................................... 121 6.22.2 Features ........................................................................................................................ 121 6.23 UART Interface Controller (UART) .................................................................... 122 6.23.1 Overview ....................................................................................................................... 122 6.23.2 Features ........................................................................................................................ 122 6.24 Window Watchdog Timer (WWDT) ................................................................... 123 NUC029XGE SERIES DATASHEET 6.24.1 Overview ....................................................................................................................... 123 6.24.2 Features ........................................................................................................................ 123 6.25 Window Watchdog Timer (WWDT) ................................................................... 124 6.25.1 Overview ....................................................................................................................... 124 6.25.2 Features ........................................................................................................................ 124 7 APPLICATION CIRCUIT ..............................................................................125 8 ELECTRICAL CHARACTERISTICS ............................................................126 8.1 Absolute Maximum Ratings...................................................................................... 126 8.1.1 Absolute Maximum Ratings Characteristics ............................................................ 126 8.1.2 Thermal Characteristics .............................................................................................. 127 8.1.3 EMC Characteristics .................................................................................................... 128 8.1.4 Package Moisture Sensitivity(MSL) .......................................................................... 129 8.1.5 Soldering Profile ........................................................................................................... 130 8.2 DC Electrical Characteristics.................................................................................... 131 8.3 AC Electrical Characteristics .................................................................................... 139 8.3.1 External 4~20 MHz High Speed Crystal (HXT) Input Clock .................................. 139 8.3.2 External 4~20 MHz High Speed Crystal (HXT) Oscillator...................................... 140 Oct 18, 2019 Page 4 of 159 Rev 1.02 NUC029xGE 8.3.3 External 32.768 kHz Low Speed Crystal (LXT) Input Clock .................................. 141 8.3.4 External 32.768 kHz Low Speed Crystal (LXT) Input Clock .................................. 142 8.3.5 Internal 48 MHz High Speed RC Oscillator (HIRC48) ............................................ 143 8.3.6 Internal 22.1184 MHz High Speed RC Oscillator (HIRC) ....................................... 143 8.3.7 Internal 10 kHz Low Speed RC Oscillator (LIRC) ................................................... 144 8.4 Analog Characteristics .............................................................................................. 145 8.4.1 LDO ................................................................................................................................ 145 8.4.2 Temperature Sensor .................................................................................................... 145 8.4.3 Internal Voltage Reference (Int_VREF) ....................................................................... 145 8.4.4 Power-on Reset............................................................................................................ 146 8.4.5 Low-Voltage Reset ....................................................................................................... 146 8.4.6 Brown-out Detector ...................................................................................................... 146 8.4.7 12-bit ADC ..................................................................................................................... 147 8.4.8 Analog Comparator ...................................................................................................... 149 8.4.9 USB PHY....................................................................................................................... 150 8.5 Flash DC Electrical Characteris ............................................................................... 151 8.6 I2C Dynamic Characteristics ..................................................................................... 152 8.7 SPI Dynamic Characteristics .................................................................................... 153 8.7.1 Dynamic Characteristics of Data Input and Output Pin .......................................... 153 9 PACKAGE DIMENSIONS ............................................................................155 9.1 LQFP 128L (14x14x1.4 mm2 footprint 2.0 mm) ..................................................... 155 9.2 LQFP 64L (7x7x1.4 mm2 footprint 2.0 mm) ........................................................... 156 10 REVISION HISTORY ....................................................................................158 Oct 18, 2019 Page 5 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET 9.3 LQFP 48L (7x7x1.4 mm2 footprint 2.0mm) ............................................................ 157 NUC029xGE LIST OF FIGURES ® Figure 4.1-1 NuMicro NUC029 Series Selection Code ................................................................ 19 ® Figure 4.3-1 NuMicro NUC029LGE LQFP 48-pin Diagram .......................................................... 21 ® Figure 4.3-2 NuMicro NUC029SGE LQFP 64-pin Diagram ......................................................... 22 ® Figure 4.3-3 NuMicro NUC029KGE LQFP 128-pin Diagram ....................................................... 23 ® Figure 5.1-1 NuMicro NUC029xGE Block Diagram ...................................................................... 60 Figure 6.1-1 Functional Block Diagram .......................................................................................... 61 Figure 6.2-1 System Reset Sources ............................................................................................... 64 Figure 6.2-2 nRESET Reset Waveform ......................................................................................... 67 Figure 6.2-3 Power-on Reset (POR) Waveform ............................................................................. 67 Figure 6.2-4 Low Voltage Reset (LVR) Waveform ......................................................................... 68 Figure 6.2-5 Brown-out Detector (BOD) Waveform ....................................................................... 69 ® Figure 6.2-6 NuMicro NUC029xGE Power Mode State Machine ................................................. 71 ® Figure 6.2-7 NuMicro NUC029xGE Power Distribution Diagram ................................................. 74 Figure 6.2-8 SRAM Block Diagram ................................................................................................ 77 Figure 6.2-9 SRAM Memory Organization ..................................................................................... 78 Figure 6.2-10 UART1_TXD Modulated with PWM Channel........................................................... 87 Figure 6.2-11 VDET Block Diagram ............................................................................................... 87 Figure 6.3-1 Clock Generator Block Diagram................................................................................. 94 Figure 6.3-2 Clock Generator Global View Diagram ...................................................................... 95 Figure 6.3-3 System Clock Block Diagram ..................................................................................... 96 NUC029XGE SERIES DATASHEET Figure 6.3-4 HXT Stop Protect Procedure...................................................................................... 97 Figure 6.3-5 SysTick Clock Control Block Diagram ....................................................................... 97 Figure 6.3-6 Clock Source of Clock Output .................................................................................... 98 Figure 6.3-7 Clock Output Block Diagram ...................................................................................... 99 Figure 6.21-1 SPI Master Mode Application Block Diagram ........................................................ 119 Figure 6.21-2 SPI Slave Mode Application Block Diagram .......................................................... 119 2 Figure 6.22-1 I C Bus Timing ....................................................................................................... 121 Figure 8.1-1 Soldering Profile from J-STD-020C ......................................................................... 130 Figure 8.3-1 Typical Crystal Application Circuit ............................................................................ 140 Figure 8.3-2 Typical Crystal Application Circuit ............................................................................ 142 2 Figure 8.6-1 I C Timing Diagram .................................................................................................. 152 Figure 8.7-1 SPI Master Mode Timing Diagram ........................................................................... 153 Figure 8.7-2 SPI Slave Mode Timing Diagram ............................................................................. 154 Oct 18, 2019 Page 6 of 159 Rev 1.02 NUC029xGE List of Tables Table 1.1-1 Key Features Support Table ......................................................................................... 8 Table 3.1-1 List of Abbreviations .................................................................................................... 18 Table 4.4-1 NUC029xGE GPIO Multi-function Table ..................................................................... 59 Table 6.2-1 Reset Value of Registers ............................................................................................. 66 Table 6.2-2 Power Mode Difference Table ..................................................................................... 70 Table 6.2-3 Clocks in Power Modes ............................................................................................... 72 Table 6.2-4 Condition of Entering Power-down Mode Again ......................................................... 73 Table 6.2-5 Address Space Assignments for On-Chip Controllers ................................................ 76 Table 6.2-6 Protected Registers List .............................................................................................. 86 Table 6.2-7 Exception Model .......................................................................................................... 90 Table 6.2-8 Interrupt Number Table ............................................................................................... 91 Table 6.3-1 Clock Stable Count Value Table ................................................................................. 93 Table 8.1-1 Absolute Maximum Ratings Characteristics.............................................................. 126 Table 8.1-2 Thermal Characteristics ............................................................................................ 127 Table 8.1-3 EMC Characteristics .................................................................................................. 128 Table 8.1-4 Package Moisture Sensitivity (MSL) ......................................................................... 129 Table 8.1-5 Soldering Profile ........................................................................................................ 130 NUC029XGE SERIES DATASHEET Oct 18, 2019 Page 7 of 159 Rev 1.02 NUC029xGE 1 GENERAL DESCRIPTION ® ® ® The NuMicro NUC029xGE of NUC029 series microcontroller based on the Arm Cortex -M0 core operates at up to 72 MHz. With its crystal-less USB 2.0 FS interface, it is able to generate precise frequency required by USB protocol without the need of external crystal. It features adjustable V DDIO pins for specific I/O pins with a wide range of voltage from 1.8 V to 5.5 V for various operating voltages of external components, a unique high-speed PWM with clock frequency up to 144 MHz for precision control, and an integrated hardware divider to speed up the calculation for the control algorithms. Apart from that, the NUC029xGE also integrates SPROM (Security Protection ROM) which provides a ® secure code execution area to protect the intelligent property of developers. The NuMicro NUC029xGE of NUC029 series is ideal for industrial control, motor control and metering applications. ® The NuMicro NUC029xGE of NUC029 series supports the wide voltage range from 2.5 V to 5.5 V and temperature ranging from -40℃ to 105℃, up to 256 Kbytes of Flash memory, 20 Kbytes of SRAM, 4 Kbytes of ISP (In-System Programming) ROM as well as ICP (In-Circuit Programming) ROM and IAP (In-Application Programming) ROM in 48-, 64-, 128-pin packages. It is also equipped with plenty of peripherals such as USB interface, Timers, Watchdog Timers, RTC, PDMA, EBI, UART, Smart Card Interface, SPI, I²S, I²C, GPIO, up to 12 channels of 16-bit PWM, up to 20 channels of 12-bit ADC, analog comparator, temperature sensor, low voltage reset, brown-out detector, 96-bit UID (Unique Identification), and 128-bit UCID (Unique Customer Identification). 1.1 Key Feature and Application USCI UART ISO NUC029XGE SERIES DATASHEET PWM EBI PDMA ADC ACMP RTC VBAT VDDIO 0 10 √ 5 9 2 √ √ 2 0 12 √ 5 15 2 √ √ 2 2 12 √ 5 20 2 √ √ I2C SPI/I2S Product Line USB NUC029LGE 2.0 FS Device 3 3 2 2 NUC029SGE 2.0 FS Device 3 3 2 NUC029KGE 2.0 FS Device 3 3 2 7816 Table 1.1-1 Key Features Support Table ® The NuMicro NUC029xGE of NUC029 series is suitable for a wide range of applications such as:  Industrial Automation  PLCs  Inverters  Home Automation  Security Alarm System  Power Metering  Portable Data Collector  Portable RFID Reader  System Supervisors  Smart Card Reader  Printer  Bar Code Scanner  Motor Control Oct 18, 2019 Page 8 of 159 Rev 1.02 NUC029xGE  Digital Power NUC029XGE SERIES DATASHEET Oct 18, 2019 Page 9 of 159 Rev 1.02 NUC029xGE 2 FEATURES NUC029XGE SERIES DATASHEET  Core ® ® – Arm Cortex -M0 core running up to 72 MHz – One 24-bit system timer – Supports low power sleep mode – Single-cycle 32-bit hardware multiplier – NVIC for the 32 interrupt inputs, each with 4-levels of priority – Supports programmable mask-able interrupts – Serial Wire Debug supports with 2 watch-points / 4 breakpoints  Built-in LDO for wide operating voltage ranged from 2.5 V to 5.5 V  Flash Memory – Supports 256/128 KB application ROM (APROM) – Supports 4 KB Flash for loader (LDROM) – Supports 2 KB Security Protection Rom (SPROM) – Supports 12 bytes User Configuration block to control system initiation – Supports Data Flash with configurable memory size – Supports 2 KB page erase for all embedded flash – Supports In-System-Programming (ISP), In-Application-Programming (IAP) update embedded flash memory – Supports CRC-32 checksum calculation function – Supports flash all one verification function – Hardware external read protection of whole flash memory by Security Lock Bit – Supports 2-wired ICP update through SWD/ICE interface  SRAM Memory – 20 KB embedded SRAM – Supports byte-, half-word- and word-access – Supports PDMA mode  Hardware Divider – Signed (two’s complement) integer calculation – 32-bit dividend with 16-bit divisor calculation capacity – 32-bit quotient and 32-bit remainder outputs (16-bit remainder with sign extends to 32-bit) – Divided by zero warning flag – 6 HCLK clocks taken for one cycle calculation – Write divisor to trigger calculation – Waiting for calculation ready automatically when reading quotient and remainder  PDMA (Peripheral DMA) – Supports 5 independent configurable channels for automatic data transfer between memories and peripherals – Supports single and burst transfer type – Supports Normal and Scatter-Gather Transfer modes – Supports two types of priorities modes: Fixed-priority and Round-robin modes – Supports byte-, half-word- and word-access – Supports incrementing mode for the source and destination address for each channel – Supports time-out function for channel 0 and channel 1 – Supports software and SPI/I2S, UART, USCI, USB, ADC, PWM and TIMER request  Clock Control – Built-in 22.1184 MHz high speed RC oscillator for system operation (Frequency variation < 2% at -40℃ ~ +105℃) – Built-in 48 MHz internal high speed RC oscillator for USB device operation – Built-in 10 kHz low speed RC oscillator for Watchdog Timer and Wake-up operation – Built-in 4~20 MHz high speed crystal oscillator for precise timing operation – Built-in 32.768 kHz low speed crystal oscillator for Real Time Clock – Supports PLL up to 144 MHz for high resolution PWM operation – Supports dynamically calibrating the HIRC48 to 48 MHz ±0.25% by external 32.768 kHz crystal oscillator (LXT) Oct 18, 2019 Page 10 of 159 Rev 1.02 NUC029xGE – Supports dynamically calibrating the HIRC to 22.1184Mhz by external 32.768 kHz crystal oscillator (LXT) – Supports clock on-the-fly switch – Supports clock failure detection for system clock – Supports auto clock switch once clock failure detected – Supports exception (NMI) generated once a clock failure detected – Supports divided clock output  GPIO – Four I/O modes – TTL/Schmitt trigger input selectable – I/O pin configured as interrupt source with edge/level trigger setting – Supports high driver and high sink current I/O (up to 20 mA at 5 V) – Supports software selectable slew rate control – Supports up to 86/49/35 GPIOs for LQFP128/64/48 respectively – Supports 5V-tolerance function for following pins  PA.0~PA.15, PB.12, PC.0~PC.7 PC.9~PC.14, PD.4~PD.7, PD.10~PD.15, PE.0~PE.1, PE.3~PE.13, PF.2, PF.7  Timer/PWM – Supports 4 sets of Timers/PWM Timer Mode PWM Mode TM_CNT_OUT PWM_CH0 TM_EXT PWM_CH1 (Complementary) – Timer Mode  Supports 4 sets of 32-bit timers with 24-bit up-timer and one 8-bit pre-scale counter Independent clock source for each timer  Provides one-shot, periodic, toggle and continuous counting operation modes  Supports event counting function to count the event from external pin  Supports input capture function to capture or reset counter value  Supports chip wake-up from Idle/Power-down mode if a timer interrupt signal is generated  Support Timer0 ~ Timer3 time-out interrupt signal or capture interrupt signal to trigger PWM, EADC and PDMA function  Supports Inter-Timer trigger mode – PWM Mode  Supports maximum clock frequency up to 72 MHz Oct 18, 2019  Supports independent mode for 4 sets of independent PWM output channel  Supports complementary mode for 4 sets of complementary paired PWM output channel with 12-bit Dead-time generator  Supports 12-bit pre-scalar from 1 to 4096  Supports 16-bit resolution PWM counter, each timer provides 1 PWM counter  Supports up, down and up/down counter operation type  Supports one-shot or Auto-reload counter operation mode  Supports mask function and tri-state enable for each PWM pin  Supports brake function Page 11 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET  NUC029xGE  Supports interrupt when PWM counter match zero, period value or compared value, and brake condition happened  Supports trigger ADC when PWM counter match zero, period value or compared value NUC029XGE SERIES DATASHEET  Watchdog Timer – Supports multiple clock sources from LIRC(default selection), HCLK/2048 and LXT – 8 selectable time-out period from 1.6 ms ~ 26.0 sec (depending on clock source) – Able to wake up from Power-down or Idle mode – Interrupt or reset selectable on watchdog time-out  Window Watchdog Timer – Supports multiple clock sources from HCLK/2048 (default selection) and LIRC – Window set by 6-bit counter with 11-bit prescale – Interrupt or reset selectable on time-out  RTC – Supports separate battery power pin VBAT – Supports software compensation by setting frequency compensate register (FCR) – Supports RTC counter (second, minute, hour) and calendar counter (day, month, year) – Supports Alarm registers (second, minute, hour, day, month, year) – Supports Alarm mask registers – Selectable 12-hour or 24-hour mode – Automatic leap year recognition – Supports periodic time tick interrupt with 8 period options 1/128, 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 and 1 second – Supports wake-up function  PWM – Supports maximum clock frequency up to144 MHz – Supports up to two PWM modules, each module provides 6 output channels. – Supports independent mode for PWM output/Capture input channel – Supports complementary mode for 2 complementary paired PWM output channel  Dead-time insertion with 12-bit resolution  Two compared values during one period – Supports 12-bit pre-scalar from 1 to 4096 – Supports 16-bit resolution PWM counter  Up, down and up/down counter operation type – Supports mask function and tri-state enable for each PWM pin – Supports brake function  Brake source from pin and system safety events: clock failed, Brown-out detection and CPU lockup.  Noise filter for brake source from pin  Edge detect brake source to control brake state until brake interrupt cleared  Level detect brake source to auto recover function after brake condition removed – Supports interrupt on the following events:  PWM counter match zero, period value or compared value  Brake condition happened – Supports trigger ADC on the following events:  PWM counter match zero, period value or compared value – Supports up to 12 capture input channels with 16-bit resolution – Supports rising or falling capture condition – Supports input rising/falling capture interrupt – Supports rising/falling capture with counter reload option  USCI – Supports up to 3 sets of USCI Oct 18, 2019 USCI UART Mode SPI Mode I2C Mode USCI_CLK - SPI_CLK SCL Page 12 of 159 Rev 1.02 NUC029xGE USCI_CTL0 nCTS SPI_SS - USCI_CTL1 nRTS - - USCI_DAT0 Rx SPI_MOSI SDA USCI_DAT1 Tx SPI_MISO - Oct 18, 2019 Page 13 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET – UART Mode  Supports one transmit buffer and two receive buffer for data payload  Supports hardware auto flow control function  Supports programmable baud-rate generator  Support 9-Bit Data Transfer (Support 9-Bit RS-485)  Baud rate detection possible by built-in capture event of baud rate generator  Supports Wake-up function (Data and nCTS Wakeup Only) – SPI Mode  Supports Master or Slave mode operation (the maximum frequency -- Master = fPCLK / 2, Slave = fPCLK / 5)  Supports one transmit buffer and two receive buffers for data payload  Configurable bit length of a transfer word from 4 to 16-bit  Supports MSB first or LSB first transfer sequence  Supports Word Suspend function  Supports 3-wire, no slave select signal, bi-direction interface  Supports wake-up function by slave select signal in Slave mode  Supports one data channel half-duplex transfer 2 – I C Mode  Full master and slave device capability  Supports of 7-bit addressing, as well as 10-bit addressing  Communication in standard mode (100 kBit/s) or in fast mode (up to 400 kBit/s)  Supports multi-master bus  Supports one transmit buffer and two receive buffer for data payload  Supports 10-bit bus time-out capability  Supports bus monitor mode.  Supports Power down wake-up by data toggle or address match  Supports setup/hold time programmable  Supports multiple address recognition (two slave address with mask option)  UART – Supports up to 3 sets of UART – Full-duplex asynchronous communications – Separates receive and transmit 16/16 bytes entry FIFO for data payloads – Supports hardware auto-flow control (RX, TX, CTS and RTS) – Programmable receiver buffer trigger level – Supports programmable baud rate generator for each channel individually – Supports 8-bit receiver buffer time-out detection function – Programmable transmitting data delay time between the last stop and the next start bit by setting DLY (UART_TOUT [15:8]) – Supports Auto-Baud Rate measurement and baud rate compensation function – Supports break error, frame error, parity error and receive/transmit buffer overflow detection function – Fully programmable serial-interface characteristics  Programmable number of data bit, 5-, 6-, 7-, 8- bit character  Programmable parity bit, even, odd, no parity or stick parity bit generation and detection  Programmable stop bit, 1, 1.5, or 2 stop bit generation – Supports IrDA SIR function mode  Supports for 3/16 bit duration for normal mode – Supports LIN function mode  Supports LIN master/slave mode NUC029xGE  Supports programmable break generation function for transmitter  Supports break detection function for receiver – Supports RS-485 mode  Supports RS-485 9-bit mode  Supports hardware or software enables to program nRTS pin to control RS-485 transmission direction – Supports nCTS, incoming data, Received Data FIFO reached threshold and RS-485 Address Match (AAD mode) wake-up function – Supports PDMA transfer  SPI/I2S – Supports up to two SPI/I2S controllers SPI Mode I2S Mode SPI_CLK I2S_BCLK SPI_SS I2S_LRCLK SPI_MOSI I2S_DO SPI_MISO I2S_DI - I2S_MCLK NUC029XGE SERIES DATASHEET – SPI Mode  Supports Master or Slave mode operation  Configurable bit length of a transfer word from 8 to 32-bit  Provides separate 4-/8-level depth transmit and receive FIFO buffers  Supports MSB first or LSB first transfer sequence  Supports Byte Reorder function  Supports PDMA transfer – I2S Mode  Supports Master or Slave mode operation  Capable of handling 8-, 16-, 24- and 32-bit word sizes in I2S mode  Provides separate 4-level depth transmit and receive FIFO buffers in I2S mode  Supports monaural and stereo audio data in I2S mode  Supports PCM mode A, PCM mode B, I2S and MSB justified data format in I2S mode  Supports PDMA transfer 2  IC 2 – Supports up to two sets of I C device – Supports Master/Slave mode – Supports bidirectional data transfer between masters and slaves – Supports multi-master bus (no central master) – Arbitration between simultaneously transmitting masters without corruption of serial data on the bus – Serial clock synchronization allows devices with different bit rates to communicate via one serial bus – Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer 2 2 – Supports 14-bit time-out counter requesting the I C interrupt if the I C bus hangs up and timer-out counter overflows – Programmable clocks allow versatile rate control – Supports multiple address recognition, four slave address with mask option – Supports two-level buffer function – Supports setup/hold time programmable – Supports wake-up function  USB 2.0 FS Device Controller – Crystal-less USB 2.0 FS Device – Compliant to USB specification version 2.0 – On-chip USB Transceiver Oct 18, 2019 Page 14 of 159 Rev 1.02 NUC029xGE     Oct 18, 2019 Page 15 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET  – Supports Control, Bulk In/Out, Interrupt and Isochronous transfers – Auto suspend function when no bus signaling for 3 ms – Supports USB 2.0 Link Power Management (LPM) – Provides 8 programmable endpoints – Supports 512 Bytes internal SRAM as USB buffer – Provides remote wake-up capability – On-chip 5V to 3.3V LDO for USB PHY ADC – Supports 12-bit SAR ADC – 12-bit resolution and 10-bit accuracy is guaranteed – Analog input voltage range: 0~ AVDD – Supports external VREF pin – Up to 20 single-end analog input channels – Maximum ADC peripheral clock frequency is 16 MHz – Conversion rate up to 800 ksps at 5 V – Configurable ADC internal sampling time – Supports single-scan, single-cycle-scan, and continuous scan and scan on enabled channels – Supports individual conversion result register with valid and overrun indicators for each channel – Supports digital comparator to monitor conversion result and user can select whether to generate an interrupt when conversion result matches the compare register setting – An A/D conversion can be triggered by:  Software enable  External pin (STADC)  Timer 0~3 overflow pulse trigger  PWM triggers with optional start delay period – Supports 4 internal channels for  Operational amplifier output  Band-gap VBG input  Temperature sensor input  VBAT voltage measure – Supports internal reference voltage: 2.048 V, 2.560 V, 3.072 V and 4.096 V – Supports PDMA transfer Analog Comparator – Supports up to 2 rail-to-rail analog comparators – Supports 4 multiplexed I/O pins at positive node. – Supports I/O pin and internal voltages at negative node – Support selectable internal voltage reference from:  Band-gap VBG  Voltage divider source from AVDD and internal reference voltage. – Supports programmable hysteresis – Supports programmable speed and power consumption – Interrupts generated when compare results change, interrupt event condition is programmable. – Supports power-down wake-up – Supports triggers for break events and cycle-by-cycle control for PWM Cyclic Redundancy Calculation Unit – Supports four common polynomials CRC-CCITT, CRC-8, CRC-16, and CRC-32 – Programmable initial value – Supports programmable order reverse setting for input data and CRC checksum – Supports programmable 1’s complement setting for input data and CRC checksum. – Supports 8/16/32-bit of data width – Interrupt generated once checksum error occurs User Configurable VDDIO=1.8 ~ 5.5 V I/O Interface 2 – Supports UART, SPI and I C at VDDIO power domain Supports 96-bit Unique ID (UID) NUC029xGE  Supports 128-bit Unique Customer ID (UCID)  One built-in temperature sensor with 1℃ resolution  Brown-out detector – With 4 levels: 4.3 V/ 3.7V/ 2.7V/ 2.2V – Supports Brown-out Interrupt and Reset option  Low Voltage Reset – Threshold voltage levels: 2.0 V  Power consumption – Chip power down current < 10 uA with RAM data retention. – VBAT power domain operating current 30 sec. Time with 5°C of actual peak temperature Peak temperature range 260°C Ramp-down rate 6°C/sec ax. Time 25°C to peak temperature 8 min. max Note: 1. Determined according to J-STD-020C Table 8.1-5 Soldering Profile Oct 18, 2019 Page 130 of 159 Rev 1.02 NUC029xGE 8.2 DC Electrical Characteristics (VDD-VSS = 2.5 ~ 5.5V, TA = 25°C, FOSC = 72 MHz unless otherwise specified.) SPECIFICATIONS PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT VDD – VSS 2.5 - 5.5 V Power supply for PE.8 ~ PE.13 VDDIO – VSS 1.8 - 5.5 V Power supply for PF.0, PF.1 and PF.2 VBAT – VSS 2.5 - 5.5 V Power Ground VSS – AVSS -0.05 - +0.05 V VLDO 1.62 1.8 1.98 V MCU operating in Run, Idle or Power-down mode uF Connect to LDO_CAP pin Operation Voltage VDD = 2.5 ~ 5.5V up to 72 MHz LDO Output Voltage CLDO Band-gap Voltage Allowed voltage difference for VDD and AVDD 1 - 1.21 - V VDD – AVDD -0.3 - +0.3 V IDD1 - 57 - mA Operating Current Normal Run Mode VDD HXT HIRC HIRC48 PLL All digital module 5.5 V 12 MHz X X V V HCLK =72 MHz while(1){}executed from flash VLDO=1.8 V IDD2 - 22 - mA 5.5 V 12 MHz X X V X IDD3 - 57 - mA 3.3 V 12 MHz X X V V IDD4 - 22 - mA 3.3 V 12 MHz X X V X VDD HXT HIRC HIRC48 PLL IDD5 - TBD - mA All digital module 5.5 V X X V V V Operating Current Normal Run Mode HCLK =72 MHz while(1){}executed from flash VLDO=1.8 V IDD6 - TBD - mA 5.5 V X X V V X IDD7 - TBD - mA 3.3 V X X V V V IDD8 - TBD - mA 3.3 V X X V V X VDD HXT HIRC HIRC48 PLL IDD9 - 33 - mA All digital module 5.5 V 12 MHz X X V V Operating Current Normal Run Mode HCLK =48 MHz while(1){}executed from flash VLDO=1.8 V Oct 18, 2019 IDD10 - 14 - mA 5.5 V 12 MHz X X V X IDD11 - 33 - mA 3.3 V 12 MHz X X V V IDD12 - 14 - mA 3.3 V 12 MHz X X V X Page 131 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET VBG NUC029xGE SPECIFICATIONS PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT - TBD - mA Operating Current Normal Run Mode IDD13 VDD HXT HIRC HIRC48 PLL All digital module 5.5 V X X V X V HCLK =48 MHz while(1){}executed from flash VLDO=1.8 V IDD14 - TBD - mA 5.5 V X X V X X IDD15 - TBD - mA 3.3 V X X V X V IDD16 - TBD - mA 3.3 V X X V X X VDD HXT HIRC HIRC48 PLL IDD21 - TBD - mA All digital module 5.5 V X X HIRC48/2 X V Operating Current Normal Run Mode HCLK =24 MHz while(1){}executed from flash VLDO=1.8 V IDD22 - TBD - mA 5.5 V X X HIRC48/2 X X IDD23 - TBD - mA 3.3 V X X HIRC48/2 X V IDD24 - TBD - mA 3.3 V X X HIRC48/2 X X VDD HXT HIRC HIRC48 PLL IDD25 - 16.6 - mA All digital module 5.5 V X V X X V Operating Current Normal Run Mode HCLK =22.1184 MHz while(1){}executed from flash VLDO=1.8 V IDD26 - 6.2 - mA 5.5 V X V X X X IDD27 - 16.6 - mA 3.3 V X V X X V IDD28 - 6.2 - mA 3.3 V X V X X X VDD HXT HIRC HIRC48 PLL IDD29 - 7.8 - mA All digital module 5.5 V 12 MHz X X X V Operating Current Normal Run Mode NUC029XGE SERIES DATASHEET HCLK =12 MHz while(1){}executed from flash VLDO=1.8 V IDD30 - 3.1 - mA 5.5 V 12 MHz X X X X IDD31 - 7.8 - mA 3.3 V 12 MHz X X X V IDD32 - 3.1 - mA 3.3 V 12 MHz X X X X VDD HXT HIRC HIRC48 PLL IDD33 - 2.74 - mA All digital module 5.5 V 4 MHz X X X V Operating Current Normal Run Mode HCLK =4 MHz while(1){}executed from flash VLDO=1.8 V IDD34 - 1.23 - mA 5.5 V 4 MHz X X X X IDD35 - 2.72 - mA 3.3 V 4 MHz X X X V IDD36 - 1.20 - mA 3.3 V 4 MHz X X X X IDD37 - 136 - uA Operating Current Normal Run Mode VDD LXT LIRC PLL All digital module 5.5 V 32.768 kHz X X V HCLK =32.768 kHz while(1){}executed from flash VLDO=1.8 V Operating Current Oct 18, 2019 IDD38 - 123 - uA 5.5 V 32.768 kHz X X X IDD39 - 123 - uA 3.3 V 32.768 kHz X X V IDD40 - 109 - uA 3.3 V 32.768 kHz X X X IDD41 - 121 - uA VDD LXT LIRC PLL All digital module Page 132 of 159 Rev 1.02 NUC029xGE SPECIFICATIONS PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT Normal Run Mode HCLK =10 kHz 5.5 V X 10 kHz X V IDD42 - 117 - uA 5.5 V X 10 kHz X X while(1){}executed from flash IDD43 - 107 - uA 3.3 V X 10 kHz X V VLDO=1.8 V IDD44 - 102 - uA 3.3 V X 10 kHz X X IIDLE1 - 47 - mA Operating Current Idle Mode VDD HXT HIRC HIRC48 PLL All digital module 5.5 V 12 MHz X X V V HCLK =72 MHz while(1){}executed from flash VLDO=1.8 V IIDLE2 - 9 - mA 5.5 V 12 MHz X X V X IIDLE3 - 47 - mA 3.3 V 12 MHz X X V V IIDLE4 - 9 - mA 3.3 V 12 MHz X X V X VDD HXT HIRC HIRC48 PLL IIDLE5 - TBD - mA All digital module 5.5 V X X V V V Operating Current Idle Mode HCLK =72 MHz while(1){}executed from flash VLDO=1.8 V IIDLE6 - TBD - mA 5.5 V X X V V X IIDLE7 - TBD - mA 3.3 V X X V V V IIDLE8 - TBD - mA 3.3 V X X V V X VDD HXT HIRC HIRC48 PLL IIDLE9 - 27 - mA All digital module 5.5 V 12 MHz X X V V Operating Current Idle Mode HCLK =48 MHz VLDO=1.8 V IIDLE10 - 5.5 - mA 5.5 V 12 MHz X X V X IIDLE11 - 27 - mA 3.3 V 12 MHz X X V V IIDLE12 - 5.5 - mA 3.3 V 12 MHz X X V X VDD HXT HIRC HIRC48 PLL IIDLE13 - TBD - mA All digital module 5.5 V X X V X V Operating Current Idle Mode HCLK =48 MHz while(1){}executed from flash VLDO=1.8 V IIDLE14 - TBD - mA 5.5 V X X V X X IIDLE15 - TBD - mA 3.3 V X X V X V IIDLE16 - TBD - mA 3.3 V X X V X X VDD HXT HIRC HIRC48 PLL IIDLE21 - TBD - mA All digital module 5.5 V X X HIRC48/2 X V Operating Current Idle Mode HCLK =24 MHz while(1){}executed from flash VLDO=1.8 V IIDLE22 - TBD - mA 5.5 V X X HIRC48/2 X X IIDLE23 - TBD - mA 3.3 V X X HIRC48/2 X V IIDLE24 - TBD - mA 3.3 V X X HIRC48/2 X X VDD HXT HIRC HIRC48 PLL IIDLE25 - 12.3 - mA All digital module 5.5 V X V X X V 5.5 V X V X X X Operating Current Idle Mode HCLK =22.1184 MHz while(1){}executed from Oct 18, 2019 IIDLE26 - 1.9 - mA Page 133 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET while(1){}executed from flash NUC029xGE SPECIFICATIONS PARAMETER flash VLDO=1.8 V SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT IIDLE27 - 12.3 - mA 3.3 V X V X X V IIDLE28 - 1.9 - mA 3.3 V X V X X X VDD HXT HIRC HIRC48 PLL IIDLE29 - 6.3 - mA All digital module 5.5 V 12 MHz X X X V Operating Current Idle Mode HCLK =12 MHz while(1){}executed from flash VLDO=1.8 V IIDLE30 - 1.25 - mA 5.5 V 12 MHz X X X X IIDLE31 - 6.3 - mA 3.3 V 12 MHz X X X V IIDLE32 - 1.2 - mA 3.3 V 12 MHz X X X X VDD HXT HIRC HIRC48 PLL IIDLE33 - 2.2 - mA All digital module 5.5 V 4 MHz X X X V Operating Current Idle Mode HCLK =4 MHz while(1){}executed from flash VLDO=1.8 V IIDLE34 - 0.51 - mA 5.5 V 4 MHz X X X X IIDLE35 - 2.2 - mA 3.3 V 4 MHz X X X V IIDLE36 - 0.46 - mA 3.3 V 4 MHz X X X X IIDLE37 - 129 - uA Operating Current Idle Mode VDD LXT LIRC PLL All digital module 5.5 V 32.768 kHz X X V HCLK =32.768 kHz while(1){}executed from flash VLDO=1.8 V NUC029XGE SERIES DATASHEET IIDLE38 - 115 - uA 5.5 V 32.768 kHz X X X IIDLE39 - 115 - uA 3.3 V 32.768 kHz X X V IIDLE40 - 101 - uA 3.3 V 32.768 kHz X X X VDD LXT LIRC PLL IIDLE41 - 119 - uA All digital module 5.5 V X 10 kHz X V Operating Current Idle Mode HCLK =10 kHz while(1){}executed from flash VLDO=1.8 V IIDLE42 - 114 - uA 5.5 V X 10 kHz X X IIDLE43 - 104 - uA 3.3 V X 10 kHz X V IIDLE44 - 100 - uA 3.3 V X 10 kHz X X VDD HXT/HIRC LXT/LIRC PLL IPWD1 - TBD - uA RAM retention 5.5 V X LXT X V IPWD2 - TBD - uA 5.5 V X LIRC X V Standby Current IPWD3 - TBD - uA 5.5 V X LXT & LIRC X V Power-down Mode IPWD4 - 20 uA 5.5 V X X X V IPWD5 - 16.5 - uA 3.3 V X LXT X V IPWD6 - 16 - uA 3.3 V X LIRC X V IPWD7 - 17.5 - uA 3.3 V X LXT & LIRC X V IPWD8 - 15 - uA 3.3 V X X X V VLDO=1.8 V Oct 18, 2019 Page 134 of 159 Rev 1.02 NUC029xGE SPECIFICATIONS PARAMETER Logic 0 Input Current (Quasi-bidirectional mode) Input Pull Up Resistor SYM. IIL RIN TEST CONDITIONS MIN. TYP. MAX. UNIT - -70 - uA VDD = VBAT = VDDIO = 5.5V, VIN = 0V - TBD - kΩ VDD = VBAT = VDDIO = 5.5V - TBD - kΩ VDD = VBAT = VDDIO = 3.3V - TBD - kΩ VDD = VBAT = 2.5 ~ 5.5 V VDDIO = 1.8 V Input Leakage Current ILK Input Low Voltage (TTL input) VIL1 Input Low Voltage (TTL input for VDDIO domain) VIL2 Input High Voltage (TTL input) - 0 - A VDD = VBAT = VDDIO = 5.5V, 0 < VIN < VDD Open-drain or input only mode -0.3 - 0.8 V VDD = VBAT = VDDIO = 4.5 V -0.3 - 0.6 V VDD = VBAT = VDDIO = 2.5 V -0.3 - TBD V VDD = VBAT = 2.5 ~ 5.5 V VDDIO = 1.8 V 2.0 - VDD + 0.3 V VDD = VBAT = VDDIO = 5.5V 1.5 - VDD + 0.3 V VDD = VBAT = VDDIO = 2.5V - VDD + 0.3 V VIH1 VDD = VBAT = 2.5 ~ 5.5 V Input High Voltage (TTL input for VDDIO domain) VIH2 TBD Input Low Voltage (Schmitt input) VIL3 -0.3 - 0.3VDD V VDD = VBAT = VDDIO = 2.5 ~ 5.5 V VIL4 -0.3 - 0.3VDD V VDDIO = 1.8 ~ 5.5V VIH3 0.7VDD - VDD + 0.3 V VDD = VBAT = VDDIO = 2.5 ~ 5.5V - VDDIO + 0.3 V VDDIO = 1.8 ~ 5.5V VDDIO = 1.8 V NUC029XGE SERIES DATASHEET Input Low Voltage (Schmitt input for VDDIO domain) Input High Voltage (Schmitt input) Input High Voltage (Schmitt input for VDDIO domain) Hysteresis voltage of PA~PF (Schmitt input) VIH4 0.7VDDI O VHY - 0.2VDD - V VIL5 -0.3 - 0.2VDD V VIH5 0.8VDD - VDD + 0.3 V RRST - 45 - kΩ Negative going threshold (Schmitt input), nRESET Positive going threshold (Schmitt Input), nRESET Internal nRESET pin pull up resistor VDD = 5.5V (NUC029SGE/LGE only) Oct 18, 2019 Page 135 of 159 Rev 1.02 NUC029xGE SPECIFICATIONS PARAMETER SYM. TEST CONDITIONS MIN. Internal nRESET pin pull up resistor RRST TYP. MAX. 16 UNIT kΩ VDD = 5.5V (NUC029KGE only) Source Current (Quasi-bidirectional Mode) ISR1 - -400 - uA VDD = VBAT = VDDIO = 4.5V, VS = 2.4V ISR2 - -80 - uA VDD = VBAT = VDDIO = 2.7V, VS = 2.2V ISR3 - -73 - uA VDD = VBAT = VDDIO = 2.5V, VS = 2.0V ISR4 - -42 - uA Source Current (Quasi-bidirectional Mode for VDDIO domain) VDD = VBAT = 2.5 ~ 5.5V VDDIO = 1.8V, VS = 1.6V ISR5 -27 mA VDD = VBAT = VDDIO = 4.5V, VS = 2.4V Source Current ISR6 - -5.8 - mA VDD = VBAT = VDDIO = 2.7V, VS = 2.2V ISR7 - -5.2 - mA VDD = VBAT = VDDIO = 2.5V, VS = 2.0V (Push-pull Mode for VDDIO domain) ISR8 - -1.5 - mA Sink Current ISK1 (Quasi-bidirectional, Open-Drain and Pushpull Mode) ISK2 ISK3 (Push-pull Mode) VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V Source Current VS = 1.3 V for NUC029SGE/LGE VS = 1.6 V for NUC029KGE 16 - mA VDD = VBAT = VDDIO = 4.5V, VS = 0.45V - 11 - mA VDD = VBAT = VDDIO = 2.7V, VS = 0.45V - 9 - mA VDD = VBAT = VDDIO = 2.5V, VS = 0.45V 2.2 - mA Sink Current NUC029XGE SERIES DATASHEET (Quasi-bidirectional, Open-Drain and Pushpull Mode for VDDIO domain) ISK4 VDD = VBAT = 2.5 ~ 5.5V VDDIO = 1.8V, VS = 1.6V (NUC029SGE/LGE only) Sink Current (Quasi-bidirectional, Open-Drain and Pushpull Mode for VDDIO domain) ISK4 - HIORR1 - 6 - mA VDD = VBAT = 2.5 ~ 5.5V VDDIO = 1.8V, VS = 0.45V (NUC029KGE only) 3.2 - ns VDD = VBAT = VDDIO = 5.5V, without capacitor 4 HIORR2 ns VDD = VBAT = VDDIO = 5.5V, with 10pF capacitor Higher GPIO Rising Rate HIORR3 - 3.8 - ns VDD = VBAT = VDDIO = 3.3V, without capacitor HIORR4 - 5.4 - ns VDD = VBAT = VDDIO = 3.0V, with 10pF capacitor Oct 18, 2019 Page 136 of 159 Rev 1.02 NUC029xGE SPECIFICATIONS PARAMETER SYM. HIORR5 TEST CONDITIONS MIN. TYP. MAX. UNIT - TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, without capacitor (for VDDIO domain) HIORR6 - TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, with 10pF capacitor (for VDDIO domain) BIORR1 - 4.6 - ns VDD = VBAT = VDDIO = 5.5V, without capacitor BIORR2 - 5.3 - ns VDD = VBAT = VDDIO = 5.5V, with 10pF capacitor BIORR3 - 5.8 - ns VDD = VBAT = VDDIO = 3.0V, without capacitor Basic GPIO Rising Rate BIORR4 - 7.6 - ns VDD = VBAT = VDDIO = 3.0V, with 10pF capacitor BIORR5 - TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, without capacitor (for VDDIO domain) BIORR6 - TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, with 10pF capacitor (for VDDIO domain) HIOFR1 - 2.10 - ns VDD = VBAT = VDDIO = 5.5V, without capacitor HIOFR2 - 2.9 - ns VDD = VBAT = VDDIO = 5.5V, with 10pF capacitor - 3.12 - ns NUC029XGE SERIES DATASHEET HIOFR3 VDD = VBAT = VDDIO = 3.3V, without capacitor Higher GPIO Falling Rate HIOFR4 - 4.4 - ns VDD = VBAT = VDDIO = 3.3V, with 10pF capacitor HIOFR5 - HIOFR6 - TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, without capacitor (for VDDIO domain) TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, with 10pF capacitor (for VDDIO domain) BIOFR1 - BIOFR2 - 3.8 - ns VDD = VBAT = VDDIO = 5.5V, without capacitor 4.9 - ns VDD = VBAT = VDDIO = 5.5V, with 10pF capacitor Basic GPIO Falling Rate BIOFR3 - 6.4 - ns VDD = VBAT = VDDIO = 3.3V, without capacitor BIOFR4 - 7.87 - ns VDD = VBAT = VDDIO = 3.3V, with 10pF capacitor Oct 18, 2019 Page 137 of 159 Rev 1.02 NUC029xGE SPECIFICATIONS PARAMETER SYM. BIOFR5 TEST CONDITIONS MIN. TYP. MAX. UNIT - TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, without capacitor (for VDDIO domain) BIOFR6 - TBD - ns VDD = VBAT = 2.5 ~ 5.5V, VDDIO = 1.8V, with 10pF capacitor (for VDDIO domain) NUC029XGE SERIES DATASHEET Oct 18, 2019 Page 138 of 159 Rev 1.02 NUC029xGE 8.3 AC Electrical Characteristics 8.3.1 External 4~20 MHz High Speed Crystal (HXT) Input Clock SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT Clock High Time tCHCX 10 - - ns Clock Low Time tCLCX 10 - - ns Clock Rise Time tCLCH 2 - 15 ns Clock Fall Time tCHCL 2 - 15 ns Input High Voltage VIH 0.7VDD - VDD V Input Low Voltage VIL 0 - 0.3VDD V tCLCL tCLCH VIH 90% tCLCX 10% VIL tCHCL tCHCX Note: Duty cycle is 50%. NUC029XGE SERIES DATASHEET Oct 18, 2019 Page 139 of 159 Rev 1.02 NUC029xGE 8.3.2 External 4~20 MHz High Speed Crystal (HXT) Oscillator SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT Oscillator frequency fHXT 4 - 20 Temperature THXT -40 - +105 °C - TBD - mA VDD = 5.5V @ 12 MHz Operating current IHXT - TBD - mA VDD = 3.3V @ 12 MHz 8.3.2.1 MHz VDD = 2.5 ~ 5.5 V Typical Crystal Application Circuits CRYSTAL C1 C2 R1 4 MHz ~ 20 MHz 20 pF 20 pF without XT_OUT NUC029XGE SERIES DATASHEET C2 XT_IN R1 C1 Figure 8.3-1 Typical Crystal Application Circuit Oct 18, 2019 Page 140 of 159 Rev 1.02 NUC029xGE 8.3.3 External 32.768 kHz Low Speed Crystal (LXT) Input Clock SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT Clock High Time tCHCX TBD - - ns Clock Low Time tCLCX TBD - - ns Clock Rise Time tCLCH TBD - TBD ns Clock Fall Time tCHCL TBD - TBD ns LXT Input Pin Input High Voltage Xin_VIH 0.7VLDO - VLDO V LXT Input Pin Input Low Voltage Xin_VIL 0 - 0.3VLDO V tCLCL tCLCH 90% Xin_VIH tCLCX Xin_VIL 10% tCHCL tCHCX Note: Duty cycle is 50%. NUC029XGE SERIES DATASHEET Oct 18, 2019 Page 141 of 159 Rev 1.02 NUC029xGE 8.3.4 External 32.768 kHz Low Speed Crystal (LXT) Input Clock SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT Oscillator frequency fLXT - 32.768 - kHz Temperature TLXT -40 - +105 °C Operating current ILXT 8.3.4.1 1 uA VDD = VBAT = 2.5 ~ 5.5 V VDD = VBAT = 2.5 ~ 5.5 V Typical Crystal Application Circuits CRYSTAL C3 C4 R2 32.768 kHz 20 pF 20 pF without XT_OUT C4 XT_IN R2 C3 NUC029XGE SERIES DATASHEET Figure 8.3-2 Typical Crystal Application Circuit Oct 18, 2019 Page 142 of 159 Rev 1.02 NUC029xGE 8.3.5 Internal 48 MHz High Speed RC Oscillator (HIRC48) SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT - 48 - MHz -1 - +1 % -2 - +2 % Center Frequency Calibrated Internal Oscillator Frequency fHRC TA = 25°C, VDD = 3.3V TA = 25°C, VDD = 2.5 ~ 5.5V TA = -40°C ~ +105°C, VDD = 2.5 ~ 5.5V TA = -40°C ~ +105°C, -0.25 - +0.25 % VDD = 2.5 ~ 5.5V Auto trimmed by LXT Operating current 8.3.6 IHRC - 440 - uA Internal 22.1184 MHz High Speed RC Oscillator (HIRC) SPECIFICATIONS PARAMETER SYM. Center Frequency fHRC TYP. MAX. UNIT - 22.1184 - MHz -1 - +1 % -2 - +2 % TA = 25°C, VDD = 3.3V TA = 25°C, VDD = 2.5 ~ 5.5V NUC029XGE SERIES DATASHEET Calibrated Internal Oscillator Frequency TEST CONDITION MIN. -40°C ~ +105°C, VDD = 2.5 ~ 5.5V -40°C ~ +105°C, -0.25 - +0.25 % VDD = 2.5 ~ 5.5V Auto trimmed by LXT Operating current Oct 18, 2019 IHRC - 470 - Page 143 of 159 uA Rev 1.02 NUC029xGE 8.3.7 Internal 10 kHz Low Speed RC Oscillator (LIRC) SPECIFICATIONS PARAMETER SYM. Center Frequency Calibrated Internal Oscillator Frequency Operating current fLRC ILRC TEST CONDITION MIN. TYP. MAX. UNIT - 10 - kHz -30 - +30 % -50 - +50 % 0.9 TA = 25°C, VDD = 3.3V TA = 25°C, VDD = 2.5 ~ 5.5V -40°C ~+105°C, VDD = 2.5 ~ 5.5V uA NUC029XGE SERIES DATASHEET Oct 18, 2019 Page 144 of 159 Rev 1.02 NUC029xGE 8.4 Analog Characteristics 8.4.1 LDO SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT Temperature TA -40 - +105 °C DC Power Supply VDD 2.5 - 5.5 V Output Voltage VLDO 1.62 1.8 1.98 V Note 1: It is recommended a 0.1uF bypass capacitor is connected between VDD and the closest VSS pin of the device. Note 2: For ensuring power stability, a 1uF Capacitor must be connected between LDO_CAP pin and the closest VSS pin of the device. 8.4.2 Temperature Sensor SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT TDET -40 - +105 °C Gain VTG -1.76 -1.70 -1.64 mV/°C Offset VTO - 747 - mV Operating current ITEMP - 16 - uA Temperature at 0°C Note: The temperature sensor formula for the output voltage (Vtemp) is as below equation. Vtemp (mV) = Gain (mV/ °C ) x Temperature (°C) + Offset (mV) 8.4.3 Internal Voltage Reference (Int_VREF) SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT VREF (2.048V) VREF1 1.986 - 2.151 V VREFCTL = 3, AVDD ≥ 2.5 V VREF (2.56V) VREF2 2.483 - 2.637 V VREFCTL = 3, AVDD ≥ 2.9 V VREF (3.072V) VREF3 2.98 - 3.164 V VREFCTL = 3, AVDD ≥ 3.4 V VREF (4.096V) VREF4 3.973 - 4.219 V VREFCTL = 3, AVDD ≥ 4.5 V Start-up Time TVREF_Start - 700 2000 us CVREF = 4.7 uF Operating current Oct 18, 2019 IVREF 100 Page 145 of 159 uA Rev 1.02 NUC029XGE SERIES DATASHEET Detection Temperature NUC029xGE 8.4.4 Power-on Reset SPECIFICATIONS PARAMETER Temperature Threshold Voltage 8.4.5 SYM. TEST CONDITION MIN. TYP. MAX. UNIT TA -40 - +105 °C VPOR - 2 - V Low-Voltage Reset SPECIFICATIONS PARAMETER Temperature Threshold Voltage Start-up Time Quiescent Current 8.4.6 SYM. TEST CONDITION MIN. TYP. MAX. UNIT -40 - +105 °C 2.0 2.2 2.45 V TA = +105°C 1.8 2.0 2.2 V TA = +25°C 1.75 1.95 2.2 V TA = -40°C TLVR_Start - 130 - us TA = +25°C ILVR - 1.1 - uA AVDD = 5.5V TA VLVR Brown-out Detector SPECIFICATIONS PARAMETER NUC029XGE SERIES DATASHEET Temperature Brown-out Voltage (Falling edge) Brown-out Voltage (Rising edge) Start-up Time Quiescent Current SYM. TA TEST CONDITION MIN. TYP. MAX. UNIT -40 - +105 °C 4.2 4.4 4.6 V BODVL [1:0] = 11 3.5 3.7 3.9 V BODVL [1:0] = 10 2.55 2.7 2.85 V BODVL [1:0] = 01 2.05 2.2 2.35 V BODVL [1:0] = 00 4.3 4.5 4.7 V BODVL [1:0] = 11 3.6 3.8 4.0 V BODVL [1:0] = 10 2.6 2.75 2.9 V BODVL [1:0] = 01 2.1 2.25 2.4 V BODVL [1:0] = 00 - 1030 - us TA = +25°C 83 - uA VBODF VBODR TBOD_Start BODLPM = 0 IBOD 0.7 Oct 18, 2019 TA = +25°C, AVDD = 5.5V Page 146 of 159 uA TA = +25°C, AVDD = 5.5V BODLPM = 1 Rev 1.02 NUC029xGE 8.4.7 12-bit ADC SPECIFICATIONS PARAMETER SYM. TEST CONDITION MIN. TYP. MAX. UNIT TA -40 - +105 °C Operating voltage AVDD 3.0 - 5.5 V Reference voltage VREF 3.0 AVDD V ADC input voltage VIN 0 AVREF V Temperature - Resolution RADC Integral Non-Linearity Error INL -2 +1.5 +2 LSB Differential Non-Linearity DNL -1 +1.5 +2 LSB Gain error EG -4 -1.5 +4 LSB Offset error EOFFSET -4 +1.5 +4 LSB EABS -4 - +4 LSB Absolute error Monotonic 12 - AVDD = VDD Bit Guaranteed - ADC Clock frequency FADC 1 Acquisition Time (Sample Stage) TACQ 2 7 21 1/FADC Default: 7 (1/FADC) Conversion time TCONV 15 20 34 1/FADC FSPS - - 800 KSPS CIN - TBD - pF RIN - TBD - kΩ IADC1 - 4 - mA (FADC/TCONV) Internal Capacitance [1] Input Load Operating current [1] MHz TCONV = TACQ + 13 Default: 20 (1/FADC) TCONV = 20 clock FADC = 16 MHz AVDD = VDD = 5V ADC Clock Rate = 16 MHz Note: Design by guarantee, no test in production. Oct 18, 2019 Page 147 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET Conversion Rate 16 NUC029xGE EF (Full scale error) = EO + EG Gain Error Offset Error EG EO 4095 4094 4093 4092 Ideal transfer curve 7 6 ADC output code 5 Actual transfer curve 4 3 2 DNL 1 1 LSB 4095 Analog input voltage (LSB) Offset Error EO NUC029XGE SERIES DATASHEET Note: The INL is the peak difference between the transition point of the steps of the calibrated transfer curve and the ideal transfer curve. A calibrated transfer curve means it has calibrated the offset and gain error from the actual transfer curve. Typical connection diagram using the ADC VDD (1) AINx RIN 12-bit Converter (1) CIN Note: GND < AINX “Power supply for PE.8~PE.13”. 2019.10.18 1.02 1. Added the sections of thermal characteristics, EMC characteristics, package moisture sensitivity, and soldering profile in section 8.1. NUC029XGE SERIES DATASHEET Oct 18, 2019 Page 158 of 159 Rev 1.02 NUC029xGE Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. Such applications are deemed, “Insecure Usage”. Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic energy control instruments, airplane or spaceship instruments, the control or operation of dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types of safety devices, and other applications intended to support or sustain life. All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the damages and liabilities thus incurred by Nuvoton. Oct 18, 2019 Page 159 of 159 Rev 1.02 NUC029XGE SERIES DATASHEET Important Notice
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