AZ5125-02S
Transient Voltage Suppressing Device
For ESD/Transient Protection
Features
lines or control/data lines,
downstream components.
ESD Protect for 2 Lines with Bi-directional
Provide ESD protection for the protected line to
protecting
any
IEC 61000-4-2 (ESD) ±15kV (air), ±15kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
Cable Discharge Event (CDE)
Small SOT23-3L package saves board space
Protect two I/O lines or two power lines
Fast turn-on and Low clamping voltage
Low operating voltage: 5V
Solid-state silicon-avalanche and active circuit
triggering technology
Green Part
AZ5125-02S is bi-directional and may be used on
lines where the signal swings above and below
ground.
AZ5125-02S may be used to meet the ESD
immunity requirements of IEC 61000-4-2, Level 4
(±15kV air, ±8kV contact discharge).
Circuit Diagram /
Pin Configuration
3
Applications
Computer Interfaces Protection
Microprocessors Protection
Serial and Parallel Ports Protection
Control Signal Lines Protection
Power lines on PCB Protection
Latchup Protection
1
2
Description
SOT23-3L (Top View)
AZ5125-02S is a design which includes two
bi-directional ESD rated clamping cells to protect
two power lines, or two control lines, or two low
speed data lines in an electronic systems. The
AZ5125-02S has been specifically designed to
protect sensitive components which are
connected to power and control lines from
over-voltage damage and latch-up caused by
Electrostatic Discharging (ESD), Electrical Fast
Transients (EFT), and Cable Discharge Event
(CDE).
AZ5125-02S is a unique design which includes
proprietary clamping cells in a single package.
During transient conditions, the proprietary
clamping cells prevent over-voltage on the power
Revision 2011/07/28 ©2011-2012
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AZ5125-02S
Transient Voltage Suppressing Device
For ESD/Transient Protection
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETER
PARAMETER
RATING
UNITS
VDC
±5.8
V
Operating Supply Voltage (pin-1,-2 to pin-3)
ESD per IEC 61000-4-2 (Air)
±15
VESD
ESD per IEC 61000-4-2 (Contact)
Lead Soldering Temperature
TSOL
kV
±15
260 (10 sec.)
o
C
Operating Temperature
TOP
-55 to +85
o
Storage Temperature
TSTO
-55 to +150
o
C
C
ELECTRICAL CHARACTERISTICS
PARAMETER
Reverse Stand-Off
Voltage
Reverse Leakage
Current
Reverse
Breakdown Voltage
ESD Clamping
Voltage
Channel Input
Capacitance
SYMBOL
VRWM
CONDITIONS
T=25 oC
ILeak
VRWM = ±5V, T=25 oC.
VBV
IBV = 1mA, T=25 oC.
VESD_CL
CIN
Revision 2011/07/28 ©2011-2012
TYP
-5
5.8
IEC 61000-4-2 +6kV, T=25 oC,
Contact mode
VR= 0V, f = 1MHz, T=25 oC.
Amazing Micro.
MINI
2
MAX
UNITS
5
V
1
µA
9
V
11.5
6
V
8
pF
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AZ5125-02S
Transient Voltage Suppressing Device
For ESD/Transient Protection
Typical Variation of CIN vs. VIN
8
Input Capacitance (pF)
7
6
Pin-1, -2 to pin-3
5
4
3
2
f = 1MHz, T=25 oC,
1
0
-5
-4
-3
-2
-1
0
1
2
3
4
5
Transmission Line Pulsing (TLP) Current (A)
Typical Characteristics
V_pulse
Pulse from a
transmission line
TLP_I
100ns
+
TLP_V
DUT
-
Pin-1, -2 to Pin-3
-12 -10
-8
-6
-4
-2
0
2
4
6
8
10
Transmission Line Pulsing (TLP) Voltage (V)
Input Voltage (V)
Revision 2011/07/28 ©2011-2012
Transmission Line Pulsing (TLP) Measurement
18
16
14
12
10
8
6
4
2
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
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AZ5125-02S
Transient Voltage Suppressing Device
For ESD/Transient Protection
Applications Information
In order to obtain enough suppression of ESD
induced transient, good circuit board is critical.
The AZ5125-02S is designed to protect two lines
Thus, the following guidelines are recommended:
against
System
ESD/EFT/Cable-Discharging
pulses by clamping them to an acceptable
reference. It provides bi-directional protection.
Minimize the path length between the
protected lines and the AZ5125-02S.
Place the AZ5125-02S near the input
terminals or connectors to restrict transient
The usage of the AZ5125-02S is shown in Fig. 1.
Protected lines, such as data lines, control lines,
coupling.
or power lines, are connected at pin 1 and pin 2
The ESD current return path to ground
should be kept as short as possible.
respectively. The pin 3 is connected to a ground
Use ground planes whenever possible.
plane on the board. In order to minimize parasitic
NEVER route critical signals near board
inductance in the board traces, all path lengths
edges and near the lines which the ESD
connected to the pins of AZ5125-02S should be
transient easily injects to.
kept as short as possible.
Input
Output
VBR
Transient
Voltage
-VBR
VCL
gnd
gnd
-VCL
VBR
Normal
Operation
-VBR
gnd
gnd
Protected
Devices
1
2
3
Fig. 1
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AZ5125-02S
Transient Voltage Suppressing Device
For ESD/Transient Protection
Mechanical Details
SOT23-3L PACKAGE DIAGRAMS
TOP VIEW
END VIEW
SIDE VIEW
PACKAGE DIMENSIONS
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AZ5125-02S
Transient Voltage Suppressing Device
For ESD/Transient Protection
LAND LAYOUT
0.9mm
1.4mm
3.5mm
0.7mm
0.95mm
0.95mm
1.4mm
0.9mm
1.0mm
0.9mm
Notes:
This LAND LAYOUT is for reference purposes only. Please consult your manufacturing
partners to ensure your company’s PCB design guidelines are met.
MARKING CODE
3
202X
502XY
1
Part Number
Marking Code
AZ5125-02S
502XY
2
502 = Device Code
X = Date Code
Y = Control Code
Ordering Information
PN#
Material
Type
Reel size
MOQ/internal box
MOQ/carton
AZ5125-02S.R7G
Green
T/R
7 inch
4 reel=12,000/box
6 box=72,000/carton
Revision 2011/07/28 ©2011-2012
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AZ5125-02S
Transient Voltage Suppressing Device
For ESD/Transient Protection
Revision History
Revision
Modification Description
Revision 2009/04/22
Preliminary Release.
Revision 2009/08/19
Formal Release.
Revision 2011/07/28
1. Update the Company Logo.
2. Add the Ordering Information.
Revision 2011/07/28 ©2011-2012
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