74LV4060DB,112

74LV4060 14-stage binary ripple counter with oscillator Rev. 4 — 17 March 2016 Product data sheet 1. General description The 74LV4060 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC4060; 74HCT4060. The 74LV4060 is a 14-stage ripple-carry counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC). It has ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator can be replaced by an external clock signal at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances on the negative-going transition of RS. A HIGH-level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of the other input conditions. 2. Features and benefits          Wide operating voltage range from 1.0 V to 5.5 V Optimized for low voltage applications from 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V; Tamb = 25 C Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V; Tamb = 25 C All active components on-chip RC or crystal oscillator configuration Complies with JEDEC standard no. 7A ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115A exceeds 200 V 3. Applications     Control counters Timers Frequency dividers Time-delay circuits 74LV4060 Nexperia 14-stage binary ripple counter with oscillator 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV4060D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74LV4060DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74LV4060PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 5. Functional diagram   57& &7&   56 05 4  4  4  4  4  4  4  4  4  4  DDL Fig 1. Logic symbol &75  &75  * &7&      57&  56    05     &7 &7   $1'       &7   &7            D   E DDL Fig 2. IEC logic symbol 74LV4060 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 17 March 2016 © Nexperia B.V. 2017. All rights reserved 2 of 22 74LV4060 Nexperia 14-stage binary ripple counter with oscillator &7& ))  57& 56 ))  ))  &3 &3 &3 &3 4 05 4 05 4 05 4 05 ))  &3 4 4 05 ))  4 05 4 4 DDL Fig 3. Logic diagram   57&   &7& 56 &3 05 67$*(%,1$5