NJM2073M(TE3)

NJM2073 DUAL LOW VOLTAGE POWER AMPLIFIER ■ GENERAL DESCRIPTION The NJM2073 is a monolithic integrated circuit in 8 lead dual-in-line package,which is designed for dual audio power amplifier in portable radio and handy cassette player. ■ FEATURES ● Operating Voltage ● Low Crossover Distortion ● Low Operating Current ● Bridge or Stereo Configuration ● No Turn-on Noise ● Package Outline ● Bipolar Technology ( V+=1.8V~15V ) ■ PACKAGE OUTLINE NJM2073D NJM2073M DIP8,DMP8 ■ PIN CONFIGURATION NJM2073D NJM2073M Ver.2004-03-01 -1- NJM2073 ■ ABSOLUTE MAXIMUM RATINGS ( Ta=25˚C ) PARAMETER SYMBOL RATINGS UNIT Supply Voltage Output Peak Current V+ IOP V A Power Dissipation PD Input Voltage Range Operating Temperature Range Storage Temperature Range VIN Topr Tstg 15 1 ( DIP8 ) 700 ( DMP8 ) 300 ± 0.4 -40~+85 -40~+125 mW V ˚C ˚C ■ ELECTRICAL CHARACTERISTICS D-Type (1) BTL Configuration ( Test Circuit Fig.1 ) PARAMETER Operating Voltage Operating Current Output Offset Voltage ( Between the Outputs ) Input Bias Current Output Power SYMBOL V+ ICC ∆VO Ripple Rejection Cutoff Frequency TEST CONDITION RL=∞ RL=8Ω IB PO PO PO PO PO PO Total Harmonic Distortion Close Loop Voltage Gain Input Impedance Equivalent Input Noise Voltage ( V+=6V,Ta=25˚C ) PO PO THD AV ZIN VNI1 VNI2 RR fH THD=10%,f=1kHz V+=9V,RL=16Ω ( Note ) V+=6V,RL=8Ω ( Note ) V+=4.5V,RL=8Ω V+=4.5V,RL=4Ω ( Note ) V+=3V,RL=4Ω V+=2V,RL=4Ω THD=1%,f=40Hz~15kHz V+=6V,RL=8Ω V+=4.5V,RL=4Ω PO=0.5W,RL=8Ω,f=1kHz f=1kHz f=1kHz RS=10kΩ,A Curve RS=10kΩ,B=22Hz~22kHz f=100Hz AV=-3dB from f=1kHz,RL=8Ω,PO=1W MIN. 1.8 - TYP. 6 10 MAX. 15 9 50 UNIT V mA mV - 100 - nA 0.9 200 - 2.0 1.2 0.6 0.8 300 80 - W W W W mW mW 41 100 - 1.0 0.6 0.2 44 2 2.5 40 130 47 - W W % dB kΩ µV µV dB kHz ( Note ) At on PC Board -2- Ver.2004-03-01 NJM2073 (2) Stereo Configuration ( Test Circuit Fig.2 ) PARAMETER Operating Voltage Output Voltage Operating Current Input Bias Current Output Power ( Each Channel ) SYMBOL V+ VO ICC IB PO PO PO PO Total Harmonic Distortion Voltage Gain Channel Balance Input Impedance Equivalent Input Noise Voltage Ripple Rejection Cutoff Frequency PO PO THD AV ∆AV ZIN VNI1 VNI2 RR fH TEST CONDITION RL=∞ THD=10%,f=1kHz V+=6V,RL=4Ω ( Note ) V+=4.5V,RL=4Ω V+=3V,RL=4Ω V+=2V,RL=4Ω THD=1%,f=1kHz V+=6V,RL=4Ω V+=4.5V,RL=4Ω PO=0.4W,RL=4Ω,f=1kHz f=1kHz f=1kHz RS=10kΩ,A Curve RS=10kΩ,B=22Hz~22kHz f=100Hz,CX=100µF AV=-3dB from f=1kHz,RL=8Ω,PO=250mW MIN. 1.8 - TYP. 2.7 6 100 MAX. 15 9 - UNIT V V mA nA 0.5 - 0.65 0.32 120 30 - W W mW mW 41 100 24 - 500 250 0.25 44 2.5 3 30 200 47 ±1 - mW mW % dB dB kΩ µV µV dB kHz ( Note ) At on PC Board ■ ELECTRICAL CHARACTERISTICS M-Type (1) BTL Configuration ( Test Circuit Fig.1 ) PARAMETER Operating Voltage Operating Current Output Offset Voltage ( Between the Outputs ) Input Bias Current Output Power SYMBOL V+ ICC ∆VO Ripple Rejection Cutoff Frequency TEST CONDITION RL=∞ RL=8Ω IB PO PO PO PO Total Harmonic Distortion Close Loop Voltage Gain Input Impedance Equivalent Input Noise Voltage ( V+=6V,Ta=25˚C ) PO THD AV ZIN VNI1 VNI2 RR fH THD=10%,f=1kHz V+=6V,RL=16Ω ( Note ) V+=4V,RL=8Ω ( Note ) V+=3V,RL=4Ω ( Note ) V+=2V,RL=4Ω THD=1%,f=40Hz~15kHz V+=4V,RL=8Ω V+=4V,RL=8Ω,PO=200mW,f=1kHz f=1kHz f=1kHz RS=10kΩ,A Curve RS=10kΩ,B=22Hz~22kHz f=100Hz AV=-3dB from f=1kHz,RL=16Ω,PO=0.5W MIN. 1.8 - TYP. 6 10 MAX. 15 9 50 UNIT V mA mV - 100 - nA 350 200 - 0.8 460 300 80 - W mW mW mW 41 100 - 380 0.2 44 2 2.5 40 130 47 - mW % dB kΩ µV µV dB kHz ( Note ) At on PC Board Ver.2004-03-01 -3- NJM2073 (2) Stereo Configuration ( Test Circuit Fig.2 ) PARAMETER Operating Voltage Output Voltage Operating Current Input Bias Current Output Power ( Each Channel ) SYMBOL V+ VO ICC IB PO PO PO PO PO Total Harmonic Distortion Voltage Gain Channel Balance Input Impedance Equivalent Input Noise Voltage Ripple Rejection Cutoff Frequency PO THD AV ∆AV ZIN VNI1 VNI2 RR fH TEST CONDITION RL=∞ THD=10%,f=1kHz V+=6V,RL=16Ω V+=5V,RL=8Ω ( Note ) V+=4V,RL=4Ω ( Note ) V+=3V,RL=4Ω V+=2V,RL=4Ω THD=1%,f=1kHz V+=4V,RL=4Ω V+=4V,RL=4Ω,PO=150mW,f=1kHz f=1kHz f=1kHz RS=10kΩ,A Curve RS=10kΩ,B=22Hz~22kHz f=100Hz,CX=100µF AV=-3dB from f=1kHz,RL=16Ω,PO=125mW MIN. 1.8 - TYP. 2.7 6 100 MAX. 15 9 - UNIT V V mA nA 180 - 240 270 250 120 30 - mW mW mW mW mW 41 100 24 - 180 0.25 44 2.5 3 30 200 47 ±1 - mW % dB dB kΩ µV µV dB kHz ( Note ) At on PC Board ■ TYPICAL APPLICATION & TEST CIRCUIT Fig.1 BTL Configuration Fig.2 Stereo Configuration note:pin No.to D,M-Type -4- Ver.2004-03-01 NJM2073 ■ PARASTIC OSCILLATION PREVEMTING CIRCUIT Put 1Ω+0.22µF on parallel to load,if the load is speaker.Recommend putting 0.1µF and more than 100µF capacitors with good high frequency characteristics in to near ground and supply voltage pins. In BTL operation of less than 2V supply voltage,parastic oscillation may be occurred with R=1Ω.And so recommended R to be the same value of pure resistance(r) when it is lower than 3V. ■ MUTING CIRCUIT When Mute ON.OUTPUT level saturates to GND side. Fig.3 BTL Configuration Fig.4 Stereo Configuration ■ VOLTAGE GAIN REDUCTION APPLICATION EXAMPLE (1) Outline of way to further Reduction NJM2073 by taking in assamption,as one of OP-AMP ( Gain 44dB,minus input impedance about 300Ω ),to feedback from output to minus input helps to get reduction of stabilized Voltage Gain.Fig.5 indicates the model example. Here is the point to be noticed that,in order to get the appropriate output Bias Voltage,it is important to keep the minus input floating as DC condition,(inserting CX),and also that when extended too much reduction of Gain might cause Oscillation due to high band phase margin.The reduction of voltage gain is limited at around 26dB (20 times),and when oscillation,it in necessary to attach the oscillation stopper.Please examine the CX value accordingly to the application requirement. Fig.5 Model of Voltage Gain Reduction Ver.2004-03-01 -5- NJM2073 (2) The Application Example of Voltage Gain Reduction. ( STEREO ) Fig.6 indicates the application example and Table1 indicates the recommendable value of parts to be attached externally. Table1,Applicating purpose and Recommended Value of Externally parts to be attached. EXTERNAL PARTS Rg Rs Rf CX APPLICATION PURPOSE Plus input to be grounded by fixed DC AV shall be decided with Rf AV shall be decided with Rs CCUP Minus input to be grounded by fixed DC Output DC Decoupling CP1 CP2 r C Stabilization of V+ Prevention of Oscillation Prevention of Oscillation Prevention of Oscillation RECOMMENDED VALUE Under about 100kΩ About 5kΩ When RL=8Ω,More than 220µF More than about CCUP More than 0.1µF About RL 0.22µF REMARKS Catch the noise when much higher. The co-temperature of AV becomes higher in case when RS is higher resistance.The current from output pin to GND becomes higher,in case when RS is lower resistance.(The current sinks in vain.) Low-band Cut off frequency (fL) is to be decided. The rise time becomes longer in case that CX is big. fL shall be decided by CCUP and ZL. Inserting near around V+ pin and GND pin. Inserting near around V+ pin and GND pin. To be examined by about the resistor volume of the speaker load. Fig.6 STEREO Application Example. -6- Ver.2004-03-01 NJM2073 ● Application for Voltage Gain Reduction ( BTL ) Fig.7 indicates the application example,Table2 shows recommended value of externally attaching parts. Table2 Applicating purpose and Recommended Value of External Part EXTERNAL PARTS Rg Rs Rf C1 C2 CP1 CP2 r C APPLICATION PURPOSE DC condition ground of plus input AV shall be decided with Rf AV shall be decided with Rs RECOMMENDED VALUE Below about 10kΩ About 5kΩ Releasing minus input in to DC condition Preventing Oscillation About 0.02µF Stability of V+ Preventing Oscillation Preventing Oscillation Preventing Oscillation Preventing Oscillation More than about 100µF More than 0.1µF About RL 0.22µF REMARKS Making noise when higher. Temperature feature to be increased accordingly as in higher AV value. When lower,to be trended of Oscillation. Setting up low band Cut-off frequency (fL). More higher,the rise time become longer. The more higher in value,the high band THD,due to phase slipping to be deteriorated. When lower,to be trended of oscillation. + Inserting near around at V and the GND pin. Inserting near around at V+ and the GND pin. To be examined at around pure resister Value of speaker load. Fig.7 BTL Application Ver.2004-03-01 -7- NJM2073 ■ TYPICAL CHARACTERISTICS -8- Ver.2004-03-01 NJM2073 ■ TYPICAL CHARACTERISTICS Ver.2004-03-01 -9- NJM2073 ■ TYPICAL CHARACTERISTICS - 10 - Ver.2004-03-01 NJM2073 ■ TYPICAL CHARACTERISTICS [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.2004-03-01 - 11 -