LP3992-18B5F

Preliminary Datasheet LP3992 300mA,Ultra-low noise, Small Package Ultra-Fast CMOS LDO Regulator General Description Features The LP3992 is designed for portable RF and wireless  Ultra-Low-Noise for RF Application applications with demanding performance and space  2.5V- 5.5V Input Voltage Range requirements. The LP3992 performance is optimized  Low Dropout : 220mV @ 300mA for battery-powered systems to deliver ultra low noise  1.2V, 1.5V, 1.8V, 2.5V, 2.8V,3.0V,3.3V, 3.6V and and low quiescent current. The LP3992 also works 5V Fixed with low-ESR ceramic capacitors, reducing the amount  300mA Output Current of board space necessary for power applications,  High PSSR:-76dB at 1KHz critical in hand-held wireless devices. The LP3992  < 0.01uA Standby Current When Shutdown consumes less than 0.01µA in shutdown mode and  Available in SOT23-5 and TSOT23-5 Package has fast turn-on time less than 50µs. The other  TTL-Logic-Controlled Shutdown Input features include ultra low dropout voltage, high output  Ultra-Fast Response in Line/Load transient accuracy, current limiting protection, and high ripple  Current Limiting and Thermal Shutdown rejection ratio. It is available in the 5-lead of SOT23-5 Protection and TSOT23-5 packages.  Order Information Applications LP3992 □ □ □ □ □ F: Pb-Free Package Type B3: SOT23-3 B5: SOT23-5 J5: TSOT23-5 Output Type Quick start-up (typically 50uS)  Portable Media Players/MP3 players  Cellular and Smart mobile phone  LCD  DSC Sensor  Wireless Card Typical Application Circuit 12: 1.2V 15: 1.5V 18: 1.8V 25: 2.5V 28: 2.8V 30: 3.0V 33: 3.3V 36: 3.6V 50: 5.0V LP3992-05 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 9 Preliminary Datasheet LP3992 Marking Information Device Marking Package Shipping Device Marking Package Shipping LP3992-12B5F LPS SOT23-3 3K/REEL LP3992-28B5F LPS SOT23-3 3K/REEL 1BYWX SOT23-5 1HYWX SOT23-5 TSOT23-5 LP3992-15B5F LPS SOT23-3 1NYWX SOT23-5 TSOT23-5 3K/REEL LP3992-30B5F LPS SOT23-3 1GYWX SOT23-5 TSOT23-5 LP3992-18B5F LPS SOT23-3 1CYWX SOT23-5 TSOT23-5 3K/REEL LP3992-33B5F LPS SOT23-3 1EYWX SOT23-5 TSOT23-5 LP3992-25B5F LPS SOT23-3 1DYWX SOT23-5 3K/REEL 3K/REEL TSOT23-5 3K/REEL Y: Y is year code. W: W is week code. X: X is series number. TSOT23-5 Functional Pin Description Package Type Pin Configurations Top View TSOT23-5 SOT-23-5 SOT-23-3 VIN 1 GND 2 EN 3 Top View 5 VOUT VIN 4 2 VOUT 1 GND 3 NC TSOT23-5/SOT-23-5 SOT-23-3 Pin Description Pin Name Description 3 VIN Power Input Voltage. 1 GND Ground. 3 EN Chip Enable (Active High). 4 NC No Connection. VOUT Output Voltage. SOT23-5 SOT23-3 1 2 5 LP3992-05 2 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 9 Preliminary Datasheet LP3992 Function Diagram Absolute Maximum Ratings  Supply Input Voltage --------------------------------------------------------------------------------------------------- 6.5V  Other Pin Voltage ------------------------------------------------------------------------------------- -0.3V to VIN+0.3V Power Dissipation, PD @ TA = 25°C  T/SOT23-5 ---------------------------------------------------------------------------------------------------------- 500mW  SOT23-3 --------------------------------------------------------------------------------------------------------------- 500mW Package Thermal Resistance  Thermal Resistance(SOT23-5/SOT23) (JA) --------------------------------------------------------------- 195℃/W  Thermal Resistance(SOT23-5/SOT23) (JC) ----------------------------------------------------------------- 60℃/W  Maximum Junction Temperature ---------------------------------------------------------------------------------- 150°C  Maximum Soldering Temperature (at leads, 10 sec) -------------------------------------------------------- 260°C  Storage Temperature Range -------------------------------------------------------------------------- −65°C to 165°C ESD Susceptibility  HBM (Human Body Mode) --------------------------------------------------------------------------------------------- 2kV  MM(Machine-Mode) --------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions  Supply Input Voltage ---------------------------------------------------------------------------------------- 2.5V to 5.5V  EN Input Voltage ------------------------------------------------------------------------------------------- 0V toVin+0.3V  Operation Junction Temperature Range ----------------------------------------------------------- −40°C to 125°C  Operation Ambient Temperature Range ------------------------------------------------------------ −40°C to 85°C LP3992-05 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 9 Preliminary Datasheet LP3992 Electrical Characteristics (LP3992-33B5F,VIN = VOUT + 1V, CIN = COUT = 1µF, TA = 25° C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ. Max Units Output Voltage Accuracy ΔVOUT IOUT = 1mA −3 -- +3 % Output Voltage VOUT IOUT = 1mA Output Loading Current ILOAD VEN=VIN,VIN>2.5V 300 Current Limit ILIM RLOAD = 1Ω 420 Quiescent Current IQ VEN ≥ 1.2V, IOUT = 0mA 75 130 Dropout Voltage VDROP IOUT = 200mA, VOUT > 2.8V 130 200 IOUT = 300mA, VOUT > 2.8V 220 300 Line Regulation ΔVLINE Load Regulation ΔLOAD 1mA < IOUT < 300mA Standby Current ISTBY VEN = GND, Shutdown EN Input Bias Current IIBSD VEN = 3V VIL VIN = 3V to 5.5V, Shutdown Logic-Low EN Threshold Voltage Logic-High Voltage VIH 3.33 450 200mA, COUT = 1µF %/A 0.01 1 μA 1.5 3.5 μA 0.4 VIN+ 1.4 300 -76 Rejection Rate f = 10kHz IOUT = 100mA −65 May.-2017 Email: marketing@lowpowersemi.com V 0.3 COUT = 1µF, LP3992-05 mV 2 f = 1kHz TSD μA %/V Power Supply Thermal Shutdown Temperature mA 0.2 IOUT = 50mA 10Hz to 100kHz, IOUT = Output Noise Voltage mA VIN = (VOUT + 1V) to 5.5V, VIN = 3V to 5.5V, Start-Up V 150 www.lowpowersemi.com uVRMS dB °C Page 4 of 9 Preliminary Datasheet LP3992 Typical Operating Characteristics LP3992-05 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 9 Preliminary Datasheet LP3992 Applications Information Like any low-dropout regulator, the external capacitors Thermal Considerations used with the LP3992 must be carefully selected for Thermal protection limits power dissipation in LP3992. regulator stability and performance. Using a capacitor whose value is > 1µF on the LP3992 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR When the operation junction temperature exceeds 150°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turns on again after the junction temperature cools by 25°C. For continue operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is: (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The LP3992 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1µF with ESR is > 25mΩ on the PD = (VIN−VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula: LP3992 output ensures stability. The LP3992 still works well with output capacitor of other types due to the wide stable ESR range. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the LP3992 and returned to a clean analog ground. PD(MAX) = ( TJ(MAX) − TA ) /θJA Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of LP3992, where TJ(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction Start-up Function Enable Function to The LP3992 features an LDO regulator enable/disable dependent) for SOT23-5 package is 195°C/W. function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.4 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4 volts. For to protecting the system, the LP3992 have a ambient thermal resistance (θJA is layout PD(MAX) = (125°C−25°C) / 195 = 500mW The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. quick-discharge function. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state. LP3992-05 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 6 of 9 Preliminary Datasheet LP3992 Packaging Information SOT23-5 LP3992-05 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 9 Preliminary Datasheet LP3992 TSOT23-5 LP3992-05 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 8 of 9 Preliminary Datasheet LP3992 SOT23-3 LP3992-05 May.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 9 of 9