LP1130SOF

Preliminary Datasheet LP1130 Half-Bridge IPM General Description Features The LP1130 is a high efficiency synchronous buck  Up to 30V DC VIN voltage  4.4V to 13.2V supply voltage the  Up to 5A output current synchronous buck configuration. The high side and  Up to 500kHz Switching Frequency low side MOSFETs has ultra low RDS(ON) to minimize  3.3V/5V logic input compatible  Disable function a highly versatile power module.  ROHS compliant and Lead(Pb)- free Order Information Typical Application Circuit power stage module consisting of two asymmetrical MOSFETs and an integrated driver. The MOSFETs are individually optimized for operation in conduction losses. A number of features are provided making the LP1130 LP1130 VCC F: Pb Free LP1130 C1 Package Type SO: SOP-8 4 C2 VCC BST EN 3 PWM Applications  VIN General Wireless Power Transmitter for Consumer, Industrial and Medical Applications  Full or Half Bridge DC-DC Switching Regulator  Motor Driver VIN EN SWN 2 PWM PGND C3 1 8 5,6 7 L1 VOUT C4 Marking Information Device Marking Package Shipping LP1130 LPS SOP-8 4K/REEL LP1130 YWX Y:Production year W:Production period X:Production batch LP1130-01 Apr.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 5 Preliminary Datasheet LP1130 Functional Pin Description Package Type Pin Configurations BST 1 8 VIN PWM 2 7 PGND EN 3 6 SWN VCC 4 5 SWN SOP-8 Pin Name Description Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and 1 BST SW pins holds this bootstrap voltage for the high-side MOSFET as it is switched. The recommended capacitor value is between 100nF and 1.0μF. An external diode is required with the LP1130. 2 PWM Logic-Level Input. This pin has primary control of the drive outputs. 3 EN Active high output enable. When low, normal operation is disabled. 4 VCC Input Supply. A 1.0μF ceramic capacitor should be connected from this pin to PGND. 5,6 SWN Switch Node. Connect to the source of the upper MOSFET. 7 PGND Power Ground. Should be closely connected to the source of the lower MOSFET. 8 VIN LP1130-01 Apr.-2018 Source for the upper MOSFET Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 5 Preliminary Datasheet LP1130 Function Diagram BST VIN PWM Anti-Cross Conduction LOGIC EN VCC SWN VCC UVLO OTP PGND Absolute Maximum Ratings  VCC ----------------------------------------------------------------------------------------------------------------- -0.3V to 15V  VIN ------------------------------------------------------------------------------------------------------------------- -0.3V to 30V  BST  BST to SWN ------------------------------------------------------------------------------------------------------ -0.3V to 15V  SWN ------------------------------------------------------------------------------------------------------------------- -5V to 20V  EN,PWM ---------------------------------------------------------------------------------------------------------- -0.3V to 6.5V  Maximum Junction Temperature ------------------------------------------------------------------------------------ 160℃  Maximum Soldering Temperature (at leads,10 sec) ----------------------------------------------------------- 260℃  Storage Temperature --------------------------------------------------------------------------------------- -55℃ to 165℃  Operating Ambient Temperature Range --------------------------------------------------------------------------------------------------------------- -0.3V to 35V -------------------------------------------------------------- -40℃ to 85℃ Note1：All voltages are with respect to PGND except where noted. Note2：Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note3: This device is ESD sensitive. Use standard ESD precautions when handling. Thermal Information Package Thermal Resistance (Note4)  Maximum Power Dissipation (PD,TA=25℃) ------------------------------------------------------------------------ 1.5W  Junction to Ambient, θJA----------------------------------------------------------------------------------------------- 80℃/W Note4：2 layer board, 1 in2 Cu, 1 oz thickness. LP1130-01 Apr.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 5 Preliminary Datasheet LP1130 Electrical Characteristics (TA=25°C, unless otherwise noted.) Characteristic Symbol Condition Min Typ Max Unit 4.4 − 13.2 V − 0.7 − mA Supply Supply Voltage Range VCC − Supply Current ISYS VBST=12V, VEN=0V Input Voltage High VEN_HI − 2.0 − − V Input Voltage Low VEN_LO − − − 0.8 V Hysteresis VEN_HYS − − 300 − mV Input Current IEN No internal pull-up or pull-down resistors −1.0 − +1.0 μA Input Voltage High VPWM_HI − 2.0 − − V Input Voltage Low VPWM_LO − − − 0.8 V Hysteresis VPWM-HYS − − 300 − mV Input Current IPWM No internal pull-up or pull-down resistors −1.0 − +1.0 μA UVLO Startup VUVLO − - 4.3 - V Hysteresis VUVLO-HYS − - 0.3 - V Zero Gate Voltage Drain Current IDSS VIN=30V, EN=0 1 μA High side switch On-Resistance RDS(ON)-H Low side switch On-Resistance RDS(ON)-L EN Input PWM Input Under Voltage Lockout POWER MOSFET 9 VCC=9V 16 mΩ THERMAL SHUTDOW N Thermal shutdown threshold TSD 160 ℃ Thermal shutdown threshold hysteresis TSD-HYS 30 ℃ LP1130-01 Apr.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 4 of 5 Preliminary Datasheet LP1130 Packaging Information SOP-8 LP1130-01 Apr.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 5