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74HCT4052PW,118

74HCT4052PW,118

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    TSSOP16_5X4.4MM

  • 描述:

    双4通道模拟多路复用器/解复用器

  • 详情介绍
  • 数据手册
  • 价格&库存
74HCT4052PW,118 数据手册
74HC4052; 74HCT4052 Dual 4-channel analog multiplexer/demultiplexer Rev. 12 — 10 October 2017 1 Product data sheet General description The 74HC4052; 74HCT4052 is a dual single-pole quad-throw analog switch (2x SP4T) suitable for use in analog or digital 4:1 multiplexer/demultiplexer applications. Each switch features four independent inputs/outputs (nY0, nY1, nY2 and nY3) and a common input/output (nZ). A digital enable input (E) and two digital select inputs (S0 and S1) are common to both switches. When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2 Features and benefits • Wide analog input voltage range from -5 V to +5 V • Low ON resistance: – 80 Ω (typical) at VCC - VEE = 4.5 V – 70 Ω (typical) at VCC - VEE = 6.0 V – 60 Ω (typical) at VCC - VEE = 9.0 V • Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals • Typical ‘break before make’ built-in • Complies with JEDEC standard no. 7A • Input levels: – For 74HC4052: CMOS level – For 74HCT4052: TTL level • ESD protection: – HBM JESD22-A114F exceeds 2000 V – MM JESD22-A115-A exceeds 200 V – CDM JESD22-C101E exceeds 1000 V • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3 Applications • Analog multiplexing and demultiplexing • Digital multiplexing and demultiplexing • Signal gating 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 4 Ordering information Table 1. Ordering information Type number 74HC4052D Package Temperature range Name Description Version -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 -40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 -40 °C to +125 °C DHVQFN16 plastic dual-in line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm SOT763-1 74HCT4052D 74HC4052DB 74HCT4052DB 74HC4052PW 74HCT4052PW 74HC4052BQ 74HCT4052BQ 5 Functional diagram 10 13 1Z 1Y0 12 10 S0 1Y1 14 9 S1 1Y2 15 6 E 1Y3 11 2Y0 1 2Y1 5 2Y2 2 2Y3 4 0 9 1 6 G4 4× MDX 3 Figure 1.  Logic symbol 74HC_HCT4052 Product data sheet 0 1 1 5 2 2 3 4 12 13 2Z 3 0 3 14 15 11 001aah824 001aah825 Figure 2.  IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 2 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer nYn VCC VEE VCC VCC VCC VEE VEE from logic nZ mnb043 Figure 3.  Schematic diagram (one switch) VDD 16 13 12 14 15 S0 10 11 S1 E 9 LOGIC LEVEL CONVERSION 1Z 1Y0 1Y1 1Y2 1Y3 1-OF-4 DECODER 1 2Y0 6 5 2 4 8 7 VSS VEE 3 2Y1 2Y2 2Y3 2Z 001aah872 Figure 4.  Functional diagram 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 3 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 6 Pinning information 6.1 Pinning 2Y0 1 terminal 1 index area 2Y2 2 15 1Y2 2Z 3 14 1Y1 2Y3 4 13 1Z 2Y1 5 12 1Y0 2Y2 2 15 1Y2 E 6 2Z 3 14 1Y1 VEE 7 2Y3 4 13 1Z 2Y1 5 12 1Y0 E 6 11 1Y3 VEE 7 10 S0 GND 8 9 VCC(1) 11 1Y3 10 S0 9 16 VCC 8 1 S1 2Y0 GND 74HC4052 74HCT4052 16 VCC 74HC4052 74HCT4052 001aah823 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad.However, if it is soldered, the solder land should remain floating or be connected to VCC. S1 001aah822 Figure 5.  Pin configuration for SO16 and (T)SSOP16 Figure 6.  Pin configuration for DHVQFN16 6.2 Pin description Table 2. Pin description Symbol Pin Description 2Y0, 2Y1, 2Y2, 2Y3 1, 5, 2, 4 independent input or output 1Z, 2Z 13, 3 common input or output E 6 enable input (active LOW) VEE 7 negative supply voltage GND 8 ground (0 V) S0, S1 10, 9 select logic input 1Y0, 1Y1, 1Y2, 1Y3 12, 14, 15, 11 independent input or output VCC 16 positive supply voltage 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 4 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 7 Functional description Table 3. Function table [1] Input Channel on E S1 S0 L L L nY0 and nZ L L H nY1 and nZ L H L nY2 and nZ L H H nY3 and nZ H X X none [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care. 8 Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VEE = GND (ground = 0 V). Symbol Parameter Conditions [1] Min Max Unit -0.5 +11.0 V VCC supply voltage IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V - ±20 mA ISK switch clamping current VSW < -0.5 V or VSW > VCC + 0.5 V - ±20 mA ISW switch current -0.5 V < VSW < VCC + 0.5 V - ±25 mA IEE supply current - ±20 mA ICC supply current - 50 mA IGND ground current - -50 mA Tstg storage temperature -65 +150 °C - 500 mW - 100 mW Ptot total power dissipation SO16, SSOP16, TSSOP16 and DHVQFN16 package P power dissipation per switch [2] [1] To avoid drawing VCC current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into pins nZ, no VCC current will flow out of pins nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nYn and nZ may not exceed VCC or VEE. [2] For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K. 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 5 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 9 Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC Conditions supply voltage 74HC4052 74HCT4052 Unit Min Typ Max Min Typ Max VCC - GND 2.0 5.0 10.0 4.5 5.0 5.5 V VCC - VEE 2.0 5.0 10.0 2.0 5.0 10.0 V see Figure 7 and Figure 8 VI input voltage GND - VCC GND - VCC V VSW switch voltage VEE - VCC VEE - VCC V Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C Δt/ΔV input transition rise and VCC = 2.0 V fall rate VCC = 4.5 V - - 625 - - - ns/V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V VCC = 10.0 V - - 31 - - - ns/V mnb044 12 mnb045 12 VCC - GND (V) 10 VCC - GND (V) 8 8 operating area 6 operating area 4 4 2 0 0 4 8 VCC - VEE (V) 12 Figure 7.  Guaranteed operating area as a function of the supply voltages for 74HC4052 74HC_HCT4052 Product data sheet 0 0 4 8 VCC - VEE (V) 12 Figure 8.  Guaranteed operating area as a function of the supply voltages for 74HCT4052 All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 6 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 10 Static characteristics Table 6. RON resistance per switch for 74HC4052 and 74HCT4052 VI = VIH or VIL; for test circuit see Figure 9. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. For 74HC4052: VCC - GND or VCC - VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4052: VCC - GND = 4.5 V and 5.5 V, VCC - VEE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. Symbol Parameter Conditions Min [1] Typ Max Unit Tamb = -40 °C to +85 °C RON(peak) ON resistance (peak) Vis = VCC to VEE VCC = 2.0 V; VEE = 0 V; ISW = 100 μA RON(rail) ON resistance (rail) [2] - - - Ω VCC = 4.5 V; VEE = 0 V; ISW = 1000 μA - 100 225 Ω VCC = 6.0 V; VEE = 0 V; ISW = 1000 μA - 90 200 Ω VCC = 4.5 V; VEE = -4.5 V; ISW = 1000 μA - 70 165 Ω - 150 - Ω VCC = 4.5 V; VEE = 0 V; ISW = 1000 μA - 80 175 Ω VCC = 6.0 V; VEE = 0 V; ISW = 1000 μA - 70 150 Ω VCC = 4.5 V; VEE = -4.5 V; ISW = 1000 μA - 60 130 Ω - 150 - Ω VCC = 4.5 V; VEE = 0 V; ISW = 1000 μA - 90 200 Ω VCC = 6.0 V; VEE = 0 V; ISW = 1000 μA - 80 175 Ω VCC = 4.5 V; VEE = -4.5 V; ISW = 1000 μA - 65 150 Ω - - - Ω VCC = 4.5 V; VEE = 0 V - 9 - Ω VCC = 6.0 V; VEE = 0 V - 8 - Ω VCC = 4.5 V; VEE = -4.5 V - 6 - Ω Vis = VEE VCC = 2.0 V; VEE = 0 V; ISW = 100 μA [2] Vis = VCC VCC = 2.0 V; VEE = 0 V; ISW = 100 μA ΔRON ON resistance mismatch between channels 74HC_HCT4052 Product data sheet [2] Vis = VCC to VEE VCC = 2.0 V; VEE = 0 V All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 [2] © Nexperia B.V. 2017. All rights reserved. 7 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Symbol Parameter Conditions Min [1] Typ Max Unit Tamb = -40 °C to +125 °C Vis = VCC to VEE RON(peak) ON resistance (peak) [2] VCC = 2.0 V; VEE = 0 V; ISW = 100 μA RON(rail) - - - Ω VCC = 4.5 V; VEE = 0 V; ISW = 1000 μA - - 270 Ω VCC = 6.0 V; VEE = 0 V; ISW = 1000 μA - - 240 Ω VCC = 4.5 V; VEE = -4.5 V; ISW = 1000 μA - - 195 Ω - - - Ω VCC = 4.5 V; VEE = 0 V; ISW = 1000 μA - - 210 Ω VCC = 6.0 V; VEE = 0 V; ISW = 1000 μA - - 180 Ω VCC = 4.5 V; VEE = -4.5 V; ISW = 1000 μA - - 160 Ω - - - Ω VCC = 4.5 V; VEE = 0 V; ISW = 1000 μA - - 240 Ω VCC = 6.0 V; VEE = 0 V; ISW = 1000 μA - - 210 Ω VCC = 4.5 V; VEE = -4.5 V; ISW = 1000 μA - - 180 Ω Vis = VEE ON resistance (rail) [2] VCC = 2.0 V; VEE = 0 V; ISW = 100 μA Vis = VCC [2] VCC = 2.0 V; VEE = 0 V; ISW = 100 μA [1] All typical values are measured at Tamb = 25 °C. [2] When supply voltages (VCC - VEE) near 2.0 V the analog switch ON resistance becomes extremely non-linear. When using a supply of 2 V, it is recommended to use these devices only for transmitting digital signals. 001aai068 100 (1) RON (Ω) 80 60 Vsw (2) V VCC from select input Sn nYn Vis nZ GND (3) 40 20 VEE Isw 001aah826 Vis = 0 V to (VCC - VEE). 0 0 1.8 3.6 5.4 7.2 Vis (V) 9.0 Vis = 0 V to (VCC - VEE). (1) VCC = 4.5 V (2) VCC = 6 V (3) VCC = 9 V Figure 9.  Test circuit for measuring RON 74HC_HCT4052 Product data sheet Figure 10.  Typical RON as a function of input voltage Vis All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 8 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Table 7. Static characteristics for 74HC4052 Voltages are referenced to GND (ground = 0 V). Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input. Vos is the output voltage at pins nZ or nYn, whichever is assigned as an output. Symbol Parameter [1] Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V VCC = 9.0 V 6.3 4.7 - V VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V VCC = 9.0 V - 4.3 2.7 V VCC = 6.0 V - - ±1.0 μA VCC = 10.0 V - - ±2.0 μA per channel - - ±1.0 μA all channels - - ±2.0 μA - - ±2.0 μA VCC = 6.0 V - - 80.0 μA VCC = 10.0 V - - 160.0 μA - 3.5 - pF independent pins nYn - 5 - pF common pins nZ - 12 - pF Tamb = -40 °C to +85 °C VIH VIL II IS(OFF) HIGH-level input voltage LOW-level input voltage input leakage current OFF-state leakage current VEE = 0 V; VI = VCC or GND VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; |VSW| = VCC - VEE; see Figure 11 IS(ON) ON-state leakage current VI = VIH or VIL; |VSW| = VCC - VEE; VCC = 10.0 V; VEE = 0 V; see Figure 12 ICC supply current VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE CI input capacitance Csw switch capacitance 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 9 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Symbol Parameter [1] Conditions Min Typ Max Unit VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 9.0 V 6.3 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V VCC = 9.0 V - - 2.7 V VCC = 6.0 V - - ±1.0 μA VCC = 10.0 V - - ±2.0 μA per channel - - ±1.0 μA all channels - - ±2.0 μA - - ±2.0 μA VCC = 6.0 V - - 160.0 μA VCC = 10.0 V - - 320.0 μA Tamb = -40 °C to +125 °C VIH VIL II IS(OFF) HIGH-level input voltage LOW-level input voltage input leakage current OFF-state leakage current VEE = 0 V; VI = VCC or GND VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; |VSW| = VCC - VEE; see Figure 11 IS(ON) ON-state leakage current VI = VIH or VIL; |VSW| = VCC - VEE; VCC = 10.0 V; VEE = 0 V; see Figure 12 ICC supply current VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE [1] All typical values are measured at Tamb = 25 °C. 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 10 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Table 8. Static characteristics for 74HCT4052 Voltages are referenced to GND (ground = 0 V). Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input. Vos is the output voltage at pins nZ or nYn, whichever is assigned as an output. Symbol Parameter Conditions Min Typ [1] Max Unit Tamb = -40 °C to +85 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V II input leakage current VI = VCC or GND; VCC = 5.5 V; VEE = 0 V - - ±1.0 μA IS(OFF) OFF-state leakage current VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; |VSW| = VCC - VEE; see Figure 11 per channel - - ±1.0 μA all channels - - ±2.0 μA - - ±2.0 μA VCC = 5.5 V; VEE = 0 V - - 80.0 μA VCC = 5.0 V; VEE = -5.0 V - - 160.0 μA - 45 202.5 μA - 3.5 - pF independent pins nYn - 5 - pF common pins nZ - 12 - pF IS(ON) ON-state leakage current VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; |VSW| = VCC - VEE; see Figure 12 ICC supply current VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE ΔICC additional supply current CI input capacitance Csw switch capacitance 74HC_HCT4052 Product data sheet per input; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 11 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Symbol Parameter Conditions Min Typ [1] Max Unit Tamb = -40 °C to +125 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V II input leakage current VI = VCC or GND; VCC = 5.5 V; VEE = 0 V - - ±1.0 μA IS(OFF) OFF-state leakage current VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; |VSW| = VCC - VEE; see Figure 11 per channel - - ±1.0 μA all channels - - ±2.0 μA - - ±2.0 μA VCC = 5.5 V; VEE = 0 V - - 160.0 μA VCC = 5.0 V; VEE = -5.0 V - - 320.0 μA - - 220.5 μA IS(ON) ON-state leakage current VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; |VSW| = VCC - VEE; see Figure 12 ICC supply current VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE ΔICC additional supply current per input; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V [1] All typical values are measured at Tamb = 25 °C. VCC from select input Sn Isw Yn A Isw Z GND Vis A VEE Vos 001aan383 Vis = VCC and Vos = VEE. Vis = VEE and Vos = VCC. Figure 11.  Test circuit for measuring OFF-state current VCC HIGH from select input Sn Isw A Vis Yn Z GND Vos VEE 001aan384 Vis = VCC and Vos = open-circuit. Vis = VEE and Vos = open-circuit. Figure 12.  Test circuit for measuring ON-state current 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 12 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 11 Dynamic characteristics Table 9. Dynamic characteristics for 74HC4052 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. Symbol Parameter Conditions Min [1] Typ Max Unit Tamb = -40 °C to +85 °C tpd propagation delay Vis to Vos; RL = ∞ Ω; see Figure 13 [2] VCC = 2.0 V; VEE = 0 V - 14 75 ns VCC = 4.5 V; VEE = 0 V - 5 15 ns VCC = 6.0 V; VEE = 0 V - 4 13 ns - 4 10 ns VCC = 2.0 V; VEE = 0 V - 105 405 ns VCC = 4.5 V; VEE = 0 V - 38 81 ns VCC = 5.0 V; VEE = 0 V; CL = 15 pF - 28 - ns VCC = 6.0 V; VEE = 0 V - 30 69 ns - 26 58 ns VCC = 2.0 V; VEE = 0 V - 74 315 ns VCC = 4.5 V; VEE = 0 V - 27 63 ns VCC = 5.0 V; VEE = 0 V; CL = 15 pF - 21 - ns VCC = 6.0 V; VEE = 0 V - 22 54 ns - 22 48 ns - 57 - pF VCC = 4.5 V; VEE = -4.5 V ton turn-on time E, Sn to Vos; RL = ∞ Ω; see Figure 14 [3] VCC = 4.5 V; VEE = -4.5 V toff turn-off time E, Sn to Vos; RL = 1 kΩ; see Figure 14 [4] VCC = 4.5 V; VEE = -4.5 V CPD power dissipation per switch; VI = GND to VCC capacitance 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 [5] © Nexperia B.V. 2017. All rights reserved. 13 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Symbol Parameter Conditions Min [1] Typ Max Unit Tamb = -40 °C to +125 °C propagation delay Vis to Vos; RL = ∞ Ω; see Figure 13 tpd ton turn-on time [2] VCC = 2.0 V; VEE = 0 V - - 90 ns VCC = 4.5 V; VEE = 0 V - - 18 ns VCC = 6.0 V; VEE = 0 V - - 15 ns VCC = 4.5 V; VEE = -4.5 V - - 12 ns VCC = 2.0 V; VEE = 0 V - - 490 ns VCC = 4.5 V; VEE = 0 V - - 98 ns VCC = 6.0 V; VEE = 0 V - - 83 ns - - 69 ns VCC = 2.0 V; VEE = 0 V - - 375 ns VCC = 4.5 V; VEE = 0 V - - 75 ns VCC = 6.0 V; VEE = 0 V - - 64 ns VCC = 4.5 V; VEE = -4.5 V - - 57 ns E, Sn to Vos; RL = ∞ Ω; see Figure 14 [3] VCC = 4.5 V; VEE = -4.5 V toff [1] [2] [3] [4] [5] turn-off time E, Sn to Vos; RL = 1 kΩ; see Figure 14 [4] All typical values are measured at Tamb = 25 °C. tpd is the same as tPHL and tPLH. ton is the same as tPZH and tPZL. toff is the same as tPHZ and tPLZ. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ{(CL + Csw) x VCC x fo} where: fi = input frequency in MHz; fo = output frequency in MHz; N = number of inputs switching; 2 Σ{(CL + Csw) x VCC x fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V. 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 14 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Table 10. Dynamic characteristics for 74HCT4052 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; for test circuit see Figure 15. Vis is the input voltage at a nYn or nZ terminal, whichever is assigned as an input. Vos is the output voltage at a nYn or nZ terminal, whichever is assigned as an output. Symbol Parameter Conditions Min Typ [1] Max Unit Tamb = -40 °C to +85 °C propagation delay Vis to Vos; RL = ∞ Ω; see Figure 13 tpd [2] VCC = 4.5 V; VEE = 0 V - 5 15 ns - 4 10 ns VCC = 4.5 V; VEE = 0 V - 41 88 ns VCC = 5.0 V; VEE = 0 V; CL = 15 pF - 18 - ns VCC = 4.5 V; VEE = -4.5 V - 28 60 ns VCC = 4.5 V; VEE = 0 V - 26 63 ns VCC = 5.0 V; VEE = 0 V; CL = 15 pF - 13 - ns - 21 48 ns - 57 - pF - - 18 ns - - 12 ns - - 105 ns - - 72 ns VCC = 4.5 V; VEE = 0 V - - 75 ns VCC = 4.5 V; VEE = -4.5 V - - 57 ns VCC = 4.5 V; VEE = -4.5 V ton turn-on time toff turn-off time E, Sn to Vos; RL = 1 kΩ; see Figure 14 E, Sn to Vos; RL = 1 kΩ; see Figure 14 [3] [4] VCC = 4.5 V; VEE = -4.5 V CPD power dissipation per switch; VI = GND to VCC - 1.5 V capacitance [5] Tamb = -40 °C to +125 °C propagation delay Vis to Vos; RL = ∞ Ω; see Figure 13 tpd [2] VCC = 4.5 V; VEE = 0 V VCC = 4.5 V; VEE = -4.5 V ton turn-on time E, Sn to Vos; RL = 1 kΩ; see Figure 14 [3] VCC = 4.5 V; VEE = 0 V VCC = 4.5 V; VEE = -4.5 V toff [1] [2] [3] [4] [5] turn-off time E, Sn to Vos; RL = 1 kΩ; see Figure 14 [4] All typical values are measured at Tamb = 25 °C. tpd is the same as tPHL and tPLH. ton is the same as tPZH and tPZL. toff is the same as tPHZ and tPLZ. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ{(CL + Csw) x VCC x fo} where: fi = input frequency in MHz; fo = output frequency in MHz; N = number of inputs switching; 2 Σ{(CL + Csw) x VCC x fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V. 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 15 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 50 % Vis input tPLH tPHL 50 % Vos output 001aad555 Figure 13.  Input (Vis) to output (Vos) propagation delays VI E, Sn inputs VM 0V tPZL tPLZ 50 % Vos output 10 % tPHZ tPZH 90 % 50 % Vos output switch ON switch OFF switch ON 001aae330 For 74HC4052: VM = 0.5 × VCC. For 74HCT4052: VM = 1.3 V. Figure 14.  Turn-on and turn-off times 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 16 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer tW VI 90 % negative pulse VM VM 10 % 0V VI tf tr tr tf 90 % positive pulse VM VM 10 % 0V tW VCC Vis PULSE GENERATOR VI VCC Vos RL DUT RT S1 open CL GND VEE 001aae382 Definitions for test circuit; see Table 11: RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Figure 15.  Test circuit for measuring switching times Table 11. Test data Test Input VI tPHL, tPLH [2] tPZH, tPHZ [2] tPZL, tPLZ [2] Load Vis tr, tf S1 position CL RL [1] at fmax other pulse < 2 ns 6 ns 50 pF 1 kΩ open VCC < 2 ns 6 ns 50 pF 1 kΩ VEE VEE < 2 ns 6 ns 50 pF 1 kΩ VCC [1] tr = tf = 6 ns; when measuring fmax, there is no constraint to tr and tf with 50 % duty factor. [2] VI values: For 74HC4052: VI = VCC For 74HCT4052: VI = 3 V 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 17 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 12 Additional dynamic characteristics Table 12. Additional dynamic characteristics Recommended conditions and typical values; GND = 0 V; Tamb = 25 °C; CL = 50 pF. Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input. Vos is the output voltage at pins nYn or nZ, whichever is assigned as an output. Symbol Parameter Conditions Min Typ dsin sine-wave distortion fi = 1 kHz; RL = 10 kΩ; see Figure 16 Max Unit Vis = 4.0 V (p-p); VCC = 2.25 V; VEE = -2.25 V - 0.04 - % Vis = 8.0 V (p-p); VCC = 4.5 V; VEE = -4.5 V - 0.02 - % Vis = 4.0 V (p-p); VCC = 2.25 V; VEE = -2.25 V - 0.12 - % Vis = 8.0 V (p-p); VCC = 4.5 V; VEE = -4.5 V - 0.06 - % fi = 10 kHz; RL = 10 kΩ; see Figure 16 αiso Xtalk Vct f(-3dB) isolation (OFF-state) crosstalk crosstalk voltage RL = 600 Ω; fi = 1 MHz; see Figure 17 VCC = 2.25 V; VEE = -2.25 V [1] - -50 - dB VCC = 4.5 V; VEE = -4.5 V [1] - -50 - dB VCC = 2.25 V; VEE = -2.25 V [1] - -60 - dB VCC = 4.5 V; VEE = -4.5 V [1] - -60 - dB VCC = 4.5 V; VEE = 0 V - 110 - mV VCC = 4.5 V; VEE = -4.5 V - 220 - mV between two switches/multiplexers; RL = 600 Ω; fi = 1 MHz; see Figure 18 peak-to-peak value; between control and any switch; RL = 600 Ω; fi = 1 MHz; E or Sn square wave between VCC and GND; tr = tf = 6 ns; see Figure 19 -3 dB frequency response RL = 50 Ω; see Figure 20 VCC = 2.25 V; VEE = -2.25 V [2] - 170 - MHz VCC = 4.5 V; VEE = -4.5 V [2] - 180 - MHz [1] Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω). [2] Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω). VCC Sn Vis 10 µF nYn/nZ nZ/nYn VEE GND RL Vos CL dB 001aah829 Figure 16.  Test circuit for measuring sine-wave distortion 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 18 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer VCC Sn 0.1 µF Vis nYn/nZ nZ/nYn VEE GND RL Vos CL dB 001aah871 VCC = 4.5 V; GND = 0 V; VEE = -4.5 V; RL = 600 Ω; RS = 1 kΩ. a. Test circuit 001aae332 0 α iso (dB) - 20 - 40 - 60 - 80 - 100 102 10 103 104 105 fi (kHz) 106 b. Isolation (OFF-state) as a function of frequency Figure 17.  Test circuit for measuring isolation (OFF-state) VCC Sn Vis 0.1 µF RL nYn/nZ nZ/nYn VEE GND RL CL VCC Sn nYn/nZ RL nZ/nYn VEE GND RL Vos CL dB 001aah873 Figure 18.  Test circuits for measuring crosstalk between any two switches/multiplexers 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 19 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 2RL 2RL VCC Sn, E Vct nYn G 2RL nZ VEE GND oscilloscope 2RL 001aah913 Figure 19.  Test circuit for measuring crosstalk between control input and any switch VCC Sn Vis 10 µF nYn/nZ nZ/nYn VEE GND RL Vos CL dB 001aah829 VCC = 4.5 V; GND = 0 V; VEE = -4.5 V; RL = 50 Ω; RS = 1 kΩ. a. Test circuit 001aad551 5 Vos (dB) 3 1 -1 -3 -5 10 102 103 104 105 f (kHz) 106 b. Typical frequency response Figure 20.  Test circuit for frequency response 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 20 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 13 Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.05 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 0.244 0.041 0.228 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Figure 21.  Package outline SOT109-1 (SO16) 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 21 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8o 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Figure 22.  Package outline SOT338-1 (SSOP16) 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 22 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm D SOT403-1 E A X c y HE v M A Z 9 16 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Figure 23.  Package outline SOT403-1 (TSSOP16) 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 23 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm B D A A E A1 c detail X terminal 1 index area terminal 1 index area C e1 e b 2 y y1 C v M C A B w M C 7 L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 0.5 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Figure 24.  Package outline SOT763-1 (DHVQFN16) 74HC_HCT4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 24 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 14 Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15 Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT4052 v.12 20171010 Product data sheet - 74HC_HCT4052 v.11 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. 74HC_HCT4052 v.11 20160210 Modifications: • Type numbers 74HC4052N and 74HCT4052N (SOT38-4) removed. 74HC_HCT4052 v.10 20120719 Modifications: • CDM added to features. 74HC_HCT4052 v.9 20111213 Modifications: • Legal pages updated. 74HC_HCT4052 v.8 20110511 74HC_HCT4052 v.7 Product data sheet 74HC_HCT4052 v.10 - 74HC_HCT4052 v.9 - 74HC_HCT4052 v.8 Product data sheet - 74HC_HCT4052 v.7 20110112 Product data sheet - 74HC_HCT4052 v.6 74HC_HCT4052 v.6 20100111 Product data sheet - 74HC_HCT4052 v.5 74HC_HCT4052 v.5 20080505 Product data sheet - 74HC_HCT4052 v.4 74HC_HCT4052 v.4 20041111 Product specification - 74HC_HCT4052 v.3 74HC_HCT4052 v.3 20030516 Product specification - 74HC_HCT4052 v.2 74HC_HCT4052 v.2 19901201 - - - 74HC_HCT4052 Product data sheet Product data sheet - Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 25 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 16 Legal information 16.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia's aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical 74HC_HCT4052 Product data sheet systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 26 / 28 74HC4052; 74HCT4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer 74HC_HCT4052 Product data sheet design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 12 — 10 October 2017 © Nexperia B.V. 2017. All rights reserved. 27 / 28 Nexperia 74HC4052; 74HCT4052 Dual 4-channel analog multiplexer/demultiplexer Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 General description ............................................ 1 Features and benefits .........................................1 Applications .........................................................1 Ordering information .......................................... 2 Functional diagram ............................................. 2 Pinning information ............................................ 4 Pinning ............................................................... 4 Pin description ................................................... 4 Functional description ........................................5 Limiting values .................................................... 5 Recommended operating conditions ................ 6 Static characteristics .......................................... 7 Dynamic characteristics ...................................13 Additional dynamic characteristics .................18 Package outline .................................................21 Abbreviations .................................................... 25 Revision history ................................................ 25 Legal information .............................................. 26 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © Nexperia B.V. 2017. All rights reserved. For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 10 October 2017 Document identifier: 74HC_HCT4052
74HCT4052PW,118
物料型号: - 74HC4052 - 74HCT4052

器件简介: 74HC4052和74HCT4052是双4通道模拟多路复用器/解复用器,适用于模拟或数字4:1多路复用器/解复用器应用。每个开关具有四个独立输入/输出(nY0, nY1, nY2 和 nY3)和一个公共输入/输出(nZ)。数字使能输入(E)和两个数字选择输入(S0 和 S1)是两个开关共享的。

引脚分配: - 74HC4052和74HCT4052的引脚分配在文档中有详细的图示和描述,包括SO16、SSOP16、TSSOP16和DHVQFN16等不同的封装类型。

参数特性: - 宽模拟输入电压范围:-5 V 至 +5 V - 低导通电阻 - 逻辑电平转换 - 符合JEDEC标准号7A - 输入电平:74HC4052为CMOS电平,74HCT4052为TTL电平 - ESD保护等级 - 工作温度范围:-40 °C 至 +85 °C 或 -40 °C 至 +125 °C

功能详解: - 74HC4052和74HCT4052的功能表说明了不同输入条件下通道的激活情况。 - 还包括了限值、推荐工作条件、静态特性和动态特性的详细描述。

应用信息: - 模拟多路复用和解复用 - 数字多路复用和解复用 - 信号门控

封装信息: - 提供了不同温度范围的多种封装类型,包括SO16、SSOP16、TSSOP16和DHVQFN16。
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74HCT4052PW,118
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