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74LV4051PW,112

74LV4051PW,112

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    TSSOP16_5X4.4MM

  • 描述:

    8路模拟多路复用器/解复用器

  • 数据手册
  • 价格&库存
74LV4051PW,112 数据手册
74LV4051 8-channel analog multiplexer/demultiplexer Rev. 7 — 9 October 2018 Product data sheet 1. General description The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). The VCC to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground). 2. Features and benefits • • • • • • • • Optimized for low-voltage applications: 1.0 V to 6.0 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Low ON resistance: • 145 Ω (typical) at VCC - VEE = 2.0 V • 80 Ω (typical) at VCC - VEE = 3.0 V • 60 Ω (typical) at VCC - VEE = 4.5 V Logic level translation: • To enable 3 V logic to communicate with ±3 V analog signals Typical ‘break before make’ built in ESD protection: • HBM JESD22-A114E exceeds 2000 V • MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV4051D -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74LV4051DB -40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74LV4051PW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74LV4051BQ -40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm SOT763-1 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 4. Functional diagram VCC 16 13 Y0 S0 11 14 Y1 15 Y2 S1 10 12 Y3 LOGIC LEVEL CONVERSION 1 Y4 1-OF-8 DECODER S2 9 5 Y5 2 Y6 E 6 4 Y7 3 Z 8 GND Fig. 1. 7 VEE 001aad543 Functional diagram 11 10 9 6 13 S0 S1 S2 11 14 10 15 9 12 1 5 2 E 6 4 3 0 2 G8 Y1 MUX/DMUX 0 Y2 1 Y3 2 Y4 3 Y5 74LV4051 Product data sheet 3 4 Y6 5 Y7 6 7 13 14 15 12 1 5 2 4 001aad542 001aad541 Logic symbol 0 7 Y0 Z Fig. 2. 8X Fig. 3. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 2 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer Y VCC VEE VCC VCC VCC VEE VEE from logic Z 001aad544 Fig. 4. Schematic diagram (one switch) 5. Pinning information 5.1. Pinning 74LV4051 Y4 1 16 VCC Y6 2 15 Y2 Z 3 14 Y1 Y7 4 13 Y0 Y4 1 16 VCC Y6 2 15 Y2 Z 3 14 Y1 Y7 4 13 Y0 Y5 5 12 Y3 Y5 5 12 Y3 E 6 11 S0 E 6 11 S0 VEE 7 10 S1 GND 8 VEE 7 10 S1 GND 8 9 S2 aaa-029146 Fig. 5. 74LV4051 Pin configuration SOT109-1 (SO16) 74LV4051 Product data sheet 9 S2 001aak407 Fig. 6. Pin configuration SOT338-1 (SSOP16) and SOT403-1 (TSSOP16) All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 3 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 1 Y4 terminal 1 index area 16 VCC 74LV4051 Y6 2 15 Y2 Z 3 14 Y1 Y7 4 13 Y0 Y5 5 E 6 VEE 7 12 Y3 VCC(1) 11 S0 8 9 GND S2 10 S1 001aak408 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC. Fig. 7. Pin configuration SOT763-1 (DHVQFN16) 5.2. Pin description Table 2. Pin description Symbol Pin Description E 6 enable input (active LOW) VEE 7 supply voltage GND 8 ground supply voltage S0, S1, S2 11, 10, 9 select input Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4 independent input or output Z 3 common output or input VCC 16 supply voltage 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. Input Channel ON E S2 S1 S0 L L L L Y0 to Z L L L H Y1 to Z L L H L Y2 to Z L L H H Y3 to Z L H L L Y4 to Z L H L H Y5 to Z L H H L Y6 to Z L H H H Y7 to Z H X X X switches off 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 4 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND = 0 V. Symbol Parameter Conditions Min Max Unit [1] -0.5 +7.0 V VCC supply voltage IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V [2] - ±20 mA ISK switch clamping current VSW < -0.5 V or VSW > VCC + 0.5 V [2] - ±20 mA ISW switch current VSW > -0.5 V or VSW < VCC + 0.5 V; source or sink current [2] - ±25 mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [2] [3] Tamb = -40 °C to +125 °C [3] To avoid drawing VCC current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn, and in this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE. The minimum input voltage rating may be exceeded if the input current rating is observed. For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage see Fig. 8 VI VSW Tamb ambient temperature in free air Δt/ΔV input transition rise and fall rate [1] Min Typ Max 1 3.3 6 V input voltage 0 - VCC V switch voltage 0 - VCC V -40 - +125 °C VCC = 1.0 V to 2.0 V - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 3.6 V - - 100 ns/V [1] Unit The static characteristics are guaranteed from VCC = 1.2 V to 6.0 V, but LV devices are guaranteed to function down to VCC = 1.0 V (with input levels GND or VCC). 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 5 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 001aak344 8.0 VCC - GND (V) 6.0 operating area 4.0 2.0 0 Fig. 8. 0 2.0 4.0 6.0 8.0 VCC - VEE (V) Guaranteed operating area as a function of the supply voltages 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL II IS(OFF) IS(ON) ICC ΔICC HIGH-level input voltage LOW-level input voltage input leakage current OFF-state leakage current ON-state leakage current supply current additional supply current 74LV4051 Product data sheet Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max VCC = 1.2 V 0.9 - - 0.9 - V VCC = 2.0 V 1.4 - - 1.4 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 4.5 V 3.15 - - 3.15 - V VCC = 6.0 V 4.20 - - 4.20 - V VCC = 1.2 V - - 0.3 - 0.3 V VCC = 2.0 V - - 0.6 - 0.6 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC = 4.5 V - - 1.35 - 1.35 V VCC = 6.0 V - - 1.80 - 1.80 V VCC = 3.6 V - - 1.0 - 1.0 μA VCC = 6.0 V - - 2.0 - 2.0 μA VCC = 3.6 V - - 1.0 - 1.0 μA VCC = 6.0 V - - 2.0 - 2.0 μA VCC = 3.6 V - - 1.0 - 1.0 μA VCC = 6.0 V - - 2.0 - 2.0 μA VCC = 3.6 V - - 20 - 40 μA VCC = 6.0 V - - 40 - 80 μA - - 500 - 850 μA VI = VCC or GND VI = VIH or VIL; see Fig. 9 VI = VIH or VIL; see Fig. 10 VI = VCC or GND; IO = 0 A per input; VI = VCC - 0.6 V; VCC = 2.7 V to 3.6 V All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 6 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer Symbol Parameter Conditions CI input capacitance Csw switch capacitance [1] -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max - 3.5 - - - pF independent pins Yn - 5 - - - pF common pin Z - 25 - - - pF Typical values are measured at Tamb = 25 °C. 9.1. Test circuits VCC VCC S0 to S2 VIH or VIL Z Z E IS Yn GND = VEE GND VO IS E IS GND = VEE VCC S0 to S2 VIH or VIL Yn VI VI VO 001aak409 001aak410 VI = VCC or VEE and VO = VEE or VCC. Fig. 9. VI = VCC or VEE and VO = open circuit. Test circuit for measuring OFF-state leakage current Fig. 10. Test circuit for measuring ON-state leakage current 9.2. ON resistance Table 7. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Fig. 11 and Fig. 12. Symbol Parameter RON(peak) ON resistance (peak) ΔRON ON resistance mismatch between channels 74LV4051 Product data sheet Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max - - - - - Ω VCC = 2.0 V; ISW = 1000 μA - 145 325 - 375 Ω VCC = 2.7 V; ISW = 1000 μA - 90 200 - 235 Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 80 180 - 210 Ω VCC = 4.5 V; ISW = 1000 μA - 60 135 - 160 Ω VCC = 6.0 V; ISW = 1000 μA - 55 125 - 145 Ω - - - - - Ω VCC = 2.0 V; ISW = 1000 μA - 5 - - - Ω VCC = 2.7 V; ISW = 1000 μA - 4 - - - Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 4 - - - Ω VCC = 4.5 V; ISW = 1000 μA - 3 - - - Ω VCC = 6.0 V; ISW = 1000 μA - 2 - - - Ω VI = 0 V to VCC - VEE VCC = 1.2 V; ISW = 100 μA [2] VI = 0 V to VCC - VEE VCC = 1.2 V; ISW = 100 μA [2] All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 7 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer Symbol RON(rail) RON(rail) [1] [2] Parameter Conditions -40 °C to +85 °C Min Typ [1] -40 °C to +125 °C Unit Max Min Max VI = GND ON resistance (rail) VCC = 1.2 V; ISW = 100 μA - 225 - - - Ω VCC = 2.0 V; ISW = 1000 μA [2] - 110 235 - 270 Ω VCC = 2.7 V; ISW = 1000 μA - 70 145 - 165 Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 60 130 - 150 Ω VCC = 4.5 V; ISW = 1000 μA - 45 100 - 115 Ω VCC = 6.0 V; ISW = 1000 μA - 40 85 - 100 Ω - 250 - - - Ω VCC = 2.0 V; ISW = 1000 μA - 120 320 - 370 Ω VCC = 2.7 V; ISW = 1000 μA - 75 195 - 225 Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 70 175 - 205 Ω VCC = 4.5 V; ISW = 1000 μA - 50 130 - 150 Ω VCC = 6.0 V; ISW = 1000 μA - 45 120 - 135 Ω VI = VCC - VEE ON resistance (rail) VCC = 1.2 V; ISW = 100 μA [2] All typical values are measured at nominal VCC and at Tamb = 25 °C. When supply voltages (VCC - VEE) near 1.2 V the analog switch ON resistance becomes extremely non-linear. When using a supply of 1.2 V, it is recommended to use these devices only for transmitting digital signals. 9.3. On resistance waveform and test circuit 001aak412 180 RON (Ω) 120 V VCC VIH or VIL VCC = 2.0 V VSW VCC = 3.0 V S0 to S2 Z VCC = 4.5 V 60 Yn E GND = VEE GND ISW VI 0 0 1.2 2.4 3.6 001aak411 RON = VSW / ISW. Fig. 11. Test circuit for measuring RON 74LV4051 Product data sheet VI (V) 4.8 VI = 0 V to VCC - VEE Fig. 12. Typical RON as a function of input voltage All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 8 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 10. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (GND = VEE = 0 V). For test circuit see Fig. 15. Symbol Parameter tpd propagation delay Conditions -40 °C to +85 °C Min Typ [1] VCC = 1.2 V - VCC = 2.0 V - VCC = 2.7 V Max Min 25 - - - ns 9 17 - 20 ns - 6 13 - 15 ns VCC = 3.0 V to 3.6 V - 5 10 - 12 ns VCC = 4.5 V - 4 9 - 10 ns - 3 8 - 8 ns VCC = 1.2 V - 145 - - - ns VCC = 2.0 V - 49 94 - 112 ns VCC = 2.7 V - 36 69 - 83 ns VCC = 3.0 V to 3.6 V; CL = 15 pF - 23 - - - ns VCC = 3.0 V to 3.6 V - 28 55 - 66 ns VCC = 4.5 V - 25 47 - 56 ns VCC = 6.0 V - 19 38 - 43 ns VCC = 1.2 V - 140 - - - ns VCC = 2.0 V - 48 90 - 107 ns VCC = 2.7 V - 35 66 - 79 ns VCC = 3.0 V to 3.6 V; CL = 15 pF - 22 - - - ns VCC = 3.0 V to 3.6 V - 27 53 - 63 ns VCC = 4.5 V - 24 45 - 54 ns VCC = 6.0 V - 18 34 - 41 ns Yn to Z, Z to Yn; see Fig. 13 enable time E to Yn, Z; see Fig. 14 Sn to Yn; see Fig. 14 74LV4051 Product data sheet Max [2] VCC = 6.0 V ten -40 °C to +125 °C Unit [2] [2] All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 9 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer Symbol Parameter tdis disable time Conditions -40 °C to +85 °C Min Typ [1] VCC = 1.2 V - VCC = 2.0 V - VCC = 2.7 V Max Min 145 - - - ns 51 93 - 110 ns - 38 69 - 82 ns VCC = 3.0 V to 3.6 V; CL = 15 pF - 25 - - - ns VCC = 3.0 V to 3.6 V - 30 56 - 66 ns VCC = 4.5 V - 29 48 - 56 ns VCC = 6.0 V - 21 37 - 44 ns VCC = 1.2 V - 115 - - - ns VCC = 2.0 V - 41 73 - 90 ns VCC = 2.7 V - 31 54 - 67 ns VCC = 3.0 V to 3.6 V; CL = 15 pF - 20 - - - ns VCC = 3.0 V to 3.6 V - 24 44 - 54 ns VCC = 4.5 V - 22 37 - 46 ns VCC = 6.0 V - 17 29 - 36 ns - 25 - - - pF E to Yn, Z; see Fig. 14 Sn to Yn; see Fig. 14 CPD [1] [2] [3] -40 °C to +125 °C Unit Max [2] [2] power dissipation CL = 50 pF; fi = 1 MHz; capacitance VI = GND to VCC [3] All typical values are measured at nominal VCC and at Tamb = 25 °C. tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ((CL + CSW) × VCC × fo) where: fi = input frequency in MHz, fo = output frequency in MHz CL = output load capacitance in pF CSW = maximum switch capacitance in pF; VCC = supply voltage in Volts N = number of inputs switching 2 Σ(CL × VCC × fo) = sum of the outputs. 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 10 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 10.1. Waveforms and test circuit VCC Yn or Z input VM VEE tPLH tPHL VO Z or Yn output VM VEE 001aak418 Measurement points are given in Table 9. VEE and VO are typical voltage output levels that occur with the output load. Fig. 13. Propagation delay input (Yn or Z) to output (Z or Yn) VCC Sn, E input VM GND tPLZ Yn or Z output LOW-to-OFF OFF-to-LOW tPZL VO VY VX VEE tPHZ Yn or Z output HIGH-to-OFF OFF-to-HIGH VO tPZH VY VX VEE switch ON switch OFF switch ON 001aak419 Measurement points are given in Table 9. VEE and VO are typical voltage output levels that occur with the output load. Fig. 14. Enable and disable times Table 9. Measurement points Supply voltage Input Output VCC VM VM VX VY < 2.7 V 0.5VCC 0.5VCC VEE + 0.1VCC VO - 0.1VCC 2.7 V to 3.6 V 1.5 V 1.5 V VEE + 0.3 V VO - 0.3 V > 3.6 V 0.5VCC 0.5VCC VEE + 0.1VCC VO - 0.1VCC 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 11 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer tW VI 90 % negative pulse VM VM 10 % 0V VI tf tr tr tf 90 % positive pulse VM VM 10 % 0V tW VEXT VCC G VI RL VO DUT RT VEE CL RL 001aak353 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 15. Test circuit for measuring switching times Table 10. Test data Supply voltage Input VCC VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ < 2.7 V VCC ≤ 6 ns 50 pF 1 kΩ open VEE 2VCC 2.7 V to 3.6 V 2.7 V ≤ 6 ns 15 pF, 50 pF 1 kΩ open VEE 2VCC > 3.6 V VCC ≤ 6 ns 50 pF open VEE 2VCC 74LV4051 Product data sheet Load VEXT 1 kΩ All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 12 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 10.2. Additional dynamic parameters Table 11. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf ≤ 6.0 ns; Tamb = 25 °C. Symbol Parameter Conditions THD fi = 1 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 20 total harmonic distortion Min Typ Max Unit VCC = 3.0 V; VI = 2.75 V (p-p) - 0.8 - % VCC = 6.0 V; VI = 5.5 V (p-p) - 0.4 - % VCC = 3.0 V; VI = 2.75 V (p-p) - 2.4 - % VCC = 6.0 V; VI = 5.5 V (p-p) - 1.2 - % VCC = 3.0 V - 180 - MHz VCC = 6.0 V - 200 - MHz VCC = 3.0 V - -50 - dB VCC = 6.0 V - -50 - dB VCC = 3.0 V - 0.11 - V VCC = 6.0 V - 0.12 - V VCC = 3.0 V - -60 - dB VCC = 6.0 V - -60 - dB fi = 10 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 20 f(-3dB) αiso isolation (OFFstate) Vct crosstalk voltage Xtalk [1] [2] -3 dB frequency response crosstalk CL = 50 pF; RL = 50 Ω; see Fig. 16 fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 18 between digital inputs and switch; fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 21 [1] [2] [2] between switches; fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 22 Adjust fi voltage to obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 50 Ω). Adjust fi voltage to obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 600 Ω). 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 13 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 10.3. Test circuits 001aak361 5 (dB) 0 VCC VIH or VIL VCC S0 to S2 Z 2RL Yn E 0.1 µF GND = VEE GND 2RL -5 dB CL fi 103 104 105 f (kHz) 106 VCC = 3.0 V; GND = 0 V; VEE = -3.0 V; RL = 50 Ω; RSOURCE = 1 kΩ. 001aak420 Fig. 16. Test circuit for measuring frequency response 102 10 Fig. 17. Typical frequency response 001aak360 0 (dB) - 50 VCC VIH or VIL S0 to S2 Z 0.1 µF VCC VCC 2RL Yn E - 100 GND = VEE 2RL CL dB fi 001aak421 Fig. 18. Test circuit for measuring isolation (OFF-state) 10 µF GND 104 105 f (kHz) 106 Fig. 19. Typical isolation (OFF-state) as function of frequency VCC S0 to S2 Z 103 VCC = 3.0 V; GND = 0 V; VEE = -3.0 V; RL = 50 Ω; RSOURCE = 1 kΩ. VCC VIH or VIL 102 10 2RL Yn E GND = VEE 2RL CL D fi 001aak422 Fig. 20. Test circuit for measuring total harmonic distortion 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 14 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer VCC VCC 2RL VCC S0 to S2 2RL Z Yn E 2RL G GND = VEE VIH or VIL 2RL CL V VO 001aak423 a. Test circuit logic input (Sn, E) off on off VO Vct 001aaj908 b. Input and output pulse definitions VI may be connected to Sn or E. Fig. 21. Test circuit for measuring crosstalk voltage between digital inputs and switch VCC VIH or VIL RL VCC S0 to S2 Y0 Z Yn VCC 2RL 2RL E 0.1 µF GND = VEE GND 2RL VO CL dB 2RL VI 001aak434 a. Switch closed condition VCC VCC 2RL VIH or VIL VCC S0 to S2 Y0 Z Yn VCC 2RL 2RL E GND = VEE GND RL 2RL VO VI 2RL CL dB 001aak435 b. Switch open condition Fig. 22. Test circuit for measuring crosstalk between switches 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 15 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 11. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.05 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 0.244 0.041 0.228 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 23. Package outline SOT109-1 (SO16) 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 16 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8o 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig. 24. Package outline SOT338-1 (SSOP16) 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 17 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm D SOT403-1 E A X c y HE v M A Z 9 16 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 25. Package outline SOT403-1 (TSSOP16) 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 18 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm B D A A E A1 c detail X terminal 1 index area terminal 1 index area C e1 e b 2 7 y y1 C v M C A B w M C L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 0.5 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig. 26. Package outline SOT763-1 (DHVQFN16) 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 19 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 12. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LV4051 v.7 20181009 Product data sheet - Modifications: • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. 74LV4051 v.6 20160317 Modifications: • 74LV4051 v.5 20140917 Modifications: • 74LV4051 v.4 20090810 Modifications: • • • 74LV4051 v.6 Product data sheet - 74LV4051 v.5 Type number 74LV4051N (SOT38-4) removed. Product data sheet - 74LV4051 v.4 Fig. 7: Figure note added for DHVQFN16 package Product data sheet - 74LV4051 v.3 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Added type number 74LV4051BQ (DHVQFN16 package) 74LV4051 v.3 19960623 Product specification - 74LV4051 v.2 74LV4051 v.2 19970715 Product specification - 74LV4051 v.1 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 20 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LV4051 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 21 / 22 74LV4051 Nexperia 8-channel analog multiplexer/demultiplexer Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 4 6. Functional description................................................. 4 7. Limiting values............................................................. 5 8. Recommended operating conditions..........................5 9. Static characteristics....................................................6 9.1. Test circuits..................................................................7 9.2. ON resistance..............................................................7 9.3. On resistance waveform and test circuit......................8 10. Dynamic characteristics............................................ 9 10.1. Waveforms and test circuit...................................... 11 10.2. Additional dynamic parameters............................... 13 10.3. Test circuits..............................................................14 11. Package outline........................................................ 16 12. Abbreviations............................................................ 20 13. Revision history........................................................20 14. Legal information......................................................21 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 9 October 2018 74LV4051 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 9 October 2018 © Nexperia B.V. 2018. All rights reserved 22 / 22
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74LV4051PW,112
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