74LVC4066-Q100
Quad bilateral switch
Rev. 2 — 26 March 2020
Product data sheet
1. General description
The 74LVC4066-Q100 is a high-speed Si-gate CMOS device.
The 74LVC4066-Q100 provides four single pole, single-throw analog switch functions. Each switch
has two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is
LOW, the analog switch is turned off.
Schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise and fall
times across the entire VCC range from 1.65 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
•
•
•
•
•
•
•
•
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
Very low ON resistance:
• 7.5 Ω (typical) at VCC = 2.7 V
• 6.5 Ω (typical) at VCC = 3.3 V
• 6 Ω (typical) at VCC = 5 V
Switch current capability of 32 mA
High noise immunity
CMOS low-power consumption
Direct interface TTL-levels
Latch-up performance exceeds 250 mA
ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
Enable inputs accept voltages up to 5 V
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints
74LVC4066-Q100
Nexperia
Quad bilateral switch
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name
Description
Version
-40 °C to +125 °C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LVC4066PW-Q100 -40 °C to +125 °C
TSSOP14
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
SOT402-1
74LVC4066BQ-Q100
DHVQFN14
plastic dual in-line compatible thermal
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 × 3 × 0.85 mm
SOT762-1
74LVC4066D-Q100
-40 °C to +125 °C
4. Functional diagram
1
1Y
13
1E
4
2Y
5
2E
8
3Y
6
3E
11
4Y
12
4E
1Z
2
1
1
2Z
2
13 #
3
4
4
5
3Z
9
3
9
#
11
4Z 10
5
#
#
8
6
13 #
10
12 #
8
6
#
11
12 #
1
1
1
3
X1
1
1
9
X1
1
1
10
X1
(a)
Logic symbol
2
X1
(b)
mnb112
mnb111
Fig. 1.
1
Fig. 2.
Logic symbol (IEEE/IEC)
nZ
nY
nE
VCC
Fig. 3.
mna658
Logic diagram (one switch)
74LVC4066_Q100
Product data sheet
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2 / 20
74LVC4066-Q100
Nexperia
Quad bilateral switch
5. Pinning information
5.1. Pinning
2
13 1E
3
2Y
4
2E
5
3E
6
13 1E
12 4E
11 4Y
GND(1)
2Z
3
12 4E
2Y
4
11 4Y
8
1Z
2Z
2E
5
10 4Z
3Y
14 VCC
2
7
1
1Z
GND
1Y
3E
6
9
3Z
GND
7
8
3Y
10 4Z
9
3Z
aaa-003862
Transparent top view
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
aaa-003861
Fig. 4.
1Y
1
74LVC4066-Q100
14 VCC
74LVC4066-Q100
terminal 1
index area
Pin configuration for SOT108-1 (SO14) and
SOT402-1 (TSSOP14)
Fig. 5.
Pin configuration for SOT762-1 (DHVQFN14)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
1Y, 2Y, 3Y, 4Y
1, 4, 8, 11
independent input/output
1Z, 2Z, 3Z, 4Z
2, 3, 9, 10
independent output/input
1E, 2E, 3E, 4E
13, 5, 6, 12
enable input (active HIGH)
GND
7
ground (0 V)
VCC
14
supply voltage
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level.
Input nE
Switch
L
OFF
H
ON
74LVC4066_Q100
Product data sheet
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3 / 20
74LVC4066-Q100
Nexperia
Quad bilateral switch
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
-0.5
+6.5
V
-0.5
+6.5
V
VCC
supply voltage
VI
input voltage
IIK
input clamping current
VI < -0.5 V or VI < VCC + 0.5 V
-50
-
mA
ISK
switch clamping current
VI < -0.5 V or VI < VCC + 0.5 V
-
±50
mA
VSW
switch voltage
enable and disable mode
-0.5
+6.5
V
ISW
switch current
-0.5 < VSW < VCC + 0.5 V
-
±50
mA
ICC
supply current
-
100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
Ptot
total power dissipation
-
500
mW
[1]
[2]
[3]
[1]
[2]
Tamb = -40 °C to +125 °C
[3]
The minimum input voltage rating may be exceeded if the input current rating is observed.
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.
For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VCC
supply voltage
1.65
-
5.5
V
VI
input voltage
0
-
5.5
V
VSW
switch voltage
0
-
VCC
V
Tamb
ambient temperature
-40
-
+125
°C
Δt/ΔV
input transition rise and fall rate
[1]
[2]
[1]
VCC = 1.65 V to 2.7 V
[2]
-
-
20
ns/V
VCC = 2.7 V to 5.5 V
[2]
-
-
10
ns/V
To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nY. In this case, there
is no limit for the voltage drop across the switch.
Applies to control signal levels.
74LVC4066_Q100
Product data sheet
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Nexperia B.V. 2020. All rights reserved
4 / 20
74LVC4066-Q100
Nexperia
Quad bilateral switch
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VIH
Conditions
HIGH-level input
voltage
VIL
LOW-level input
voltage
-40 °C to +85 °C
VCC = 1.65 V to 1.95 V
-40 °C to
+125 °C
Min
Typ [1]
Max
Min
Max
Unit
0.65VCC
-
-
0.65VCC
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
1.7
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
2.0
-
V
VCC = 4.5 V to 5.5 V
0.7VCC
-
-
0.7VCC
-
V
VCC = 1.65 V to 1.95 V
-
-
0.35VCC
-
VCC = 2.3 V to 2.7 V
-
-
0.7
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
-
0.8
V
VCC = 4.5 V to 5.5 V
-
-
0.3VCC
-
0.35VCC V
0.3VCC V
II
input leakage
current
pin nE; VCC = 5.5 V;
VI = 5.5 V or GND
[2]
-
±0.1
±5
-
±20
μA
IS(OFF)
OFF-state
leakage current
|VSW| = VCC - GND; VCC = 5.5 V;
see Fig. 6
[2]
-
±0.1
±5
-
±20
μA
IS(ON)
ON-state leakage |VSW| = VCC - GND; VCC = 5.5 V;
current
see Fig. 7
[2]
-
±0.1
±5
-
±20
μA
ICC
supply current
VI = VCC or GND;
VSW = GND or VCC; VCC = 5.5 V
[2]
-
0.1
10
-
40
μA
ΔICC
additional supply
current
pin nE; VI = VCC - 0.6 V; VCC = 5.5 V; [2]
VSW = GND or VCC
-
5
500
-
5000
μA
CI
input capacitance
-
12.5
-
-
-
pF
CS(OFF)
OFF-state
capacitance
-
8.0
-
-
-
pF
CS(ON)
ON-state
capacitance
-
14.0
-
-
-
pF
[1]
[2]
All typical values are measured at Tamb = 25 °C.
These typical values are measured at VCC = 3.3 V.
9.1. Test circuits
VCC
VCC
nE
VIL
nZ
VI
nE
VIH
nY
GND
IS
IS
VO
VI
nZ
nY
GND
VO
001aag488
001aag489
VI = VCC or GND and VO = GND or VCC.
Fig. 6.
VI = VCC or GND and VO = open circuit.
Test circuit for measuring OFF-state leakage
current
74LVC4066_Q100
Product data sheet
Fig. 7.
Test circuit for measuring ON-state leakage
current
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74LVC4066-Q100
Nexperia
Quad bilateral switch
9.2. ON resistance
Table 7. ON resistance
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Fig. 9 to Fig. 14.
Symbol
Parameter
RON(peak) ON resistance
(peak)
RON(rail)
ON resistance
(rail)
Conditions
-40 °C to +85 °C
-40 °C to
+125 °C
Unit
Min
Typ [1]
Max
Min
Max
ISW = 4 mA; VCC = 1.65 V to 1.95 V
-
34.0
130
-
195
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V
-
12.0
30
-
45
Ω
ISW = 12 mA; VCC = 2.7 V
-
10.4
25
-
38
Ω
ISW = 24 mA; VCC = 3 V to 3.6 V
-
7.8
20
-
30
Ω
ISW = 32 mA; VCC = 4.5 V to 5.5 V
-
6.2
15
-
23
Ω
ISW = 4 mA; VCC = 1.65 V to 1.95 V
-
8.2
18
-
27
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V
-
7.1
16
-
24
Ω
ISW = 12 mA; VCC = 2.7 V
-
6.9
14
-
21
Ω
ISW = 24 mA; VCC = 3 V to 3.6 V
-
6.5
12
-
18
Ω
ISW = 32 mA; VCC = 4.5 V to 5.5 V
-
5.8
10
-
15
Ω
ISW = 4 mA; VCC = 1.65 V to 1.95 V
-
10.4
30
-
45
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V
-
7.6
20
-
30
Ω
ISW = 12 mA; VCC = 2.7 V
-
7.0
18
-
27
Ω
ISW = 24 mA; VCC = 3 V to 3.6 V
-
6.1
15
-
23
Ω
ISW = 32 mA; VCC = 4.5 V to 5.5 V
-
4.9
10
-
15
Ω
ISW = 4 mA; VCC = 1.65 V to 1.95 V
-
26.0
-
-
-
Ω
ISW = 8 mA; VCC = 2.3 V to 2.7 V
-
5.0
-
-
-
Ω
ISW = 12 mA; VCC = 2.7 V
-
3.5
-
-
-
Ω
ISW = 24 mA; VCC = 3 V to 3.6 V
-
2.0
-
-
-
Ω
ISW = 32 mA; VCC = 4.5 V to 5.5 V
-
1.5
-
-
-
Ω
VI = GND to VCC; see Fig. 8
VI = GND; see Fig. 8
VI = VCC; see Fig. 8
RON(flat)
[1]
[2]
ON resistance
(flatness)
VI = GND to VCC
[2]
Typical values are measured at Tamb = 25 °C and nominal VCC.
Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
74LVC4066_Q100
Product data sheet
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74LVC4066-Q100
Nexperia
Quad bilateral switch
9.3. ON resistance test circuit and graphs
mna673
40
RON
(Ω)
30
(1)
20
(2)
(3)
10
VSW
(4)
(5)
VCC
0
nE
VIH
nY
nZ
GND
VI
ISW
RON = VSW / ISW.
Test circuit for measuring ON resistance
001aaa712
55
RON
(Ω)
1
2
3
4
VI (V)
5
(1) VCC = 1.8 V.
(2) VCC = 2.5 V.
(3) VCC = 2.7 V.
(4) VCC = 3.3 V.
(5) VCC = 5.0 V.
001aag490
Fig. 8.
0
Fig. 9.
Typical ON resistance as a function of input
voltage; Tamb = 25 °C
001aaa708
15
RON
(Ω)
45
13
35
11
(4)
(3)
(2)
(1)
25
(1)
(2)
9
(3)
(4)
15
5
7
0
0.4
0.8
1.2
1.6
VI (V)
2.0
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Product data sheet
0
0.5
1.0
1.5
2.0
VI (V)
2.5
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 10. ON resistance as a function of input voltage;
VCC = 1.8 V
74LVC4066_Q100
5
Fig. 11. ON resistance as a function of input voltage;
VCC = 2.5 V
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74LVC4066-Q100
Nexperia
Quad bilateral switch
001aaa709
13
001aaa710
10
RON
(Ω)
RON
(Ω)
11
8
(1)
(1)
9
(2)
(2)
6
(3)
(3)
7
(4)
5
0
0.5
1.0
(4)
1.5
2.0
4
2.5
3.0
VI (V)
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
0
1
2
3
VI (V)
4
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 12. ON resistance as a function of input voltage;
VCC = 2.7 V
Fig. 13. ON resistance as a function of input voltage;
VCC = 3.3 V
001aaa711
7
RON
(Ω)
6
5
(1)
(2)
(3)
4
(4)
3
0
1
2
3
4
VI (V)
5
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(4) Tamb = -40 °C.
Fig. 14. ON resistance as a function of input voltage; VCC = 5.0 V
74LVC4066_Q100
Product data sheet
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74LVC4066-Q100
Nexperia
Quad bilateral switch
10. Dynamic characteristics
Table 8. Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 17.
Symbol Parameter
tpd
ten
propagation
delay
enable time
Conditions
-40 °C to +85 °C
CPD
[1]
[2]
[3]
[4]
[5]
[6]
disable time
power
dissipation
capacitance
Unit
Min
Typ [1]
Max
Min
Max
VCC = 1.65 V to 1.95 V
-
0.8
2.0
-
3.0
ns
VCC = 2.3 V to 2.7 V
-
0.4
1.2
-
2.0
ns
VCC = 2.7 V
-
0.4
1.0
-
1.5
ns
VCC = 3.0 V to 3.6 V
-
0.3
0.8
-
1.5
ns
VCC = 4.5 V to 5.5 V
-
0.2
0.6
-
1.0
ns
VCC = 1.65 V to 1.95 V
1.0
5.3
10
1.0
12.5
ns
VCC = 2.3 V to 2.7 V
1.0
3.0
5.6
1.0
7.0
ns
VCC = 2.7 V
1.0
2.6
5.0
1.0
6.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.5
4.4
1.0
5.5
ns
1.0
1.9
3.9
1.0
5.0
ns
VCC = 1.65 V to 1.95 V
1.0
4.2
9.0
1.0
11.5
ns
VCC = 2.3 V to 2.7 V
1.0
2.4
5.5
1.0
7.0
ns
VCC = 2.7 V
1.0
3.6
6.5
1.0
8.5
ns
VCC = 3.0 V to 3.6 V
1.0
3.4
6.0
1.0
7.5
ns
VCC = 4.5 V to 5.5 V
1.0
2.5
5.0
1.0
6.5
ns
VCC = 2.5 V
-
11.0
-
-
-
pF
VCC = 3.3 V
-
12.5
-
-
-
pF
VCC = 5.0 V
-
15.6
-
-
-
pF
nY to nZ or nZ to nY; see Fig. 15
nE to nY or nZ; see Fig. 16
[2] [3]
[4]
VCC = 4.5 V to 5.5 V
tdis
-40 °C to +125 °C
nE to nY or nZ; see Fig. 16
CL = 50 pF; fi = 10 MHz;
VI = GND to VCC
[5]
[6]
Typical values are measured at Tamb = 25 °C and nominal VCC.
tpd is the same as tPLH and tPHL.
Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when
driven by an ideal voltage source (zero output impedance).
ten is the same as tPZH and tPZL.
tdis is the same as tPLZ and tPHZ.
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC × fi × N + Σ{(CL + CS(ON)) × VCC × fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS(ON) = maximum ON-state switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
2
Σ{(CL + CS(ON)) × VCC × fo} = sum of the outputs.
74LVC4066_Q100
Product data sheet
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Nexperia B.V. 2020. All rights reserved
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74LVC4066-Q100
Nexperia
Quad bilateral switch
10.1. Waveforms and test circuit
VI
nY or nZ
input
VM
VM
GND
t PLH
t PHL
VOH
nZ or nY
output
VM
VM
VOL
001aaa541
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 15. Input (nY or nZ) to output (nZ or nY) propagation delays
VI
nE input
VM
GND
t PLZ
nY or nZ
output
LOW-to-OFF
OFF-to-LOW
t PZL
VCC
VM
VX
VOL
t PZH
t PHZ
nY or nZ
output
HIGH-to-OFF
OFF-to-HIGH
VOH
VY
VM
GND
switch
enabled
switch
disabled
switch
enabled
001aaa542
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 16. Enable and disable times
Table 9. Measurement points
Supply voltage
Input
Output
VCC
VM
VM
VX
VY
1.65 V to 1.95 V
0.5VCC
0.5 VCC
VOL + 0.15 V
VOH - 0.15 V
2.3 V to 2.7 V
0.5VCC
0.5VCC
VOL + 0.15 V
VOH - 0.15 V
2.7 V
1.5 V
1.5 V
VOL + 0.3 V
VOH - 0.3 V
3.0 V to 3.6 V
1.5 V
1.5 V
VOL + 0.3 V
VOH - 0.3 V
4.5 V to 5.5 V
0.5VCC
0.5VCC
VOL + 0.3 V
VOH - 0.3 V
74LVC4066_Q100
Product data sheet
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74LVC4066-Q100
Nexperia
Quad bilateral switch
VEXT
VCC
G
VI
RL
VO
DUT
RT
CL
RL
mna616
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
VEXT = External voltage for measuring switching times.
Fig. 17. Test circuit for measuring switching times
Table 10. Test data
Supply voltage Input
VCC
VI
Load
VEXT
tr, tf
CL
RL
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
1.65 V to 1.95 V VCC
≤ 2.0 ns
30 pF
1 kΩ
open
GND
2VCC
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
GND
2VCC
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
GND
6V
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
GND
6V
4.5 V to 5.5 V
VCC
≤ 2.5 ns
50 pF
500 Ω
open
GND
2VCC
10.2. Additional dynamic characteristics
Table 11. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C.
Symbol
Parameter
Conditions
Min
Typ
Max
THD
total harmonic distortion
RL = 10 kΩ; CL = 50 pF; fi = 1 kHz; see Fig. 18
Unit
VCC = 1.65 V
-
0.032
-
%
VCC = 2.3 V
-
0.008
-
%
VCC = 3 V
-
0.006
-
%
VCC = 4.5 V
-
0.005
-
%
VCC = 1.65 V
-
0.068
-
%
VCC = 2.3 V
-
0.009
-
%
VCC = 3 V
-
0.008
-
%
VCC = 4.5 V
-
0.006
-
%
RL = 10 kΩ; CL = 50 pF; fi = 10 kHz; see Fig. 18
74LVC4066_Q100
Product data sheet
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Quad bilateral switch
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
f(-3dB)
-3 dB frequency response
RL = 600 Ω; CL = 50 pF; see Fig. 19
VCC = 1.65 V
-
170
-
MHz
VCC = 2.3 V
-
210
-
MHz
VCC = 3 V
-
212
-
MHz
VCC = 4.5 V
-
215
-
MHz
VCC = 1.65 V
-
> 500
-
MHz
VCC = 2.3 V
-
> 500
-
MHz
VCC = 3 V
-
> 500
-
MHz
VCC = 4.5 V
-
> 500
-
MHz
VCC = 1.65 V
-
-46
-
dB
VCC = 2.3 V
-
-46
-
dB
VCC = 3 V
-
-46
-
dB
VCC = 4.5 V
-
-46
-
dB
VCC = 1.65 V
-
-42
-
dB
VCC = 2.3 V
-
-42
-
dB
VCC = 3 V
-
-42
-
dB
VCC = 4.5 V
-
-42
-
dB
VCC = 1.65 V
-
69
-
mV
VCC = 2.3 V
-
87
-
mV
VCC = 3 V
-
156
-
mV
VCC = 4.5 V
-
302
-
mV
VCC = 1.65 V
-
-58
-
dB
VCC = 2.3 V
-
-58
-
dB
VCC = 3 V
-
-58
-
dB
VCC = 4.5 V
-
-58
-
dB
VCC = 1.65 V
-
-58
-
dB
VCC = 2.3 V
-
-58
-
dB
VCC = 3 V
-
-58
-
dB
VCC = 4.5 V
-
-58
-
dB
VCC = 1.8 V
-
3.3
-
pC
VCC = 2.5 V
-
4.1
-
pC
VCC = 3.3 V
-
5.0
-
pC
VCC = 4.5 V
-
6.4
-
pC
VCC = 5.5 V
-
7.5
-
pC
RL = 50 Ω; CL = 5 pF; see Fig. 19
αiso
isolation (OFF-state)
RL = 600 Ω; CL = 50 pF; fi = 1 MHz; see Fig. 20
RL = 50 Ω; CL = 5 pF; fi = 1 MHz; see Fig. 20
Vct
Xtalk
crosstalk voltage
crosstalk
between digital inputs and switch; RL = 600 Ω;
CL = 50 pF; fi = 1 MHz; tr = tf = 2 ns; see Fig. 21
between switches; RL = 600 Ω; CL = 50 pF;
fi = 1 MHz; see Fig. 22
between switches; RL = 50 Ω; CL = 5 pF;
fi = 1 MHz; see Fig. 22
Qinj
charge injection
74LVC4066_Q100
Product data sheet
CL = 0.1 nF; Vgen = 0 V; Rgen = 0 Ω; fi = 1 MHz;
RL = 1 MΩ; see Fig. 23
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74LVC4066-Q100
Nexperia
Quad bilateral switch
10.3. Test circuits
VCC
0.5VCC
nE
VIH
RL
nY/nZ
fi
10 µF
nZ/nY
600 Ω
VO
D
CL
001aag492
Test conditions:
VCC = 1.65 V: Vi = 1.4 V (p-p).
VCC = 2.3 V: Vi = 2 V (p-p).
VCC = 3 V: Vi = 2.5 V (p-p).
VCC = 4.5 V: Vi = 4 V (p-p).
Fig. 18. Test circuit for measuring total harmonic distortion
VCC
0.5VCC
nE
VIH
0.1 µF
fi
RL
nY/nZ
nZ/nY
VO
50 Ω
dB
CL
001aag491
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB.
Fig. 19. Test circuit for measuring the frequency response when switch is in ON-state
0.5VCC
VCC
RL VIL
0.1 µF
fi
0.5VCC
nE
RL
nY/nZ
nZ/nY
VO
CL dB
50 Ω
001aag493
Adjust fi voltage to obtain 0 dBm level at input.
Fig. 20. Test circuit for measuring isolation (OFF-state)
VCC
nE
nY/nZ
G
logic
input
50 Ω
nZ/nY
RL
600 Ω
0.5VCC
VO
0.5VCC
CL
001aag494
Fig. 21. Test circuit for measuring crosstalk voltage (between digital inputs and switch)
74LVC4066_Q100
Product data sheet
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74LVC4066-Q100
Nexperia
Quad bilateral switch
0.5VCC
1E
VIH
0.1 µF
Ri
1Y or 1Z
600 Ω
fi
RL
1Z or 1Y
CHANNEL
ON
50 Ω
CL
50 pF
VO1
0.5VCC
2E
VIL
RL
2Y or 2Z
2Z or 2Y
CHANNEL
OFF
Ri
600 Ω
CL
50 pF
VO2
001aag496
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).
Fig. 22. Test circuit for measuring crosstalk between switches
VCC
nE
Rgen
G
logic
input
nY/nZ
nZ/nY
VO
RL
1 MΩ
Vgen
CL
0.1 nF
001aag495
logic
input (nE)
off
on
VO
off
ΔVO
mna675
Qinj = ΔVO × CL.
ΔVO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
Fig. 23. Test circuit for measuring charge injection
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Product data sheet
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74LVC4066-Q100
Nexperia
Quad bilateral switch
11. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
A2
Q
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.05
0.01
0.01
0.004
0.028
0.012
0.244
0.039 0.028
0.041
0.228
0.016 0.024
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig. 24. Package outline SOT108-1 (SO14)
74LVC4066_Q100
Product data sheet
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15 / 20
74LVC4066-Q100
Nexperia
Quad bilateral switch
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
D
SOT402-1
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
pin 1 index
(A 3 )
A1
A
θ
Lp
1
L
7
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.72
0.38
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT402-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Fig. 25. Package outline SOT402-1 (TSSOP14)
74LVC4066_Q100
Product data sheet
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16 / 20
74LVC4066-Q100
Nexperia
Quad bilateral switch
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
B
D
SOT762-1
A
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
v
w
b
2
6
C A B
C
y
y1 C
L
1
7
14
8
Eh
e
k
13
9
Dh
X
k
0
2
Dimensions (mm are the original dimensions)
Unit
mm
max
nom
min
A(1)
1
A1
b
0.05 0.30
0.02 0.25
0.00 0.18
4 mm
scale
c
D(1)
Dh
E(1)
Eh
e
e1
0.2
3.1
3.0
2.9
1.65
1.50
1.35
2.6
2.5
2.4
1.15
1.00
0.85
0.5
2
k
L
v
0.2
0.5
0.4
0.3
0.1
w
y
0.05 0.05
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Outline
version
SOT762-1
References
IEC
JEDEC
JEITA
sot762-1_po
European
projection
Issue date
15-04-10
15-05-05
MO-241
Fig. 26. Package outline SOT762-1 (DHVQFN14)
74LVC4066_Q100
Product data sheet
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74LVC4066-Q100
Nexperia
Quad bilateral switch
12. Abbreviations
Table 12. Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MIL
Military
MM
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 13. Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
74LVC4066_Q100 v.2
20200326
Product data sheet
-
Modifications:
•
•
•
•
•
74LVC4066_Q100 v.1
74LVC4066_Q100
Product data sheet
74LVC4066_Q100 v.1
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Section 2 updated.
Table 4: Derating values for Ptot total power dissipation updated.
Fig. 26: Package outline drawing SOT762-1 (DHVQFN14) updated.
20120807
Product data sheet
-
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Rev. 2 — 26 March 2020
-
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18 / 20
74LVC4066-Q100
Nexperia
Quad bilateral switch
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
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In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
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Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
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and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
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liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
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terms and conditions with regard to the purchase of Nexperia products by
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No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
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Export control — This document as well as the item(s) described herein
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Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
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Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
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74LVC4066-Q100
Nexperia
Quad bilateral switch
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description............................................................. 3
6. Functional description................................................. 3
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................4
9. Static characteristics....................................................5
9.1. Test circuits..................................................................5
9.2. ON resistance..............................................................6
9.3. ON resistance test circuit and graphs..........................7
10. Dynamic characteristics............................................ 9
10.1. Waveforms and test circuit...................................... 10
10.2. Additional dynamic characteristics...........................11
10.3. Test circuits..............................................................13
11. Package outline........................................................ 15
12. Abbreviations............................................................ 18
13. Revision history........................................................18
14. Legal information......................................................19
©
Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 26 March 2020
74LVC4066_Q100
Product data sheet
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Rev. 2 — 26 March 2020
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Nexperia B.V. 2020. All rights reserved
20 / 20