74HCT175PW,118

74HC175; 74HCT175 Quad D-type flip-flop with reset; positive-edge trigger Rev. 5 — 29 January 2016 Product data sheet 1. General description The 74HC175; 74HCT175 is a quad positive-edge triggered D-type flip-flop with individual data inputs (Dn) and complementary outputs (Qn and Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW on MR causes the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Input levels:  For 74HC175: CMOS level  For 74HCT175: TTL level  Four edge-triggered D-type flip-flops  Asynchronous master reset  Complies with JEDEC standard no. 7A  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V.  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC175D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HCT175D 74HC175DB 74HCT175DB 74HC175PW 74HCT175PW 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 4. Functional diagram        ' Fig 1.     4   4  4     4  05 4   '  4 '   4 ' '  &3 4 & 5    DDD DDD Logic symbol Fig 2. ' ' ' 4 &3 ' ' )) IEC logic symbol 4 &3 ' ' )) 4 &3 )) 4 4 5' ' 4 &3 )) 4 5' 4 5' 5' &3 05 4 4 4 4 4 4 4 4 DDD Fig 3. Logic diagram 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 2 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 5. Pinning information 5.1 Pinning +& +&7 05   9&& 4   4 4   4 '   ' '   ' 4   4 4   4 *1'   +& +&7 &3 05   9&& 4   4 4   4 '   ' '   ' 4   4 4   4  *1'  DDD Fig 4. &3 DDD Pin configuration SO16 Fig 5. Pin configuration SSOP16 and TSSOP16 5.2 Pin description Table 2. Pin description Symbol Pin Description MR 1 asynchronous master reset input (active LOW) Q0 to Q3 2, 7, 10, 15 flip-flop output Q0 to Q3 3, 6, 11, 14 complementary flip-flop output D0 to D3 4, 5, 12, 13 data input GND 8 ground (0 V) CP 9 clock input (LOW-to-HIGH edge-triggered) VCC 16 positive supply voltage 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 3 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 6. Functional description Table 3. Function table[1] Operating modes Inputs Outputs MR CP Dn Qn Qn reset (clear) L X X L H load “1” H  h H L load “0” H  l L H [1] H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition; X = don’t care;  = LOW-to-HIGH clock transition.     ' ' ' ' ' 4 &3 ' )) 4 &3 ' )) 4 4 &3 )) 4 5' ' 4 &3 )) 4 5' 4 5' 5'  &3  05 4  4  4  4 4 4 4 4      DDD Fig 6. Functional diagram 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 4 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions Min VCC supply voltage 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current 0.5 V < VO < VCC + 0.5 V - 25 mA ICC supply current - 50 mA IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Unit - 500 mW Tamb = 40 C to +125 C SO16, SSOP16 and TSSOP16 [1] Max [1] For SO16 package: above 70 C the value of Ptot derates linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter VCC supply voltage Conditions 74HC175 74HCT175 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 - +125 40 - +125 C t/V input transition rise and fall rate - - 625 - - - VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 74HC_HCT175 Product data sheet VCC = 2.0 V All information provided in this document is subject to legal disclaimers. ns/V . Rev. 5 — 29 January 2016 5 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V 74HC175 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A CI input capacitance - 3.5 - - - - - pF 74HCT175 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V VOL II IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 5.2 mA; VCC = 5.5 V - 0.15 0.26 - 0.33 - 0.4 V - - 0.1 - 1 - 1 A LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V input leakage current VI = VCC or GND; VCC = 5.5 V 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 6 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ Max Min Max Min Max - - 8.0 - 80 - 160 A Dn input - 40 144 - 180 - 196 A CP input - 60 216 - 270 - 294 A MR input - 100 360 - 450 - 490 A - 3.5 - - - - - pF ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V ICC additional supply current per input pin; VI = VCC  2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V CI 40 C to +85 C 40 C to +125 C Unit input capacitance 10. Dynamic characteristics Table 7. Dynamic characteristics GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max 74HC175 tpd tPHL tt propagation delay HIGH to LOW propagation delay transition time 74HC_HCT175 Product data sheet [1] CP to Qn, Qn; see Figure 7 VCC = 2.0 V - 55 175 - 220 - 265 ns VCC = 4.5 V - 20 35 - 44 - 53 ns VCC = 5 V; CL = 15 pF - 17 - - - - - ns VCC = 6.0 V - 16 30 - 37 - 45 ns VCC = 2.0 V - 50 150 - 190 - 225 ns VCC = 4.5 V - 18 30 - 38 - 45 ns VCC = 5 V; CL = 15 pF - 15 - - - - - ns VCC = 6.0 V - 14 26 - 33 - 38 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns MR to Qn, Qn; see Figure 9 Qn output; see Figure 7 [2] All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 7 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger Table 7. Dynamic characteristics …continued GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter tW pulse width 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 80 22 - 100 - 120 - ns VCC = 4.5 V 16 8 - 20 - 24 - ns VCC = 6.0 V 14 6 - 17 - 20 - ns VCC = 2.0 V 80 19 - 100 - 120 - ns VCC = 4.5 V 16 7 - 20 - 24 - ns VCC = 6.0 V 14 6 - 17 - 20 - ns VCC = 2.0 V 5 33 - 5 - 5 - ns VCC = 4.5 V 5 12 - 5 - 5 - ns VCC = 6.0 V 5 10 - 5 - 5 - ns VCC = 2.0 V 80 3 - 100 - 120 - ns VCC = 4.5 V 16 1 - 20 - 24 - ns VCC = 6.0 V 14 1 - 17 - 20 - ns VCC = 2.0 V 25 2 - 30 - 40 - ns VCC = 4.5 V 5 0 - 6 - 8 - ns VCC = 6.0 V 4 0 - 5 - 7 - ns VCC = 2.0 V 6 25 - 4.8 - 4 - MHz VCC = 4.5 V 30 75 - 24 - 20 - MHz - 83 - - - - - MHz 35 89 - 28 - 24 - MHz - 32 - - - - - pF CP input HIGH or LOW; see Figure 7 MR input LOW; see Figure 9 trec tsu th fmax recovery time set-up time hold time maximum frequency MR to CP; see Figure 9 Dn to CP; see Figure 7 Dn to CP; see Figure 7 CP input; see Figure 7 VCC = 5 V; CL = 15 pF VCC = 6.0 V CPD power dissipation capacitance 74HC_HCT175 Product data sheet per package; VI = GND to VCC [3] All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 8 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger Table 7. Dynamic characteristics …continued GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10 Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 4.5 V - 19 33 - 41 - 50 ns VCC = 5 V; CL = 15 pF - 16 - - - - - ns VCC = 4.5 V - 22 38 - 48 - 57 ns VCC = 5 V; CL = 15 pF - 19 - - - - - ns - 19 35 - 44 - 53 ns - 16 - - - - - ns - 7 15 - 19 - 22 ns 20 12 - 25 - 30 - ns 20 11 - 25 - 30 - ns 5 10 - 5 - 5 - ns 16 5 - 20 - 24 - ns 5 0 - 5 - 5 - ns 25 49 - 20 - 17 - MHz - 54 - - - - - MHz - 34 - - - - - pF 74HCT175 propagation delay tpd HIGH to LOW propagation delay tPHL [1] CP to Qn, Qn; see Figure 7 MR to Qn; see Figure 9 MR to Qn; see Figure 9 VCC = 4.5 V VCC = 5 V; CL = 15 pF tt transition time Qn output; see Figure 7 tW pulse width CP input; see Figure 7 [2] VCC = 4.5 V VCC = 4.5 V MR input LOW; see Figure 9 VCC = 4.5 V recovery time trec MR to CP; see Figure 9 VCC = 4.5 V set-up time tsu Dn to CP; see Figure 7 VCC = 4.5 V hold time th Dn to CP; see Figure 7 VCC = 4.5 V maximum frequency fmax CP input; see Figure 7 VCC = 4.5 V VCC = 5 V; CL = 15 pF power dissipation capacitance CPD per package; VI = GND to VCC  1.5 V [1] tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz;  (CL  VCC2  fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in V. 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 9 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 11. Waveforms IPD[ 9, &3LQSXW 90 *1' W: W3+/ 92+ W3/+ 90 4QRXWSXW 92/ W7+/ W3/+ 92+ 4QRXWSXW W7/+ W3+/ 90 92/ W7/+ W7+/ DDD Measurement points are given in Table 8. Fig 7. Input to output propagation delay, output transition time, clock input pulse width and maximum frequency 9, &3LQSXW 90 *1' WVX 9, 'QLQSXW WVX WK WK 90 *1' 92+ 90 4QRXWSXW 92/ 92+ 90 4QRXWSXW 92/ DDD Measurement points are given in Table 8. Fig 8. Data set-up and hold times for data input 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 10 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 9, 90 05LQSXW *1' W: WUHP 9, 90 &3LQSXW *1' W3+/ 92+ 90 4QRXWSXW 92/ 92+ W3/+ 90 4QRXWSXW 92/ DDD Measurement points are given in Table 8. Fig 9. Master reset to output propagation delays, master reset pulse width and master reset to clock recovery time Table 8. Measurement points Type Input Output VI VM VM 74HC175 VCC 0.5VCC 0.5VCC 74HCT175 3V 1.3 V 1.3 V 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 11 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger W: 9, QHJDWLYH SXOVH  90 *1' 9, WI WU WU WI  SRVLWLYH SXOVH *1' 90  90 90  W: 9&& * 9, 92 '87 57 &/ DDK  Test data is given in Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. Fig 10. Test circuit for measuring switching times Table 9. Test data Type Input Load Test VI tr, tf CL RL 74HC175 VCC 6 ns 15 pF, 50 pF 1 k tPLH, tPHL 74HCT175 3V 6 ns 15 pF, 50 pF 1 k tPLH, tPHL 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 12 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 12. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S  /  H Z 0 ES   GHWDLO; PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP                                                 LQFKHV         ș R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7(   Fig 11. Package outline SOT109-1 (SO16) 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 13 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S /   GHWDLO; Z 0 ES H   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 12. Package outline SOT338-1 (SSOP16) 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 14 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ =   4 $ SLQLQGH[ $  $ $ ș /S /   H GHWDLO; Z 0 ES   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = ș PP                            R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7(   02 Fig 13. Package outline SOT403-1 (TSSOP16) 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 15 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT175 v.5 20160129 Product data sheet - 74HC_HCT175 v.4 Modifications: 74HC_HCT175 v.4 Modifications: 74HC_HCT175 v.3 Modifications: 74HC_HCT175_CNV_2 74HC_HCT175 Product data sheet • Type numbers 74HC175N and 74HCT175N (SOT38-4) removed. 20140408 • Product data sheet - 74HC_HCT175 v.3 - 74HC_HCT175_CNV_2 General description corrected (errata). 20140331 Product data sheet • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 19980708 Product specification - - All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 16 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. 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This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT175 Product data sheet Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 17 of 19 © Nexperia B.V. 2017. All rights reserved 74HC175; 74HCT175 Nexperia Quad D-type flip-flop with reset; positive-edge trigger Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74HC_HCT175 Product data sheet All information provided in this document is subject to legal disclaimers. . Rev. 5 — 29 January 2016 18 of 19 © Nexperia B.V. 2017. All rights reserved Nexperia 74HC175; 74HCT175 Quad D-type flip-flop with reset; positive-edge trigger 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 29 January 2016