74HCT4040D,652

74HC4040; 74HCT4040 12-stage binary ripple counter Rev. 6 — 8 June 2020 Product data sheet 1. General description The 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • • • • • • • • • Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.0 V) Input levels: • For 74HC4040: CMOS level • For 74HCT4040: TTL level ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Applications • • • Frequency dividing circuits Time delay circuits Control counters 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT4040DB -40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HC4040PW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 -40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm 74HC4040D 74HCT4040D 74HCT4040PW 74HC4040BQ 74HCT4040BQ SOT763-1 5. Functional diagram CP MR 10 11 T 12-STAGE COUNTER CD 9 7 6 5 3 2 4 13 12 14 15 1 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 001aad589 Fig. 1. Functional diagram CTR12 10 11 CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 9 7 6 5 3 2 4 13 12 14 15 1 10 11 + CT = 0 CT 11 Logic symbol 74HC_HCT4040 Product data sheet 9 7 6 5 3 2 4 13 12 14 15 1 001aad586 001aad585 Fig. 2. 0 Fig. 3. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 2 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter FF T 1 CP Q FF T 2 Q Q FF T 3 Q RD Q FF T 4 Q RD Q FF T 5 Q RD Q FF T 6 Q RD Q Q RD RD MR Q0 FF T 7 Q Q1 FF T 8 Q Q Q2 FF T 9 Q RD Q Q3 FF T 10 Q RD Q7 FF T 11 Q RD Q6 Q Q4 Q FF T 12 Q RD Q8 Q5 Q RD Q9 Q RD Q10 Q11 001aad588 Fig. 4. Logic diagram 6. Pinning information 1 terminal 1 index area 2 15 Q10 Q4 3 14 Q9 Q6 4 Q3 5 Q2 6 11 MR Q1 7 10 CP GND 8 13 Q7 4040 12 Q8 9 Product data sheet 14 Q9 4 Q3 5 Q2 6 Q1 7 4040 GND(1) 13 Q7 12 Q8 11 MR 10 CP 001aad584 Transparent top view Q0 Pin configuration SOT109-1 (SO16) , SOT338-1 (SSOP16) and SOT403-1 (TSSOP16) 74HC_HCT4040 3 Q6 (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. 001aad583 Fig. 5. Q4 9 Q5 15 Q10 Q0 16 VCC 2 8 1 Q5 GND Q11 16 VCC Q11 6.1. Pinning Fig. 6. Pin configuration SOT763-1 (DHVQFN16) All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 3 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 6.2. Pin description Table 2. Pin description Symbol Pin Description Q11 1 output 11 Q5 2 output 5 Q4 3 output 4 Q6 4 output 6 Q3 5 output 3 Q2 6 output 2 Q1 7 output 1 GND 8 ground (0 V) Q0 9 output 0 CP 10 clock input (HIGH-to-LOW, edge-triggered) MR 11 master reset input (active HIGH) Q8 12 output 8 Q7 13 output 7 Q9 14 output 9 Q10 15 output 10 VCC 16 positive supply voltage 7. Functional description 7.1. Function table Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH clock transition; ↓ = HIGH-to-LOW clock transition. Output Input CP MR Q0 to Q11 ↑ L no change ↓ L count X H L 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 4 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 7.2. Timing diagram CP input 1 2 4 8 16 32 64 128 256 512 1024 2048 4096 MR input Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 001aad587 Fig. 7. Timing diagram 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V IOK output clamping current VI < -0.5 V or VI > VCC + 0.5 V IO output current -0.5 V < VO < VCC + 0.5 V ICC IGND Tstg storage temperature Ptot total power dissipation [1] [2] Conditions Min Max -0.5 +7 V [1] - ±20 mA [1] - ±20 mA - ±25 mA supply current - ±50 mA ground current - ±50 mA -65 +150 °C - 500 mW Tamb = -40 °C to +125 °C [2] Unit The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C. For SOT338-1 (SSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C. 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 5 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 9. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC4040 74HCT4040 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C Δt/ΔV input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V IO = -20 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = -20 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V 74HC4040 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = -4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = -5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 μA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - ±0.1 - ±1.0 - ±1.0 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 μA CI input capacitance - 3.5 - 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 pF © Nexperia B.V. 2020. All rights reserved 6 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74HCT4040 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = -20 μA 4.4 4.5 - 4.4 - 4.4 - V IO = -4 mA 3.98 4.32 - 3.84 - 3.7 - V IO = 20 μA - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - ±0.1 - ±1.0 - ±1.0 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 μA ΔICC additional supply current per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V VOL CI input capacitance 74HC_HCT4040 Product data sheet pin CP - 85 306 - 383 - 417 μA pin MR - 110 396 - 495 - 539 μA - 3.5 - - - - - pF All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 7 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 11. Dynamic characteristics Table 7. Dynamic characteristics GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Fig. 9. Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74HC4040 tpd propagation delay CP to Q0; see Fig. 8 [1] VCC = 2.0 V - 47 150 - 190 - 225 ns VCC = 4.5 V - 17 30 - 38 - 45 ns VCC = 5.0 V; CL = 15 pF - 14 - - - - - ns VCC = 6.0 V - 14 26 - 33 - 38 ns VCC = 2.0 V - 28 100 - 125 - 150 ns VCC = 4.5 V - 10 20 - 25 - 30 ns VCC = 5.0 V; CL = 15 pF - 8 - - - - - ns VCC = 6.0 V - 8 17 - 21 - 26 ns - 61 185 - 230 - 280 ns - 22 37 - 46 - 56 ns - 18 31 - 39 - 48 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns VCC = 2.0 V 80 22 - 100 - 120 - ns VCC = 4.5 V 16 8 - 20 - 24 - ns VCC = 6.0 V 14 6 - 17 - 20 - ns VCC = 2.0 V 50 8 - 65 - 75 - ns VCC = 4.5 V 10 3 - 13 - 15 - ns VCC = 6.0 V 9 2 - 11 - 13 - ns VCC = 2.0 V 6 27 - 4.8 - 4 - MHz VCC = 4.5 V 30 82 - 24 - 20 - MHz - 90 - - - - - MHz 35 98 - 28 - 24 - MHz Qn to Qn+1; see Fig. 8 tPHL HIGH to LOW MR to Qn; see Fig. 8 propagation VCC = 2.0 V delay VCC = 4.5 V VCC = 6.0 V tt tW transition time Qn; see Fig. 8 pulse width [2] CP input, HIGH or LOW; see Fig. 8 MR input, HIGH; see Fig. 8 trec fmax recovery time maximum frequency MR to CP; see Fig. 8 CP input; see Fig. 8 VCC = 5.0 V; CL = 15 pF VCC = 6.0 V 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 8 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max CPD power dissipation capacitance VI = GND to VCC [3] CP to Q0; see Fig. 8 [1] Min Max Min Max - 20 - - - - - pF VCC = 4.5 V - 19 40 - 50 - 60 ns VCC = 5.0 V; CL = 15 pF - 16 - - - - - ns VCC = 4.5 V - 10 20 - 25 - 30 ns VCC = 5.0 V; CL = 15 pF - 8 - - - - - ns - 23 45 - 56 - 68 ns - 7 15 - 19 - 22 ns 16 7 - 20 - 24 - ns 16 6 - 20 - 24 - ns 10 2 - 13 - 15 - ns 30 72 - 24 - 20 - MHz - 79 - - - - - MHz - 20 - - - - - pF 74HCT4040 tpd propagation delay Qn to Qn+1; see Fig. 8 HIGH to LOW MR to Qn; see Fig. 8 propagation VCC = 4.5 V delay tPHL tt transition time Qn; see Fig. 8 tW pulse width [2] VCC = 4.5 V CP input, HIGH or LOW; see Fig. 8 VCC = 4.5 V MR input, HIGH; see Fig. 8 VCC = 4.5 V trec recovery time MR to CP; see Fig. 8 VCC = 4.5 V fmax maximum frequency CP input; see Fig. 8 power dissipation capacitance VI = GND to VCC VCC = 4.5 V VCC = 5.0 V; CL = 15 pF CPD [1] [2] [3] [3] tpd is the same as tPHL, tPLH. tt is the same as tTHL, tTLH. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + ∑(CL x VCC x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 ∑(CL x VCC x fo) = sum of outputs. 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 9 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 11.1. Waveforms and test circuit VI VM MR input tW trec VI 1/fmax VM CP input tPHL tW tPLH 90 % Q0 or Qn output tPHL 90 % 10 % VM 10 % tTLH tTHL 001aad590 74HC4040: VM = 50 %; VI = GND to VCC. 74HCT4040: VM = 1.3 V; VI = GND to 3 V. Fig. 8. Clock propagation delays, pulse width, transition times, maximum pulse frequency and master resets VI negative pulse VM tf tr tr VI GND VM 10 % GND positive pulse tW 90 % tf 90 % VM VM 10 % tW VCC G VI DUT VO RT CL 001aah768 Test data is given in Table 8. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig. 9. Test circuit for measuring switching times Table 8. Test data Type Load Input Test VI tr, tf CL 74HC4040 VCC 6.0 ns 15 pF, 50 pF tPLH, tPHL 74HCT4040 3.0 V 6.0 ns 15 pF, 50 pF tPLH, tPHL 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 10 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.05 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 0.244 0.041 0.228 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 10. Package outline SOT109-1 (SO16) 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 11 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8o 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig. 11. Package outline SOT338-1 (SSOP16) 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 12 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm D SOT403-1 E A X c y HE v M A Z 9 16 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 12. Package outline SOT403-1 (TSSOP16) 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 13 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm B D A A E A1 c detail X terminal 1 index area terminal 1 index area C e1 e b 2 7 y y1 C v M C A B w M C L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 0.5 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig. 13. Package outline SOT763-1 (DHVQFN16) 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 14 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 13. Abbreviations Table 9. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT4040 v.6 20200608 Product data sheet - Modifications: • • • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type number 74HC4040DB (SOT338-1/SSOP16) removed. Section 2 updated. Table 4: Derating values for Ptot total power dissipation have been updated. 74HC_HCT4040 v.5 20160203 Modifications: • 74HC_HCT4040 v.4 20140320 Modifications: • • 74HC_HCT4040 v.5 Product data sheet - 74HC_HCT4040 v.4 Type numbers 74HC4040N and 74HCT4040N (SOT38-4) removed. Product data sheet - 74HC_HCT4040 v.3 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. 74HC_HCT4040 v.3 20050914 Product data sheet - 74HC_HCT4040_CNV v.2 74HC_HCT4040_CNV v.2 19901231 Product specification - - 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 15 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". 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Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 16 / 17 74HC4040; 74HCT4040 Nexperia 12-stage binary ripple counter Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Ordering information....................................................2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 4 7. Functional description................................................. 4 7.1. Function table.............................................................. 4 7.2. Timing diagram............................................................ 5 8. Limiting values............................................................. 5 9. Recommended operating conditions..........................6 10. Static characteristics..................................................6 11. Dynamic characteristics.............................................8 11.1. Waveforms and test circuit.......................................10 12. Package outline........................................................ 11 13. Abbreviations............................................................ 15 14. Revision history........................................................15 15. Legal information......................................................16 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 8 June 2020 74HC_HCT4040 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 8 June 2020 © Nexperia B.V. 2020. All rights reserved 17 / 17