74AVC8T245PW:112

74AVC8T245 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Rev. 6 — 31 March 2020 Product data sheet 1. General description The 74AVC8T245 is an 8-bit, dual supply transceiver that enables bidirectional level translation. It features two 8-bit input-output ports (An and Bn), a direction control input (DIR), a output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn are in the high-impedance OFF-state. 2. Features and benefits • • • • • • • • • • Wide supply voltage range: • VCC(A): 0.8 V to 3.6 V • VCC(B): 0.8 V to 3.6 V Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114E Class 3B exceeds 8000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101C exceeds 1000 V Maximum data rates: • 380 Mbit/s (≥ 1.8 V to 3.3 V translation) • 260 Mbit/s (≥ 1.1 V to 3.3 V translation) • 260 Mbit/s (≥ 1.1 V to 2.5 V translation) • 210 Mbit/s (≥ 1.1 V to 1.8 V translation) • 150 Mbit/s (≥ 1.1 V to 1.5 V translation) • 100 Mbit/s (≥ 1.1 V to 1.2 V translation) Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AVC8T245PW -40 °C to +125 °C TSSOP24 plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 74AVC8T245BQ -40 °C to +125 °C DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm SOT815-1 B3 B8 4. Functional diagram B1 B2 21 VCC(A) OE DIR Fig. 1. 20 B4 19 B5 18 B6 17 B7 16 15 14 VCC(B) 22 2 3 4 5 6 7 8 9 A1 A2 A3 A4 A5 A6 A7 10 A8 001aai472 Logic symbol DIR OE A1 B1 VCC(A) VCC(B) to other seven channels Fig. 2. 001aai473 Logic diagram (one channel) 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 2 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 5. Pinning information 5.1. Pinning 1 terminal 1 index area 24 VCC(B) VCC(A) 74AVC8T245 74AVC8T245 VCC(A) 1 24 VCC(B) DIR 2 23 VCC(B) A1 3 22 OE A2 4 21 B1 A3 5 20 B2 A4 6 19 B3 A5 7 18 B4 A6 8 17 B5 A7 15 B7 GND 11 14 B8 GND 12 23 VCC(B) 22 OE A2 4 21 B1 A3 5 20 B2 A4 6 19 B3 A5 7 18 B4 A6 8 17 B5 A7 9 16 B6 GND(1) A8 10 15 B7 GND 11 14 B8 001aai490 Transparent top view (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. 13 GND 001aai489 Fig. 3. 3 GND 13 16 B6 2 A1 GND 12 9 A8 10 DIR Pin configuration SOT355-1 (TSSOP24) Fig. 4. Pin configuration SOT815-1 (DHVQFN24) 5.2. Pin description Table 2. Pin description Symbol Pin Description VCC(A) 1 supply voltage A (An, OE and DIR inputs are referenced to VCC(A)) DIR 2 direction control A1, A2, A3, A4, A5, A6, A7, A8 3, 4, 5, 6, 7, 8, 9, 10 data input or output GND [1] ground (0 V) 11, 12, 13 B1, B2, B3, B4, B5, B6, B7, B8 21, 20, 19, 18, 17, 16, 15, 14 data input or output OE 22 output enable input (active LOW) VCC(B) 23, 24 supply voltage B (Bn inputs are referenced to VCC(B)) [1] All GND pins must be connected to ground (0 V). 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 3 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Supply voltage Input VCC(A), VCC(B) OE [2] DIR [2] An [2] Bn 0.8 V to 3.6 V L L An = Bn input 0.8 V to 3.6 V L H input Bn = An 0.8 V to 3.6 V H X Z Z GND [1] X X Z Z [1] [2] Input/output [1] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode. The An, DIR and OE input circuit is referenced to VCC(A); The Bn input circuit is referenced to VCC(B). 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC(A) supply voltage A Conditions -0.5 +4.6 V VCC(B) supply voltage B -0.5 +4.6 V IIK input clamping current -50 - VI input voltage [1] -0.5 +4.6 IOK output clamping current VO < 0 V VO output voltage Active mode [1] [2] [3] -0.5 [1] -0.5 +4.6 V VI < 0 V Suspend or 3-state mode -50 - mA V mA VCCO + 0.5 V IO output current VO = 0 V to VCC - ±50 mA ICC supply current per VCC(A) or VCC(B) pin - 100 mA IGND ground current per GND pin -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [2] [3] [4] Tamb = -40 °C to +125 °C [4] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed. VCCO is the supply voltage associated with the output port. VCCO + 0.5 V should not exceed 4.6 V. For SOT355-1 (TSSOP24) package: Ptot derates linearly with 12.4 mW/K above 110 °C. For SOT815-1 (DHVQFN24) package: Ptot derates linearly with 15.0 mW/K above 117 °C. 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 4 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VCC(A) supply voltage A 0.8 3.6 V VCC(B) supply voltage B 0.8 3.6 V VI input voltage 0 3.6 V VO output voltage 0 VCCO V 0 3.6 V -40 +125 °C - 5 Active mode [1] Suspend or 3-state mode Tamb ambient temperature Δt/ΔV input transition rise and fall rate [1] [2] VCCI = 0.8 V to 3.6 V [2] ns/V VCCO is the supply voltage associated with the output port. VCCI is the supply voltage associated with the input port. 9. Static characteristics Table 6. Typical static characteristics at Tamb = 25 °C At recommended operating conditions; voltages are referenced to GND (ground = 0 V). VCCI is the supply voltage associated with the data input port; VCCO is the supply voltage associated with the output port. Symbol Parameter Conditions Min Typ Max VOH HIGH-level output voltage VOL VI = VIH or VIL; IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V - 0.69 - V LOW-level output voltage VI = VIH or VIL; IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V - 0.07 - V II input leakage current DIR, OE input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V - ±0.025 ±0.25 μA IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V [1] - ±0.5 ±2.5 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V; VCC(B) = 0 V [1] - ±0.5 ±2.5 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V [1] - ±0.5 ±2.5 μA A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V - ±0.1 ±1 μA B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V - ±0.1 ±1 μA IOFF power-off leakage current Unit CI input capacitance DIR, OE input; VI = 0 V or 3.3 V; VCC(A) = VCC(B) = 3.3 V - 1.5 - pF CI/O input/output capacitance A and B port; VO = 3.3 V or 0 V; VCC(A) = VCC(B) = 3.3 V - 4.3 - pF [1] For I/O ports, the parameter IOZ includes the input leakage current. 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 5 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). VCCI is the supply voltage associated with the data input port; VCCO is the supply voltage associated with the output port. Symbol Parameter VIH HIGH-level input voltage Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max VCCI = 0.8 V 0.70VCCI - 0.70VCCI - V VCCI = 1.1 V to 1.95 V 0.65VCCI - 0.65VCCI - V VCCI = 2.3 V to 2.7 V 1.6 - 1.6 - V VCCI = 3.0 V to 3.6 V 2 - 2 - V VCC(A) = 0.8 V 0.70VCC(A) - 0.70VCC(A) - V VCC(A) = 1.1 V to 1.95 V 0.65VCC(A) - 0.65VCC(A) - V VCC(A) = 2.3 V to 2.7 V 1.6 - 1.6 - V VCC(A) = 3.0 V to 3.6 V 2 - 2 - V VCCI = 0.8 V - 0.30VCCI - 0.30VCCI V VCCI = 1.1 V to 1.95 V - 0.35VCCI - 0.35VCCI V VCCI = 2.3 V to 2.7 V - 0.7 - 0.7 V VCCI = 3.0 V to 3.6 V - 0.8 - 0.8 V VCC(A) = 0.8 V - 0.30VCC(A) - 0.30VCC(A) V VCC(A) = 1.1 V to 1.95 V - 0.35VCC(A) - 0.35VCC(A) V VCC(A) = 2.3 V to 2.7 V - 0.7 - 0.7 V VCC(A) = 3.0 V to 3.6 V - 0.8 - 0.8 V VCCO - 0.1 - VCCO - 0.1 - V IO = -3 mA; VCC(A) = VCC(B) = 1.1 V 0.85 - 0.85 - V IO = -6 mA; VCC(A) = VCC(B) = 1.4 V 1.05 - 1.05 - V IO = -8 mA; VCC(A) = VCC(B) = 1.65 V 1.2 - 1.2 - V IO = -9 mA; VCC(A) = VCC(B) = 2.3 V 1.75 - 1.75 - V IO = -12 mA; VCC(A) = VCC(B) = 3.0 V 2.3 - 2.3 - V data input DIR, OE input VIL LOW-level input voltage data input DIR, OE input VOH HIGH-level output VI = VIH or VIL voltage IO = -100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 6 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Symbol Parameter VOL Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max - 0.1 - 0.1 V IO = 3 mA; VCC(A) = VCC(B) = 1.1 V - 0.25 - 0.25 V IO = 6 mA; VCC(A) = VCC(B) = 1.4 V - 0.35 - 0.35 V IO = 8 mA; VCC(A) = VCC(B) = 1.65 V - 0.45 - 0.45 V IO = 9 mA; VCC(A) = VCC(B) = 2.3 V - 0.55 - 0.55 V IO = 12 mA; VCC(A) = VCC(B) = 3.0 V - 0.7 - 0.7 V - ±1 - ±5 μA LOW-level output VI = VIH or VIL voltage IO = 100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V II input leakage current DIR, OE input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V [1] - ±5 - ±30 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V; VCC(B) = 0 V [1] - ±5 - ±30 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V [1] - ±5 - ±30 μA power-off leakage A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; current VCC(B) = 0.8 V to 3.6 V - ±5 - ±30 μA B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V - ±5 - ±30 μA IOFF 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 7 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Symbol Parameter ICC Conditions supply current -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 10 - 55 μA VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 8 - 50 μA VCC(A) = 3.6 V; VCC(B) = 0 V - 8 - 50 μA VCC(A) = 0 V; VCC(B) = 3.6 V -2 - -12 - μA VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 10 - 55 μA VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 8 - 50 μA VCC(A) = 3.6 V; VCC(B) = 0 V -2 - -12 - μA VCC(A) = 0 V; VCC(B) = 3.6 V - 8 - 50 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 20 - 70 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 16 - 65 μA A port; VI = 0 V or VCCI; IO = 0 A B port; VI = 0 V or VCCI; IO = 0 A [1] For I/O ports, the parameter IOZ includes the input leakage current. Table 8. Typical total supply current (ICC(A) + ICC(B)) VCC(A) VCC(B) Unit 0V 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0 0.1 0.1 0.1 0.1 0.1 0.1 μA 0.8 V 0.1 0.1 0.1 0.1 0.1 0.3 1.6 μA 1.2 V 0.1 0.1 0.1 0.1 0.1 0.1 0.8 μA 1.5 V 0.1 0.1 0.1 0.1 0.1 0.1 0.4 μA 1.8 V 0.1 0.1 0.1 0.1 0.1 0.1 0.2 μA 2.5 V 0.1 0.3 0.1 0.1 0.1 0.1 0.1 μA 3.3 V 0.1 1.6 0.8 0.4 0.2 0.1 0.1 μA 0V 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 8 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 10. Dynamic characteristics Table 9. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for wave forms see Fig. 5 and Fig. 6. tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Symbol Parameter tpd tdis ten propagation delay disable time enable time Conditions VCC(B) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V An to Bn 14.4 7.0 6.2 6.0 5.9 6.0 ns Bn to An 14.4 12.4 12.1 11.9 11.8 11.8 ns OE to An 16.2 16.2 16.2 16.2 16.2 16.2 ns OE to Bn 17.6 10.0 9.0 9.1 8.7 9.3 ns OE to An 21.9 21.9 21.9 21.9 21.9 21.9 ns OE to Bn 22.2 11.1 9.8 9.4 9.4 9.6 ns Table 10. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for wave forms see Fig. 5 and Fig. 6. tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Symbol Parameter tpd propagation delay tdis disable time ten enable time 74AVC8T245 Product data sheet Conditions VCC(A) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V An to Bn 14.4 12.4 12.1 11.9 11.8 11.8 ns Bn to An 14.4 7.0 6.2 6.0 5.9 6.0 ns OE to An 16.2 5.9 4.4 4.2 3.1 3.5 ns OE to Bn 17.6 14.2 13.7 13.6 13.3 13.1 ns OE to An 21.9 6.4 4.4 3.5 2.6 2.3 ns OE to Bn 22.2 17.7 17.2 17.0 16.8 16.7 ns All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 9 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Table 11. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V). [1] [2] Symbol Parameter Conditions 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V CPD A port: (direction An to Bn); output enabled 0.2 0.2 0.2 0.3 0.4 0.5 pF A port: (direction An to Bn); output disabled 0.2 0.2 0.2 0.3 0.4 0.5 pF A port: (direction Bn to An); output enabled 9 9 10 10 11 13 pF A port: (direction Bn to An); output disabled 0.6 0.6 0.6 0.7 0.7 0.8 pF B port: (direction An to Bn); output enabled 9 9 10 10 11 13 pF B port: (direction An to Bn); output disabled 0.6 0.6 0.6 0.7 0.7 0.8 pF B port: (direction Bn to An); output enabled 0.2 0.2 0.2 0.3 0.4 0.5 pF B port: (direction Bn to An); output disabled 0.2 0.2 0.2 0.3 0.4 0.5 pF [1] [2] power dissipation capacitance VCC(A) = VCC(B) Unit CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of the outputs. fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω. 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 10 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Table 12. Dynamic characteristics for temperature range -40 °C to +85 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for wave forms see Fig. 5 and Fig. 6. tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Symbol Parameter Conditions VCC(B) 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V Min Max Min Max Min Unit 2.5 V ± 0.2 V 3.3 V ± 0.3 V Max Min Max Min Max VCC(A) = 1.1 V to 1.3 V propagation delay An to Bn 0.5 9.0 0.5 6.7 0.5 5.8 0.5 4.9 0.5 4.8 ns Bn to An 0.5 9.0 0.5 8.5 0.5 8.3 0.5 8.0 0.5 7.8 ns tdis disable time OE to An 0.5 11.8 0.5 11.8 0.5 11.8 0.5 11.8 0.5 11.8 ns OE to Bn 0.5 12.3 0.5 9.5 0.5 9.4 0.5 8.0 0.5 8.9 ns ten enable time OE to An 1.1 14.4 1.1 14.4 1.1 14.4 1.1 14.4 1.1 14.4 ns OE to Bn 1.1 14.2 1.1 10.4 1.1 9.0 1.0 7.7 1.0 7.3 ns tpd VCC(A) = 1.4 V to 1.6 V tpd propagation delay An to Bn 0.5 8.5 0.5 5.6 0.5 4.7 0.5 4.4 0.5 4.1 ns Bn to An 0.5 6.7 0.5 5.6 0.5 5.3 0.5 5.2 0.5 5.0 ns tdis disable time OE to An 0.5 8.6 0.5 8.6 0.5 8.6 0.5 8.6 0.5 8.6 ns OE to Bn 0.5 11.2 0.5 8.4 0.5 7.6 0.5 7.2 0.5 7.8 ns OE to An 1.1 8.7 1.1 8.7 1.1 8.7 1.1 8.7 1.1 8.7 ns OE to Bn 1.1 12.8 1.1 8.1 1.1 7.1 1.0 5.6 1.0 5.2 ns ten enable time VCC(A) = 1.65 V to 1.95 V tpd tdis ten propagation delay An to Bn 0.5 8.3 0.5 5.3 0.5 4.5 0.5 3.8 0.5 3.5 ns Bn to An 0.5 5.8 0.5 4.7 0.5 4.5 0.5 4.3 0.5 4.1 ns disable time OE to An 0.5 7.1 0.5 7.1 0.5 7.1 0.5 7.1 0.5 7.1 ns OE to Bn 0.5 10.9 0.5 7.8 0.5 6.9 0.5 6.0 0.5 5.8 ns OE to An 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 ns OE to Bn 1.1 12.4 1.1 8.2 1.0 6.7 0.5 5.1 0.5 4.5 ns propagation delay An to Bn 0.5 8.0 0.5 5.2 0.5 4.3 0.5 3.3 0.5 2.9 ns Bn to An 0.5 4.9 0.5 4.4 0.5 3.8 0.5 3.3 0.5 3.1 ns disable time OE to An 0.5 5.1 0.5 5.1 0.5 5.1 0.5 5.1 0.5 5.1 ns OE to Bn 0.5 10.4 0.5 7.1 0.5 6.3 0.5 5.1 0.5 5.2 ns OE to An 0.5 4.8 0.5 4.8 0.5 4.8 0.5 4.8 0.5 4.8 ns OE to Bn 1.1 11.9 1.1 7.9 0.5 6.4 0.5 4.6 0.5 4.0 ns propagation delay An to Bn 0.5 7.8 0.5 5.0 0.5 4.1 0.5 3.1 0.5 2.7 ns Bn to An 0.5 4.8 0.5 4.1 0.5 3.5 0.5 2.9 0.5 2.7 ns disable time OE to An 0.5 4.9 0.5 4.9 0.5 4.9 0.5 4.9 0.5 4.9 ns OE to Bn 0.5 10.1 0.5 6.9 0.5 6.0 0.5 4.8 0.5 5.0 ns OE to An 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 ns OE to Bn 1.1 11.7 1.1 7.8 0.5 6.2 0.5 4.5 0.5 3.9 ns enable time VCC(A) = 2.3 V to 2.7 V tpd tdis ten enable time VCC(A) = 3.0 V to 3.6 V tpd tdis ten enable time 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 11 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Table 13. Dynamic characteristics for temperature range -40 °C to +125 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for wave forms see Fig. 5 and Fig. 6 tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Symbol Parameter Conditions VCC(B) 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V Min Max Min Max Min Unit 2.5 V ± 0.2 V 3.3 V ± 0.3 V Max Min Max Min Max VCC(A) = 1.1 V to 1.3 V propagation delay An to Bn 0.5 9.9 0.5 7.4 0.5 6.4 0.5 5.4 0.5 5.3 ns Bn to An 0.5 9.9 0.5 9.4 0.5 9.2 0.5 8.8 0.5 8.6 ns tdis disable time OE to An 0.5 13.0 0.5 13.0 0.5 13.0 0.5 13.0 0.5 13.0 ns OE to Bn 0.5 13.6 0.5 10.5 0.5 10.4 0.5 8.8 0.5 9.8 ns ten enable time OE to An 1.1 15.9 1.1 15.9 1.1 15.9 1.1 15.9 1.1 15.9 ns OE to Bn 1.1 15.7 1.1 11.5 1.1 9.9 1.0 8.5 1.0 8.1 ns tpd VCC(A) = 1.4 V to 1.6 V tpd propagation delay An to Bn 0.5 9.4 0.5 6.2 0.5 5.2 0.5 4.9 0.5 4.6 ns Bn to An 0.5 7.4 0.5 6.2 0.5 5.9 0.5 5.8 0.5 5.5 ns tdis disable time OE to An 0.5 9.5 0.5 9.5 0.5 9.5 0.5 9.5 0.5 9.5 ns OE to Bn 0.5 12.4 0.5 9.3 0.5 8.4 0.5 8.0 0.5 8.6 ns OE to An 1.1 9.6 1.1 9.6 1.1 9.6 1.1 9.6 1.1 9.6 ns OE to Bn 1.1 14.1 1.1 9.0 1.1 7.9 1.0 6.2 1.0 5.8 ns ten enable time VCC(A) = 1.65 V to 1.95 V tpd tdis ten propagation delay An to Bn 0.5 9.2 0.5 5.9 0.5 5.0 0.5 4.2 0.5 3.9 ns Bn to An 0.5 6.4 0.5 5.2 0.5 5.0 0.5 4.8 0.5 4.6 ns disable time OE to An 0.5 7.9 0.5 7.9 0.5 7.9 0.5 7.9 0.5 7.9 ns OE to Bn 0.5 12.0 0.5 8.6 0.5 7.6 0.5 6.6 0.5 6.4 ns OE to An 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 ns OE to Bn 1.1 13.7 1.1 9.1 1.0 7.4 0.5 5.7 0.5 5.0 ns propagation delay An to Bn 0.5 8.8 0.5 5.8 0.5 4.8 0.5 3.7 0.5 3.2 ns Bn to An 0.5 5.4 0.5 4.9 0.5 4.2 0.5 3.7 0.5 3.5 ns disable time OE to An 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 ns OE to Bn 0.5 11.5 0.5 7.9 0.5 7.0 0.5 5.7 0.5 5.8 ns OE to An 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 ns OE to Bn 1.1 13.1 1.1 8.7 0.5 7.1 0.5 5.1 0.5 4.4 ns propagation delay An to Bn 0.5 8.6 0.5 5.5 0.5 4.6 0.5 3.5 0.5 3.0 ns Bn to An 0.5 5.3 0.5 4.6 0.5 3.9 0.5 3.2 0.5 3.0 ns disable time OE to An 0.5 5.4 0.5 5.4 0.5 5.4 0.5 5.4 0.5 5.4 ns OE to Bn 0.5 11.2 0.5 7.6 0.5 6.6 0.5 5.3 0.5 5.5 ns OE to An 0.5 4.4 0.5 4.4 0.5 4.4 0.5 4.4 0.5 4.4 ns OE to Bn 1.1 12.9 1.1 8.6 0.5 6.9 0.5 5.0 0.5 4.3 ns enable time VCC(A) = 2.3 V to 2.7 V tpd tdis ten enable time VCC(A) = 3.0 V to 3.6 V tpd tdis ten enable time 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 12 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 10.1. Waveforms and test circuit VI VM An, Bn input GND tPHL tPLH VOH VM Bn, An output VOL 001aai475 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The data input (An, Bn) to output (Bn, An) propagation delay times VI OE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCCO VM VX VOL tPZH tPHZ output HIGH-to-OFF OFF-to-HIGH VOH VY VM GND outputs enabled outputs enabled outputs disabled 001aai474 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. Enable and disable times Table 14. Measurement points Supply voltage Input [1] Output [2] VCC(A), VCC(B) VM VM VX VY 0.8 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH - 0.1 V 1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH - 0.15 V 3.0 V to 3.6 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH - 0.3 V [1] [2] VCCI is the supply voltage associated with the data input port. VCCO is the supply voltage associated with the output port. 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 13 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VEXT VCC G VI RL VO DUT RT CL RL 001aae331 Test data is given in Table 15. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 15. Test data Supply voltage Input VCC(A), VCC(B) VI [1] Δt/ΔV [2] CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ [3] 0.8 V to 1.6 V VCCI ≤1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 1.65 V to 2.7 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 3.0 V to 3.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO [1] [2] [3] Load VEXT VCCI is the supply voltage associated with the data input port. dV/dt ≥ 1.0 V/ns VCCO is the supply voltage associated with the output port. 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 14 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 10.2. Typical propagation delay characteristics 001aai476 24 tpd (ns) (1) (2) (3) (4) (5) (6) tpd (ns) (1) 20 001aai477 21 17 16 12 8 4 13 (2) (3) (4) (5) (6) 0 20 40 CL (pF) 60 a. Propagation delay (An to Bn); VCC(A) = 0.8 V (1) VCC(B) = 0.8 V. (2) VCC(B) = 1.2 V. (3) VCC(B) = 1.5 V. (4) VCC(B) = 1.8 V. (5) VCC(B) = 2.5 V. (6) VCC(B) = 3.3 V. Fig. 8. 9 0 20 40 CL (pF) 60 b. Propagation delay (An to Bn); VCC(B) = 0.8 V (1) VCC(A) = 0.8 V. (2) VCC(A) = 1.2 V. (3) VCC(A) = 1.5 V. (4) VCC(A) = 1.8 V. (5) VCC(A) = 2.5 V. (6) VCC(A) = 3.3 V. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 15 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 001aai478 7 tPLH (ns) 001aai491 7 (1) tPHL (ns) (2) 5 (1) 5 (3) (2) (3) (4) (4) (5) (5) 3 1 3 0 20 40 CL (pF) 1 60 a. LOW to HIGH propagation delay (An to Bn); VCC(A) = 1.2 V (1) tPLH (ns) 5 20 40 CL (pF) 001aai480 7 tPHL (ns) (1) 5 (2) (3) (2) (3) (4) (5) 3 1 0 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (An to Bn); VCC(A) = 1.2 V 001aai479 7 0 (4) (5) 3 60 c. LOW to HIGH propagation delay (An to Bn); VCC(A) = 1.5 V 1 0 20 40 CL (pF) 60 d. HIGH to LOW propagation delay (An to Bn); VCC(A) = 1.5 V (1) VCC(B) = 1.2 V. (2) VCC(B) = 1.5 V. (3) VCC(B) = 1.8 V. (4) VCC(B) = 2.5 V. (5) VCC(B) = 3.3 V. Fig. 9. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 16 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 001aai481 7 (1) tPLH (ns) 5 001aai482 7 tPHL (ns) (1) 5 (2) (3) (3) (4) 3 1 (2) (5) 0 20 40 CL (pF) 1 60 a. LOW to HIGH propagation delay (An to Bn); VCC(A) = 1.8 V tPLH (ns) 0 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (An to Bn); VCC(A) = 1.8 V 001aai483 7 (4) (5) 3 001aai486 7 tPHL (ns) (1) 5 (1) 5 (2) (2) (3) 1 (3) (4) 3 3 (5) 0 20 40 CL (pF) 60 c. LOW to HIGH propagation delay (An to Bn); VCC(A) = 2.5 V 1 (4) (5) 0 20 40 CL (pF) 60 d. HIGH to LOW propagation delay (An to Bn); VCC(A) = 2.5 V (1) VCC(B) = 1.2 V. (2) VCC(B) = 1.5 V. (3) VCC(B) = 1.8 V. (4) VCC(B) = 2.5 V. (5) VCC(B) = 3.3 V. Fig. 10. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 17 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 001aai485 7 tPLH (ns) 001aai484 7 tPHL (ns) (1) 5 (1) 5 (2) (2) (3) (3) 3 3 (4) (4) (5) (5) 1 0 20 40 CL (pF) 60 a. LOW to HIGH propagation delay (An to Bn); VCC(A) = 3.3 V 1 0 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (An to Bn); VCC(A) = 3.3 V (1) VCC(B) = 1.2 V. (2) VCC(B) = 1.5 V. (3) VCC(B) = 1.8 V. (4) VCC(B) = 2.5 V. (5) VCC(B) = 3.3 V. Fig. 11. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 18 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 11. Package outline TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm D SOT355-1 E A X c HE y v M A Z 13 24 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 12 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 7.9 7.7 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT355-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig. 12. Package outline SOT355-1 (TSSOP24) 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 19 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm D B SOT815-1 A A E A1 c detail X terminal 1 index area C e1 terminal 1 index area e 2 y1 C v M C A B w M C b 11 y L 12 1 e2 Eh 24 13 23 14 X Dh 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 e2 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 5.6 5.4 4.25 3.95 3.6 3.4 2.25 1.95 0.5 4.5 1.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT815-1 --- --- --- EUROPEAN PROJECTION ISSUE DATE 03-04-29 Fig. 13. Package outline SOT815-1 (DHVQFN24) 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 20 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 12. Abbreviations Table 16. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 13. Revision history Table 17. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AVC8T245 v.6 20200331 Product data sheet - Modifications: • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Table 4: Derating values for Ptot total power dissipation updated. 74AVC8T245 v.5 20121227 Modifications: • 74AVC8T245 v.4 20111208 Modifications: • 74AVC8T245 v.3 20110928 74AVC8T245 v.2 74AVC8T245 v.1 74AVC8T245 Product data sheet 74AVC8T245 v.5 Product data sheet - 74AVC8T245 v.4 Table 4: conditions ICC and IGND changed (errata). Product data sheet - 74AVC8T245 v.3 Product data sheet - 74AVC8T245 v.2 20090428 Product data sheet - 74AVC8T245 v.1 20080711 Product data sheet - - Legal pages updated. All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 21 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". 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Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 22 / 23 74AVC8T245 Nexperia 8-bit dual supply translating transceiver with configurable voltage translation; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 4 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................5 9. Static characteristics....................................................5 10. Dynamic characteristics............................................ 9 10.1. Waveforms and test circuit...................................... 13 10.2. Typical propagation delay characteristics................ 15 11. Package outline........................................................ 19 12. Abbreviations............................................................ 21 13. Revision history........................................................21 14. Legal information......................................................22 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 31 March 2020 74AVC8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 31 March 2020 © Nexperia B.V. 2020. All rights reserved 23 / 23