HEF4094BTS,118

HEF4094B 8-stage shift-and-store register Rev. 13 — 14 November 2018 Product data sheet 1. General description The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (OE) signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4094B devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next negative going clock edge. This is used for cascading HEF4094B devices when the clock has a slow rise time. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits • • • • • Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from -40 °C to +85 °C and -40 °C to +125 °C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from -40 °C to +125 °C. Type number Package Name Description Version HEF4094BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4094BTS SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 HEF4094BTT TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 HEF4094B Nexperia 8-stage shift-and-store register 4. Functional diagram 2 3 1 15 D 8-STAGE SHIFT REGISTER CP QS2 QS1 STR 3 1 CP STR 10 9 2 D 8-BIT STORAGE REGISTER OE 3-STATE OUTPUTS OE QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7 4 Fig. 1. 5 6 7 14 13 12 11 Functional diagram Fig. 2. STAGE 0 D 15 001aaf119 D D 9 QS2 10 QP0 4 QP1 5 QP2 6 QP3 7 QP4 14 QP5 13 QP6 12 QP7 11 001aaf111 Logic symbol STAGES 1 TO 6 Q QS1 STAGE 7 Q CP D Q QS1 CP FF 0 CP D FF 7 CP Q QS2 LE LATCH D Q D Q LE LE LATCH 0 LATCH 7 STR OE QP0 Fig. 3. QP1 QP2 QP3 QP4 QP5 QP6 QP7 001aag799 Logic diagram HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 2 / 17 HEF4094B Nexperia 8-stage shift-and-store register 5. Pinning information 5.1. Pinning HEF4094B STR 1 16 VDD D 2 15 OE CP 3 14 QP4 QP0 4 13 QP5 QP1 5 12 QP6 QP2 6 11 QP7 QP3 7 10 QS2 VSS 8 9 QS1 aaa-007666 Fig. 4. Pin configuration SOT109-1 (SO16), SOT338-1 (SSOP16) and SOT403-1 (TSSOP16) 5.2. Pin description Table 2. Pin description Symbol Pin Description STR 1 strobe input D 2 data input CP 3 clock input QP0 to QP7 4, 5, 6, 7, 14, 13, 12, 11 parallel output VSS 8 ground supply voltage QS1 9 serial output QS2 10 serial output OE 15 output enable input VDD 16 supply voltage HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 3 / 17 HEF4094B Nexperia 8-stage shift-and-store register 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = HIGH-impedance OFF-state; NC = no change; ↑ = positive-going transition; ↓ = negative-going transition; Q6S = the data in register stage 6 before the LOW to HIGH clock transition; Q7S = the data in register stage 7 before the HIGH to LOW clock transition. Inputs Parallel outputs Serial outputs CP OE STR D QP0 QPn QS1 QS2 ↑ L X X Z Z Q6S NC ↓ L X X Z Z NC Q7S ↑ H L X NC NC Q6S NC ↑ H H L L QPn -1 Q6S NC ↑ H H H H QPn -1 Q6S NC ↓ H H H NC NC NC Q7S CLOCK INPUT DATA INPUT STROBE INPUT OUTPUT ENABLE INPUT INTERNAL Q0S (FF 0) OUTPUT QP0 Z-state INTERNAL Q6S (FF 6) OUTPUT QP6 Z-state SERIAL OUTPUT QS1 SERIAL OUTPUT QS2 001aaf117 At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the QSn outputs. Fig. 5. Timing diagram HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 4 / 17 HEF4094B Nexperia 8-stage shift-and-store register 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground). Symbol Parameter VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O Conditions VI < -0.5 V or VI > VDD + 0.5 V Min Max Unit -0.5 +18 V - ±10 mA -0.5 VDD + 0.5 V - ±10 mA input/output current - ±10 mA IDD supply current - 50 mA Tstg storage temperature -65 +150 °C Tamb ambient temperature -40 +125 °C Ptot total power dissipation SO16, SSOP16 and TSSOP16 - 500 mW P power dissipation per output - 100 mW Min Typ Max 3 - 15 V [1] VO < -0.5 V or VO > VDD + 0.5 V [1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C. For (T)SSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Unit VDD supply voltage VI input voltage 0 - VDD V Tamb ambient temperature in free air -40 - +125 °C Δt/ΔV input transition rise and fall rate VDD = 5 V - - 3.75 μs/V VDD = 10 V - - 0.5 μs/V VDD = 15 V - - 0.08 μs/V HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 5 / 17 HEF4094B Nexperia 8-stage shift-and-store register 9. Static characteristics Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH VIL VOH VOL IOH IOL HIGH-level input voltage |IO| < 1 μA LOW-level input |IO| < 1 μA voltage HIGH-level output voltage |IO| < 1 μA VDD Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Tamb = +125 °C Unit Min Max Min Max Min Max Min Max 3.5 - 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 - 0.05 V 5V LOW-level output voltage |IO| < 1 μA 15 V - 0.05 - 0.05 - 0.05 - 0.05 V HIGH-level output current VO = 2.5 V 5V - -1.7 - -1.4 - -1.1 - -1.1 mA VO = 4.6 V 5V - -0.64 - -0.5 - -0.36 - -0.36 mA VO = 9.5 V 10 V - -1.6 - -1.3 - -0.9 - -0.9 mA VO = 13.5 V 15 V - -4.2 - -3.4 - -2.4 - -2.4 mA VO = 0.4 V 5V 0.64 - 0.5 - 0.36 - 0.36 - mA VO = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA QPn output is HIGH; VO = 15 V 15 V - 0.4 - 0.4 - 12 - 12 μA 15 V - ±0.1 - ±0.1 - ±1.0 - ±1.0 μA all valid input 5 V combinations; 10 V IO = 0 A 15 V - 5 - 5 - 150 - 150 μA - 10 - 10 - 300 - 300 μA - 20 - 20 - 600 - 600 μA - - - 7.5 - - - - pF LOW-level output current IOZ OFF-state output current II input leakage current IDD supply current CI Conditions input capacitance HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 6 / 17 HEF4094B Nexperia 8-stage shift-and-store register 10. Dynamic characteristics Table 7. Dynamic characteristics VSS = 0 V; Tamb = 25 °C; for test circuit see Fig. 10; unless otherwise specified. Symbol Parameter Conditions VDD tPHL HIGH to LOW propagation delay CP to QS1; see Fig. 6 5V CP to QS2; see Fig. 6 CP to QPn; see Fig. 6 STR to QPn; see Fig. 7 tPLH LOW to HIGH propagation delay, CP to QS1; see Fig. 6 CP to QS2; see Fig. 6 CP to QPn; see Fig. 6 STR to QPn; see Fig. 7 tt tPZH tPZL tPHZ tPLZ OFF-state to HIGH propagation delay OE to QPn; see Fig. 8 OFF-state to LOW propagation delay OE to QPn; see Fig. 8 HIGH to OFF-state propagation delay OE to QPn; see Fig. 8 LOW to OFF-state propagation delay HEF4094B Product data sheet OE to QPn; see Fig. 8 [1] 108 ns + (0.55 ns/pF)CL Min Typ Max Unit - 135 270 ns 65 130 ns 10 V 54 ns + (0.23 ns/pF)CL - 15 V 42 ns + (0.16 ns/pF)CL - 50 100 ns 5V 78 ns + (0.55 ns/pF)CL - 105 210 ns 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns 15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns 5V 138 ns + (0.55 ns/pF)CL - 165 330 ns 10 V 64 ns + (0.23 ns/pF)CL - 75 150 ns 15 V 47 ns + (0.16 ns/pF)CL - 55 110 ns 5V 83 ns + (0.55 ns/pF)CL - 110 220 ns 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns 15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns 5V [1] 78 ns + (0.55 ns/pF)CL - 105 210 ns 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns 15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns 5V 78 ns + (0.55 ns/pF)CL - 105 210 ns 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns 15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns 5V 123 ns + (0.55 ns/pF)CL - 150 300 ns 10 V 59 ns + (0.23 ns/pF)CL - 70 140 ns 15 V 47 ns + (0.16 ns/pF)CL - 55 110 ns 5V 73 ns + (0.55 ns/pF)CL - 100 200 ns 10 V 34 ns + (0.23 ns/pF)CL - 45 90 ns 15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns [1] 10 ns + (1.00 ns/pF)CL - 60 120 ns 5V transition time Extrapolation formula 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns 15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns 5V - 40 80 ns 10 V - 25 50 ns 15 V - 20 40 ns 5V - 40 80 ns 10 V - 25 50 ns 15 V - 20 40 ns 5V - 75 150 ns 10 V - 40 80 ns 15 V - 30 60 ns 5V - 80 160 ns 10 V - 40 80 ns 15 V - 30 60 ns All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 7 / 17 HEF4094B Nexperia 8-stage shift-and-store register Symbol Parameter Conditions VDD tsu set-up time D to CP; see Fig. 9 th hold time tW fmax [1] maximum frequency Min Typ Max Unit 5V 60 30 - ns 10 V 20 10 - ns 15 V 15 5 - ns 5V +5 -15 - ns 10 V 20 5 - ns 15 V 20 5 - ns minimum LOW 5 V clock pulse; 10 V see Fig. 6 15 V 60 30 - ns 30 15 - ns 24 12 - ns minimum HIGH 5 V strobe pulse; 10 V see Fig. 7 15 V 40 20 - ns 30 15 - ns 24 12 - ns 5V 5 10 - MHz 10 V 11 22 - MHz 15 V 14 28 - MHz D to CP; see Fig. 9 pulse width Extrapolation formula see Fig. 6 The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). Table 8. Dynamic power dissipation VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C. Symbol PD Parameter dynamic power dissipation VDD Typical formula for PD (μW) where: 5V PD = 2100 x fi + Σ(fo x CL) x 10 V PD = 9700 x fi + Σ(fo x CL) x 15 V PD = 26000 x fi + Σ(fo x CL) x VDD fi = input frequency in MHz, fo = output frequency in MHz, CL = output load capacitance in pF, VDD = supply voltage in V, Σ(fo x CL) = sum of the outputs. 2 VDD 2 VDD 2 10.1. Waveforms and test circuit 1/fmax VI CP input VM GND tW VOH QPn, QS1 output tPHL tPLH VM VOL VOH QS2 output tPHL tPLH VM VOL 001aaf113 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. Clock to outputs propagation delays, and clock pulse width and maximum frequency HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 8 / 17 HEF4094B Nexperia 8-stage shift-and-store register Table 9. Measurement points Supply voltage Input Output VDD VM VM VX VY 5 V to 15 V 0.5VDD 0.5VDD 0.1VDD 0.9VDD VI STR input VM GND tW tPHL tPLH VOH QPn output VM VOL 001aaj058 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 7. Strobe to output propagation delays, and strobe pulse width, set up and hold times VI OE input VM GND tPZL tPLZ VDD output LOW-to-OFF OFF-to-LOW VOL VM VX tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND tPZH VY VM outputs enabled outputs disabled outputs enabled 001aai545 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 8. 3-state output enable and disable times for OE input HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 9 / 17 HEF4094B Nexperia 8-stage shift-and-store register VI VM CP input GND t su t su th th VI VM D input GND VOH VM QPn, QS1, QS2 output VOL 001aaf115 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 9. Data input data set up and hold times VI negative pulse tW 90 % 90 % VM 10 % 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % 90 % VM VM 10 % 10 % tW 001aaj781 a. Input waveform VEXT VDD G VI RL VO DUT RT CL 001aaj915 b. Test circuit Test and measurement data is given in Table 10. Definitions test circuit: DUT = Device Under Test. RL = Load resistance; CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 10. Test circuit Table 10. Test data Supply voltage Input VEXT Load VDD VI tr, tf tPHL, tPLH tPHZ, tPZH tPLZ, tPZL CL RL 5 V to 15 V VSS or VDD ≤ 20 ns open VSS VDD 50 pF 1 kΩ HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 10 / 17 HEF4094B Nexperia 8-stage shift-and-store register 11. Application information Some examples of applications for the HEF4094B are: • • Serial-to-parallel data conversion Remote control holding register DIGITALLY CONTROLLED EQUIPMENT (REQUIRES CONTINUOUS DIGITAL CONTROL) QP0 D QP7 HEF4094B STR CP QS2 DIGITALLY CONTROLLED EQUIPMENT QP0 D QP7 HEF4094B STR QS2 DIGITALLY CONTROLLED EQUIPMENT QP0 D CP QP7 HEF4094B STR CP CONTROL AND SYNC CIRCUITRY data clock from remote control panel 001aae666 Fig. 11. Remote control holding register HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 11 / 17 HEF4094B Nexperia 8-stage shift-and-store register 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 12. Package outline SOT109-1 (SO16) HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 12 / 17 HEF4094B Nexperia 8-stage shift-and-store register SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8o 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig. 13. Package outline SOT338-1 (SSOP16) HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 13 / 17 HEF4094B Nexperia 8-stage shift-and-store register TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm D SOT403-1 E A X c y HE v M A Z 9 16 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 14. Package outline SOT403-1 (TSSOP16) HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 14 / 17 HEF4094B Nexperia 8-stage shift-and-store register 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4094B v.13 20181114 Product data sheet - HEF4094B v.11 Modifications: • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Fig. 5 corrected. HEF4094B v.12 20160325 Modifications: • HEF4094B v.11 20130829 Modifications: • HEF4094B v.10 20130625 Modifications: • HEF4094B v.9 20111116 Modifications: • HEF4094B v.8 20100402 Product data sheet - HEF4094B v.7 HEF4094B v.7 20091216 Product data sheet - HEF4094B v.6 HEF4094B v.6 20091103 Product data sheet - HEF4094B v.5 HEF4094B v.5 20090728 Product data sheet - HEF4094B v.4 HEF4094B v.4 20081030 Product data sheet - HEF4094B_CNV v.3 HEF4094B_CNV v.3 19950101 Product specification - HEF4094B_CNV v.2 HEF4094B_CNV v.2 19950101 Product specification - - HEF4094B Product data sheet Product data sheet - HEF4094B v.11 Type number HEF4094BP (SOT38-4) removed. Product data sheet - HEF4094B v.10 - HEF4094B v.9 - HEF4094B v.8 Table 4: Table note corrected (errata). Product data sheet added type number HEF4094BTT. Product data sheet Table 6: IOH minimum values changed to maximum All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 15 / 17 HEF4094B Nexperia 8-stage shift-and-store register 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. 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Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 16 / 17 HEF4094B Nexperia 8-stage shift-and-store register Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 4 7. Limiting values............................................................. 5 8. Recommended operating conditions..........................5 9. Static characteristics....................................................6 10. Dynamic characteristics............................................ 7 10.1. Waveforms and test circuit........................................ 8 11. Application information............................................11 12. Package outline........................................................ 12 13. Revision history........................................................15 14. Legal information......................................................16 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 14 November 2018 HEF4094B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 14 November 2018 © Nexperia B.V. 2018. All rights reserved 17 / 17