0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
HEF4557BT,653

HEF4557BT,653

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    SOIC16_150MIL

  • 描述:

    IC SHIFT REGISTER 1-64BIT 16SOIC

  • 数据手册
  • 价格&库存
HEF4557BT,653 数据手册
HEF4557B 1-to-64 bit variable length shift register Rev. 7 — 1 April 2016 Product data sheet 1. General description The HEF4557B is a static clocked serial shift register whose length may be programmed to be any number of bits between 1 and 64. The number of bits selected is equal to the sum of the subscripts of the enabled length control inputs (L1, L2, L4, L8, L16, and L32) plus one. Serial data may be selected from the DA or DB data inputs with the A/B select input. This feature is useful for recirculation purposes. Information on DA or DB is shifted into the first register position and all the data in the register is shifted one position to the right on the LOW to HIGH transition of CP0 while CP1 is LOW or on the HIGH to LOW transition of CP1 while CP0 is HIGH. A HIGH on master reset (MR) resets the register and forces Q to LOW and Q to HIGH, independent of the other inputs. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits      Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C Type number HEF4557BT Package Name Description Version SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x / $% '$ '% )) ' 4 &3 )) ' 4 )) ' 4 )) ' 4 )) ' 4 )) ' 4 &3 &3 &3 &3 &3 &' &3 &' &' &' &' Nexperia / 4. Functional diagram HEF4557B Product data sheet / &' Rev. 7 — 1 April 2016 / 05 / / )) ' 4 )) ' 4 )) ' 4 )) ' 4 )) ' 4 )) ' 4 &3 &3 &3 &3 &3 &3 &' &' &' &' &' &' 4 4 DDH Logic diagram 2 of 16 HEF4557B Fig 1. 1-to-64 bit variable length shift register All information provided in this document is subject to legal disclaimers. &3 HEF4557B Nexperia 1-to-64 bit variable length shift register   $%   05 '$      / &' '   / / / '% &3  / / 4 6+,)75(*,67(5 %,76 4   &3 &3 DDH Fig 2. Functional diagram 5. Pinning information 5.1 Pinning +()% /   9'' /   / 05   / &3   / &3   /   4 '$   4 '% 966   $% DDH Fig 3. Pin configuration 5.2 Pin description Table 2. Pin description table Symbol Pin Description L1, L2, L4, L8, L16, L32 2, 1, 15, 14, 13, 12 bit-length control input MR 3 asynchronous master reset CP0 4 clock input CP1 5 clock input DA, DB 7, 6 data input VSS 8 ground (0 V) A/B 9 select data input HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 3 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register Table 2. Pin description table …continued Symbol Pin Description Q 10 buffered output Q 11 complementary buffered output VDD 16 supply voltage 6. Functional description Table 3. Function table[1] Inputs Output MR A/B DA DB CP0 CP1 Q L L D1 D2  L D2 L H D1 D2  L D1 L L D1 D2 H  D2 L H D1 D2 H  D1 H X X X X X L [1] The moment Dn appears at Q depends on the bit-length shown in Table 4; H = HIGH voltage level; L = LOW voltage level; X = don’t care;  = positive-going transition;  = negative-going transition; D1, D2 = either HIGH or LOW. Table 4. Bit-length select function table L32 L16 L8 L4 L2 L1 Register length L L L L L L 1-bit L L L L L H 2-bits L L L L H L 3-bits L L L L H H 4-bits L L L H L L 5-bits L L L H L H 6-bits L L L H H L 7-bits L L L H H H 8-bits L H H H H H 32-bits H L L L L L 33-bits H L L L L H 34-bits H H H H L L 61-bits H H H H L H 62-bits H H H H H L 63-bits H H H H H H 64-bits L1 to L16 continue to increment in a binary count with L32 LOW L1 to L16 continue to increment in a binary count with L32 HIGH HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 4 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register 7. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O input/output current IDD supply current Tstg storage temperature Tamb ambient temperature Conditions Max Unit 0.5 +18 V mA VI < 0.5 V or VI > VDD + 0.5 V - 10 0.5 VDD + 0.5 - 10 mA - 10 mA VO < 0.5 V or VO > VDD + 0.5 V Ptot total power dissipation SO16 package P power dissipation per output [1] Min V - 50 mA 65 +150 C 40 +85 C - 500 mW - 100 mW [1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. 8. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Min Typ Max VDD supply voltage 3 - 15 V VI input voltage 0 - VDD V Tamb ambient temperature in free air 40 - +85 C t/V input transition rise and fall rate VDD = 5 V - - 3.75 s/V VDD = 10 V - - 0.5 s/V VDD = 15 V - - 0.08 s/V HEF4557B Product data sheet Conditions All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Unit Nexperia B.V. 2017. All rights reserved 5 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register 9. Static characteristics Table 7. Static characteristics VSS = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter Conditions VDD Tamb = 40 C Min VIH VIL VOH VOL IOH IOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage HIGH-level output current LOW-level output current II input leakage current IDD supply current CI input capacitance HEF4557B Product data sheet IO < 1 A Max Tamb = 25 C Tamb = 85 C Min Min Max Unit Max 5V 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 V VO = 2.5 V 5V - 1.7 - 1.4 - 1.1 mA VO = 4.6 V 5V - 0.52 - 0.44 - 0.36 mA VO = 9.5 V 10 V - 1.3 - 1.1 - 0.9 mA VO = 13.5 V 15 V - 3.6 - 3.0 - 2.4 mA VO = 0.4 V 5V 0.52 - 0.44 - 0.36 - mA VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA 15 V - 0.3 - 0.3 - 1.0 A IO < 1 A IO < 1 A IO < 1 A IO = 0 A 5V - 50 - 50 - 375 A 10 V - 100 - 100 - 750 A 15 V - 200 - 200 - 1500 A - - - - 7.5 - - pF All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 6 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register 10. Dynamic characteristics Table 8. Dynamic characteristics VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified. Symbol Parameter tPHL Conditions VDD HIGH to LOW CP0, CP1 to Q, Q; propagation delay see Figure 4 MR to Q; see Figure 4 Extrapolation formula Min Typ Max Unit 213 ns + (0.55 ns/pF)CL - 240 480 ns 10 V 79 ns + (0.23 ns/pF)CL - 90 180 ns 15 V 57 ns + (0.16 ns/pF)CL - 65 130 ns 5V 143 ns + (0.55 ns/pF)CL - 170 340 ns 10 V 69 ns + (0.23 ns/pF)CL - 80 160 ns 5V [1] 52 ns + (0.16 ns/pF)CL - 60 120 ns 213 ns + (0.55 ns/pF)CL - 240 480 ns 10 V 79 ns + (0.23 ns/pF)CL - 90 180 ns 15 V 57 ns + (0.16 ns/pF)CL - 65 130 ns 5V 113 ns + (0.55 ns/pF)CL - 140 280 ns 10 V 59 ns + (0.23 ns/pF)CL - 70 140 ns 47 ns + (0.16 ns/pF)CL - 55 110 ns 10 ns + (1.00 ns/pF)CL - 60 120 ns 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns 15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns 360 180 - ns 140 70 - ns 15 V tPLH LOW to HIGH CP0, CP1 to Q, Q; propagation delay see Figure 4 MR to Q; see Figure 4 5V [1] 15 V tt tsu transition time set-up time see Figure 4 DA, DB, A/B to CP0, 5V CP1; L1 to L32 = LOW; 10 V see Figure 5 15 V DA, DB, A/B to CP0, CP1; L32 = HIGH; see Figure 5 th tW hold time pulse width HEF4557B Product data sheet 5V [1] [2] 90 45 - ns 5V +40 20 - ns 10 V +35 10 - ns +30 5 - ns 40 110 - ns 10 45 - ns 0 30 - ns 15 V DA, DB, A/B to CP0, 5V CP1; L1 to L32 = LOW; 10 V see Figure 5 15 V [2] DA, DB, A/B to CP0, CP1; L1 to L32 = HIGH; see Figure 5 5V 90 30 - ns 10 V 60 20 - ns 15 V 50 15 - ns CP0 input LOW; minimum width; see Figure 5 5V 180 90 - ns 10 V 60 30 - ns 15 V 40 20 - ns CP1 input HIGH; minimum width; see Figure 5 5V 180 90 - ns 10 V 60 30 - ns 15 V 40 20 - ns MR input HIGH; minimum width; see Figure 5 5V 150 75 - ns 10 V 70 35 - ns 15 V 50 25 - ns All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 7 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register Table 8. Dynamic characteristics …continued VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified. Symbol Parameter trec Conditions recovery time VDD MR input; L1 to L32 = LOW; see Figure 5 MR input; L32 = HIGH maximum frequency fmax see Figure 5 Min Typ Max 500 250 - ns 10 V 250 125 - ns 15 V 150 75 - ns 5V 110 50 - ns 10 V 70 30 - ns 15 V 60 25 - ns 5V 2.5 5 - MHz 10 V 7 14 - MHz 15 V 10 20 - MHz 5V Extrapolation formula [2] Unit [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). [2] The set-up, hold, and recovery times vary with the minimum number of bits selected. For intermediate numbers not specified, interpolate as shown in Table 9. Interpolation table [1] Table 9. Length control inputs L1 L2 L4 L8 L16 L32 Minimum number of bits selected Set-up, hold, and recovery times Example: trec minimum, VDD = 5 V L L L L L L 1 see Table 8 500 ns H L L L L L 2 435 ns X H L L L L 3 (interpolate in 6 equal steps) X X H L L L 5 X X X H L L 9 240 ns X X X X H L 17 175 ns X X X X X H 33 [1] 370 ns 305 ns see Table 8 110 ns H = HIGH voltage level; L = LOW voltage level; X = don’t care Table 10. Dynamic power dissipation PD PD can be calculated from the formulas shown. VSS = 0 V; tr = tf  20 ns; Tamb = 25 C. Symbol PD Parameter dynamic power dissipation VDD Typical formula for PD (W) where: 5V PD = 3500  fi + (fo  CL)  VDD 10 V PD = 15000  fi + (fo  CL)  VDD2 fo = output frequency in MHz, 15 V PD = 37000  fi + (fo  CL)  VDD2 CL = output load capacitance in pF, 2 fi = input frequency in MHz, VDD = supply voltage in V, (fo  CL) = sum of the outputs. HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 8 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register 11. Waveforms 9, &3LQSXW &3/2:  90 9 9, &3LQSXW &3+,*+  90 9 9, 05LQSXW 9 90 W3/+ W3+/ WW 92+ 90 4RXWSXW  92/ W3/+ 92+ W3+/  90 4RXWSXW 92/ WW   WW WW DDN For measurement points see Table 11. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 4. Propagation delays HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 9 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register IPD[ 9, &3LQSXW &3 / 90 9 W: 9, &3LQSXW &3 + 90 9 WVX 9, '$'%LQSXW W: WK 90 9 WVX 9, $%LQSXW WK 90 9 WUHF 9, 90 05LQSXW 9 W: DDH Set-up and hold times are shown as positive values but may be specified as negative values. The shaded area indicates where data can change for predictable performance. For measurement points see Table 11. Fig 5. Waveforms showing recovery time for MR and minimum CP0, CP1, and MR pulse widths, set-up and hold times for DA, DB, and A/B to CP0 and CP1 HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 10 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register W: 9,   QHJDWLYH SXOVH 90 90  9  WI WU WU WI 9,  SRVLWLYH SXOVH  90 90  9  W: DDM a. Input waveforms 9'' * 9, 92 '87 57 &/ DDJ b. Test circuit Test data is given in Table 11. Definitions for test circuit: Device Under Test (DUT) CL = Load capacitance including jig and probe capacitance; RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Test circuit for measuring switching times Table 11. Measurement points and test data Supply voltage Input VDD VI VM tr, tf CL 5 V to 15 V VDD 0.5VI  20 ns 50 pF HEF4557B Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 11 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register 12. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ =   4 $ $ $   $ SLQLQGH[ ș /S  /  H Z 0 ES   GHWDLO; PP VFDOH ',0(16,216 LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV  81,7 $ PD[ $ $ $ ES F '   (   H +( / /S 4 Y Z \ =   PP                                                 LQFKHV         ș R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG Fig 7. 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7(   Package outline SOT109-1 (SO16) HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 12 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register 13. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4557B v.7 20160401 Product data sheet - HEF4557B v.6 Modifications: HEF4557B v.6 Modifications: • Type number HEF4557BP (SOT38-4) removed. 20111118 • • • Product data sheet - HEF4557B v.5 Section Applications removed Table 7: IOH minimum values changed to maximum Figure 5: “A/B input” changed to “A/B input” HEF4557B v.5 20091216 Product data sheet - HEF4557B v.4 HEF4557B v.4 20090916 Product data sheet - HEF4557B_CNV v.3 HEF4557B_CNV v.3 19950101 Product specification - HEF4557B_CNV v.2 HEF4557B_CNV v.2 19950101 Product specification - - HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 13 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. 14.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. HEF4557B Product data sheet Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 14 of 16 HEF4557B Nexperia 1-to-64 bit variable length shift register Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com HEF4557B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 1 April 2016 © Nexperia B.V. 2017. All rights reserved 15 of 16 Nexperia HEF4557B 1-to-64 bit variable length shift register 16. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 01 April 2016
HEF4557BT,653 价格&库存

很抱歉,暂时无法提供与“HEF4557BT,653”相匹配的价格&库存,您可以联系我们找货

免费人工找货
HEF4557BT,653

    库存:5