LP3981-18B5F

Preliminary Datasheet LP3981 300mA,Ultra-low noise, Small Package Ultra-Fast CMOS LDO Regulator General Description Features The LP3981 is designed for portable RF and wireless  Ultra-Low-Noise for RF Application applications demanding performance and space  2V- 6.5V Input Voltage Range requirements. The LP3981 performance is optimized  Low Dropout : 220mV @ 300mA for battery-powered systems to deliver ultra low noise  1.2V, 1.5V, 1.8V, 2.5V, 2.8V 3.0V and 3.3V Fixed and low quiescent current. Regulator ground current  300mA Output Current, 550mA Peak Current increases only slightly in dropout, further prolonging  High PSSR:-76dB at 1KHz the battery life. The LP3981 also works with low-ESR  < 0.01uA Standby Current When Shutdown ceramic capacitors, reducing the amount of board  Available in SOT23-5 Package space necessary for power applications, critical in  TTL-Logic-Controlled Shutdown Input hand-held wireless devices. The LP3981 consumes  Ultra-Fast Response in Line/Load transient less than 0.01µA in shutdown mode and has fast  Current Limiting and Thermal Shutdown turn-on time less than 50µs. The other features include Protection ultra low dropout voltage, high output accuracy,  current limiting protection, and high ripple rejection Applications ratio. It is available in 5-lead of SOT23-5 packages. Order Information LP3981 □ □ □ □ □ F: Pb-Free Package Type B5: SOT23-5 Quick start-up (typically 50uS)  Portable Media Players/MP3 players  Cellular and Smart mobile phone  LCD  DSC Sensor  Wireless Card Typical Application Circuit Vin Vout Output Voltage Type 1 12: 1.2V VIN VOUT + + GND 3 13: 1.3V 5 EN 15: 1.5V NC 4 1uF 2 18: 1.8V 25: 2.5V 28: 2.8V 30: 3.0V 33: 3.3V LP3981-02 May.-2013 Marking Information Device LP3981 Email: marketing@lowpowersemi.com Marking Package Shipping SOT23-5 3K/REEL www.lowpowersemi.com Page 1 of 6 Preliminary Datasheet LP3981 Functional Pin Description Package Type Pin Configurations Top View VIN 1 GND 2 EN 3 5 VOUT 4 NC SOT23-5 Pin Description Pin Name Description 1 VIN Power Input Voltage 2 GND Ground 3 EN 4 NC 5 VOUT Chip Enable (Active High). Note that this pin is high impedance. There should be a pull low 100kΩ resistor connected to GND when the control signal is floating. NC Output Voltage Function Diagram EN VREF SHUTDOWN AND LOGIC CONTROL + - VIN MOS DRIVER VOUT ERROR AMPLIFIER CURRENT-LIMIT AND THERMAL PROTECTION LP3981-02 May.-2013 Email: marketing@lowpowersemi.com GND www.lowpowersemi.com Page 2 of 6 Preliminary Datasheet LP3981 Absolute Maximum Ratings  Supply Input Voltage ----------------------------------------------------------------------------------------------------- 6V  Power Dissipation, PD @ TA = 25°C SOT-25 --------------------------------------------------------------- 400mW  Package Thermal Resistance SOT-25, θJA ---------------------------------------------------------------- 250°C/W  Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------- 260°C  Storage Temperature Range -------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility  HBM (Human Body Mode) --------------------------------------------------------------------------------------------- 2kV  MM(Machine-Mode) --------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions  Supply Input Voltage ---------------------------------------------------------------------------------------- 2.5V to 5.5V  EN Input Voltage ------------------------------------------------------------------------------------------------ 0V to 5.5V  Operation Junction Temperature Range ------------------------------------------------------------ -40°C to 125°C  Operation Ambient Temperature Range ------------------------------------------------------------ −40°C to 85°C Electrical Characteristics (VIN = VOUT + 1V, CIN = COUT = 1µF, , TA = 25° C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units Output Voltage Accuracy ΔVOUT IOUT = 1mA −2 -- +2 % Maximum output Current Imax VEN=VIN,VIN>2.5V Current Limit ILIM RLOAD = 1Ω Quiescent Current IQ VEN ≥ 1.2V, IOUT = 0mA 45 120 μA Dropout Voltage VDROP IOUT = 200mA, VOUT > 2.8V 170 200 mV IOUT = 300mA, VOUT > 2.8V 220 300 mV Line Regulation ΔVLINE VIN = (VOUT + 1V) to 5.5V, IOUT = 1mA 0.3 % Load Regulation ΔVLOAD 1mA < IOUT < 300mA 2 % Standby Current ISTBY VEN = GND, Shutdown 0.01 1 μA EN Input Bias Current IIBSD VEN = GND or VIN 0.01 100 nA VIL VIN=3V to 5.5V, Shutdown 0.4 V VIH VIN=3V to 5.5V, Start-Up Logic-Low EN Voltage Threshold Logic-High Voltage Output Noise Voltage Power Supply f=100Hz Rejection Rate f=10kHz Thermal Shutdown Temperature LP3981-02 May.-2013 360 COUT=1µF, IOUT=50mA TSD mA 400 mA 1.2 10Hz to 100kHz, IOUT=200mA COUT=1µF PSRR 300 V 100 −76 dB −73 dB 150 Email: marketing@lowpowersemi.com uVRMS www.lowpowersemi.com °C Page 3 of 6 Preliminary Datasheet LP3981 Typical Operating Characteristics LP3980-15B5F LP3980-15B5F LP3980-28B5F LP3980-28B5F LP3981-02 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 4 of 6 Preliminary Datasheet LP3981 Applications Information Like any low-dropout regulator, the external capacitors used with the LP3981 must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1µF on the LP3981 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements Start-up Function Enable Function The LP3981 features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.2 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below 0.4 volts. For to protecting the system, the LP3981 have a quick-discharge function. If the enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state. Thermal Considerations for minimum amount of capacitance and ESR in all Thermal protection limits power dissipation in LDOs designed LP3981. When the operation junction temperature specifically to work with low ESR ceramic output exceeds 150°C, the OTP circuit starts the thermal capacitor performance shutdown function turn the pass element off. The consideration. Using a ceramic capacitor whose pass element turns on again after the junction value is at least 1µF with ESR is > 25mΩ on the temperature cools by 25°C. For continue operation, LP3981 output ensures stability. The LP3981 still do not exceed absolute maximum operation junction works well with output capacitor of other types due to temperature 125°C. application. in The LP3981 space-saving and is the wide stable ESR range. Figure 1 shows the curves of allowable ESR range as a function of load The power dissipation definition in device is : PD = (VIN−VOUT) x IOUT + VIN x IQ current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and The maximum power dissipation depends on the improve load transient response, stability, and PSRR. thermal resistance of IC package, PCB layout, the The output capacitor should be located not more rate than 0.5 inch from the VOUT pin of the LP3981 and difference between junction to ambient. returned to a clean analog ground. of surroundings airflow and temperature The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) − TA ) /θJA LP3981-02 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 6 Preliminary Datasheet LP3981 Packaging Information LP3981-02 May.-2013 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 6 of 6