SPD91011W-2/TR

SPD91011W SPD91011W 1 Lines, Bi-directional, Low Capacitance http//:www.sh-willsemi.com Transient Voltage Suppressors Descriptions The SPD91011W is a low capacitance TVS (Transient Voltage Suppressor) array designed to protect high speed data interfaces. It has been specifically designed to protect sensitive electronic components which are connected to data and transmission lines from over-stress caused SOD-323 by Electrostatic Discharge (ESD), cable discharge events (CDE), lightning and other induced voltage surges. The SPD91011W incorporates low capacitance steering diodes that reduce the typical capacitance to 1.5pF per line. Pin1 Pin2 The SPD91011W may be used to provide ESD protection up to ±30kV (contact discharge) according to IEC61000-4-2, and withstand peak pulse current up to 25A (8/20μs) according to IEC61000-4-5. Circuit diagram The SPD91011W is available in SOD-323 package. Standard products are Pb-free and Halogen-free. Features  Stand-off voltage: ±3.3V Max.  Transient protection for each line according to IEC61000-4-2 (ESD): ±30kV (contact discharge) * = Month code (A~Z) IEC61000-4-5 (surge): 25A (8/20μs) Low capacitance: CJ = 1.5pF typ.  Low leakage current  Low clamping voltage  Solid state silicon technology Pin2 SA = Device code IEC61000-4-4 (EFT): 40A (5/50ns)  SA * Pin1 Marking (Top View) Order information Device Applications Package Shipping SPD91011W-2/TR SOD-323 3000/Tape&Reel  10/100/1000 Ethernet  STB  Router  Networking  Modem Will Semiconductor Ltd. 1 Revision 1.0, 2018/04/19 SPD91011W Absolute maximum ratings Parameter Symbol Rating Unit Peak pulse power (tp = 8/20μs) Ppk 350 W Peak pulse current (tp = 8/20μs) IPP 25 A ESD according to IEC61000-4-2 air discharge ±30 VESD ESD according to IEC61000-4-2 contact discharge Junction temperature TJ Operating temperature TOP Lead temperature TL Storage temperature kV ±30 TSTG 125 o -40~85 o 260 o -55~150 o C C C C Electrical characteristics (TA = 25 oC, unless otherwise noted) Parameter Symbol Reverse maximum working voltage VRWM Reverse leakage current Reverse breakdown voltage Clamping voltage 1) Dynamic resistance Clamping voltage Clamping voltage 1) 2) 3) Junction capacitance IR Condition IT = 1mA VCL IPP = 16A, tp = 100ns RDYN VCL CJ Typ. VRWM = 3.3V VBR VCL Min. VESD = 8kV Max. Unit ±3.3 V 100 nA 3.5 V 9.5 V 0.35 Ω 10.0 V IPP = 1A, tp = 8/20μs 6 V IPP = 10A, tp = 8/20μs 10 V IPP = 25A, tp = 8/20μs 16 V 2.0 pF VR = 0V, f = 1MHz 1.5 Notes: 1) TLP parameter: Z0 = 50Ω, tp = 100ns, tr = 2ns, averaging window from 60ns to 80ns. RDYN is calculated from 4A to 16A. 2) Contact discharge mode, according to IEC61000-4-2. 3) Non-repetitive current pulse, according to IEC61000-4-5. Will Semiconductor Ltd. 2 Revision 1.0, 2018/04/19 SPD91011W o Typical characteristics (TA = 25 C, unless otherwise noted) Current (%) Peak pulse current (%) Time to half-value: T2= 20s 50 T2 10 0 0 10 tr = 0.7~1ns Time (s) 8/20μs waveform per IEC61000-4-5 CJ - Junction capacitance (pF) VC - Clamping voltage (V) Pulse waveform: tp = 8/20μs 14 12 10 8 6 5 10 15 20 Time (ns) Contact discharge current waveform per IEC61000-4-2 16 0 t 60ns 30ns 20 T T1 4 100 90 Front time: T1= 1.25 T = 8s 100 90 25 2.1 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 f = 1MHz VAC = 50mV -3 -2 -1 0 1 2 IPP - Peak pulse current (A) VR - Reverse voltage (V) Clamping voltage vs. Peak pulse current Capacitance vs. Reverse voltage 3 10 1 % of Rated power Peak pulse power (kW) 100 0.1 0.01 1 10 100 Pulse time (s) 60 40 20 0 1000 0 25 50 75 100 125 150 o TA - Ambient temperature ( C) Non-repetitive peak pulse power vs. Pulse time Will Semiconductor Ltd. 80 Power derating vs. Ambient temperature 3 Revision 1.0, 2018/04/19 SPD91011W o Typical characteristics (TA=25 C, unless otherwise noted) 10V/div 10V/div TLP current (A) 20ns/div 20ns/div ESD clamping ESD clamping (+8kV contact discharge per IEC61000-4-2) (-8kV contact discharge per IEC61000-4-2) 20 16 12 8 4 0 -4 -8 -12 -16 -20 Z0 = 50 tr = 2ns tp = 100ns -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 TLP voltage (V) TLP Measurement Will Semiconductor Ltd. 4 Revision 1.0, 2018/04/19 SPD91011W PACKAGE OUTLINE DIMENSIONS SOD-323 D A2 A1 b E D1 A Side View L1 L c θ Top View Side View Dimensions in Millimeters Symbol Min. Typ. Max. A 0.800 - 1.100 A1 0.800 0.850 0.900 A2 0.000 - 0.100 b 0.250 - 0.400 c 0.080 - 0.177 D1 1.600 1.700 1.800 D 2.300 - 2.800 E 1.150 - 1.400 L 0.475 Ref. L1 0.100 - 0.500 θ 0° - 8° Recommended land pattern (Unit: mm) 0.80 1.40 Notes: 0.80 This recommended land pattern is for reference purposes only. Please consult your manufacturing group to ensure your PCB design guidelines are met. Will Semiconductor Ltd. 5 Revision 1.0, 2018/04/19 SPD91011W TAPE AND REEL INFORMATION RD Reel Dimensions W Tape Dimensions P1 Quadrant Assignments For PIN1 Orientation In Tape Q1 Q2 Q1 Q2 Q3 Q4 Q3 Q4 User Direction of Feed RD Reel Dimension 7inch 13inch W Overall width of the carrier tape 8mm 12mm 16mm P Pitch between successive cavity centers 2mm 4mm 8mm Pin1 Quadrant Q1 Q2 Q3 Pin1 Will Semiconductor Ltd. 6 Q4 Revision 1.0, 2018/04/19