NSi1306M25-DSWVR

NSi1306 High Reliability Reinforced Isolated Sigma-Delta Modulator Datasheet (EN) 1.6 Product Overview  Input common-mode overvoltage detection The NSI1306 is a high performance Σ-Δ modulator with output separated from input based on the NOVOSENSE capacitive isolation technology. The device has a linear differential input signal range of ±50mV (±64mV full-scale) or ±250mV (±320mV full-scale). The differential input is ideally suited to shunt resistor-based current sensing in high voltage applications where isolation is required. The analog input is amplified and continuously sampled by a second-order Σ-Δ modulator and converted to a high speed, single bit data stream. The output data is synchronous to the external clock with a frequency range from 5MHz to 21MHz. By using an appropriate digital filter (such as sinc3 filter) to decimate the bitstream, the device can achieve 16 bits resolution and an 86dB/82.5dB signal to noise ratio (SNR) at 78.125kSPS with a 20MHz master clock. The fail-safe functions including input common-mode overvoltage detection and missing AVDD detection simplify system-level design and diagnostics.  Operation Temperature: -40℃~125℃ Key Features  Automotive onboard chargers  Up to 5000VRMS Insulation Voltage Device Information  Clock frequency: 5MHz to 21MHz Part Number NSI1306x-DSWVR Package SOP8(300mil) Body Size 5.85mm × 7.50mm NSI1306x-DSWR SOP16(300mil) 10.30mm × 7.50mm  ±50mV or ±250mV Linear Input Voltage Range  Excellent DC Performance:  Offset Error: ±50μV or ±100μV (Max)  Offset Drift: -0.5~1.5μV/℃ (Max)  Gain Error: ±0.2% (Max)  Gain Drift: ±40ppm/℃ (Max)  RoHS-Compliant Packages:  SOP8(300mil)  SOP16(300mil) Safety Regulatory Approvals  UL recognition: up to 5000Vrms for 1 minute per UL1577  CQC certification per GB4943.1-2011  CSA component notice 5A approval IEC60950-1 standard  DIN VDE V 0884-11:2017-01 Applications  Shunt current monitoring  AC motor controls  Power and solar inverters  Uninterruptible Power Suppliers Functional Block Diagrams  SNR: 82.5dB or 86dB (Typ)  High CMTI: 150kV/μs (Typ)  System-Level Diagnostic Features:  AVDD monitoring Copyright © 2020, NOVOSENSE Figure 1. NSi1306 Block Diagram Page 1 NSi1306 Datasheet (EN) 1.6 INDEX 1. PIN CONFIGURATION AND FUNCTIONS.......................................................................................................................................3 2. ABSOLUTE MAXIMUM RATINGS.................................................................................................................................................. 5 3. RECOMMENDED OPERATING CONDITIONS.................................................................................................................................5 4. THERMAL INFORMATION............................................................................................................................................................. 5 5. SPECIFICATIONS............................................................................................................................................................................ 6 5.1. ELECTRICAL CHARACTERISTICS: NSI1306M05................................................................................................................................6 5.2. ELECTRICAL CHARACTERISTICS: NSI1306M25................................................................................................................................8 5.3. TYPICAL PERFORMANCE CHARACTERISTICS................................................................................................................................... 10 6. HIGH VOLTAGE FEATURE DESCRIPTION..................................................................................................................................... 14 6.1. INSULATION AND SAFETY RELATED SPECIFICATIONS........................................................................................................................ 14 6.2. INSULATION CHARACTERISTICS.................................................................................................................................................... 14 6.3. REGULATORY INFORMATION....................................................................................................................................................... 15 7. FUNCTION DESCRIPTION............................................................................................................................................................ 16 7.1. OVERVIEW...............................................................................................................................................................................16 7.2. ANALOG INPUT........................................................................................................................................................................ 16 7.3. DIGITAL INPUT..........................................................................................................................................................................16 7.4. DIGITAL OUTPUT...................................................................................................................................................................... 16 7.5. FAIL-SAFE OUTPUT....................................................................................................................................................................17 8. APPLICATION NOTE.....................................................................................................................................................................19 8.1. TYPICAL APPLICATION CIRCUIT....................................................................................................................................................19 8.2. SHUNT RESISTOR SELECTION.......................................................................................................................................................19 8.3. DIGITAL FILTER......................................................................................................................................................................... 19 8.4. PCB LAYOUT............................................................................................................................................................................20 9. PACKAGE INFORMATION............................................................................................................................................................ 21 10. ORDERING INFORMATION....................................................................................................................................................... 24 11. DOCUMENTATION SUPPORT.................................................................................................................................................... 24 12. TAPE AND REEL INFORMATION................................................................................................................................................25 13. REVISION HISTORY....................................................................................................................................................................27 Copyright © 2020, NOVOSENSE Page 2 NSi1306 Datasheet (EN) 1.6 1. Pin Configuration and Functions Figure 1.1 NSi1306 Package (SOP8(300mil)) Table 1.1 NSi1306 Pin Configuration and Description NSi1306 PIN NO. SYMBOL FUNCTION 1 AVDD Power supply for analog side (3.0V to 5.5V) 2 INP 3 INN Negative analog input 4 AGND Analog ground reference 5 DGND Digital ground reference 6 DOUT Modulator data output 7 CLKIN Modulator clock input: 5~21MHz 8 DVDD Power supply for digital side (3.0V to 5.5V) Copyright © 2020, NOVOSENSE Positive analog input (±250mV recommended for NSI1306M25 and ±50mV recommended for NSI1306M05) Page 3 NSi1306 Datasheet (EN) 1.6 Figure 1.2 NSi1306 Package (SOP16(300mil)) Table 1.2 NSi1306 Pin Configuration and Description NSi1306 PIN NO. SYMBOL FUNCTION 1 NC Internally connected to AVDD, this pin can be left floating or tied to AVDD 2 INP 3 INN Negative analog input 4 AGND/NC Not internally connected. This pin can be tied to AGND, or leave floating. 5 NC Not internally connected, this pin can be left floating or tied to AVDD, AGND 6 NC Not internally connected, this pin can be left floating or tied to AVDD, AGND 7 AVDD Power supply for analog side (3.0V to 5.5V) 8 AGND Analog ground reference 9 DGND Digital ground reference 10 NC Not internally connected, this pin can be left floating or tied to DVDD, DGND 11 DOUT Modulator data output 12 NC Not internally connected, this pin can be left floating or tied to DVDD, DGND 13 CLKIN Modulator clock input: 5~21MHz 14 DVDD Power supply for digital side (3.0V to 5.5V) 15 NC Not internally connected, this pin can be left floating or tied to DVDD, DGND 16 DGND Digital ground reference Copyright © 2020, NOVOSENSE Positive analog input (±250mV recommended for NSI1306M25 and ±50mV recommended for NSI1306M05) Page 4 NSi1306 Datasheet (EN) 1.6 2. Absolute Maximum Ratings Parameters Symbol Min Power Supply Voltage AVDD, DVDD -0.3 6.5 V Analog Input Voltage INP, INN AGND-6 AVDD+0.5 V Digital Input Voltage CLKIN DGND-0.5 DVDD+0.5 V Digital Output Voltage DOUT DGND-0.5 DVDD+0.5 V Io -10 10 mA TOPR -40 125 ℃ Junction Temperature TJ -40 150 ℃ Storage Temperature TSTG -55 150 ℃ HBM (1) ±2000 V CDM (2) ±1000 V Output current per Output Pin Operating Temperature Electrostatic discharge Typ Max Unit (1) Human body model (HBM), per AEC-Q100-002-RevD (2) Charged device model (CDM), per AEC-Q100-011-RevB 3. Recommended Operating Conditions Parameters Symbol Min Typ Max Analog Side Power Supply AVDD 3.0 5.0 5.5 V Digital Side Power Supply DVDD 3.0 3.3 5.5 V NSI1306M05 NSI1306M25 Unit Differential input voltage before clipping output VClipping Linear differential input full scale voltage VFSR -50 50 mV Operating common-mode input voltage VCM -0.032 0.8 V Differential input voltage before clipping output VClipping Linear differential input full scale voltage VFSR -250 250 mV Operating common-mode input voltage VCM -0.16 0.8 V TA -40 125 ℃ Operating Ambient Temperature ±64 mV ±320 mV 4. Thermal Information Parameters Junction–to-ambient thermal resistance Copyright © 2020, NOVOSENSE Symbol SOP8(300mil) SOP16(300mil) Unit RθJA 86 82 ℃/W Page 5 NSi1306 Datasheet (EN) 1.6 Parameters Symbol SOP8(300mil) SOP16(300mil) Unit Junction-to-case (top) thermal resistance RθJC(top) 28 42 ℃/W Junction-to-board thermal resistance RθJB 42 46 ℃/W Junction–to-top characterization parameter ΨJT 4 12 ℃/W Junction-to-board characterization parameter ΨJB 42 46 ℃/W 5. Specifications 5.1. Electrical Characteristics: NSI1306M05 (AVDD = 3.0V ~ 5.5V, DVDD = 3.0V ~ 5.5V, INP = -50mV to +50mV, and INN = AGND = 0V, TA = -40℃ to 125℃ and sinc3 filter with OSR=256. Unless otherwise noted, Typical values are at CLKIN=20MHz, AVDD = 5V, DVDD = 3.3V, TA = 25℃) Parameters Symbol Min Typ Max Unit Comments Analog Side Supply Voltage AVDD 3.0 5.0 5.5 V Digital Side Supply Voltage DVDD 3.0 3.3 5.5 V Analog Side Supply Current IAVDD 11.5 15 mA Digital Side Supply Current IDVDD 2 2.5 mA AVDD undervoltage detection threshold voltage AVDDUV 2 2.5 3 V AVDD falling VCMov 0.9 V Detection level has a typical hysteresis of 96 mV Power Supply Analog Input Common-mode overvoltage detection level CMRRdc -95 dB INP = INN, fIN = 0 Hz, VCM min ≤ VIN ≤ VCM max CMRRac -99 dB INP = INN, fIN = 10 kHz, VCM min ≤ VIN ≤ VCM max Single-ended input resistance RIN 4.75 kΩ INN = AGND Differential input resistance RIND 4.9 kΩ Input capacitance CI 2 pF Input bias current IIB Common-mode rejection ratio -24 Input bias current drift TCIIB Common-mode transient immunity CMTI 100 Differential nonlinearity DNL -0.99 Integral nonlinearity INL -4 -23 -20 µA ±2 nA/°C 150 kV/μs INP = INN = AGND, IIB = (IIBP + IIBN) / 2 Common-mode transient immunity DC Accuracy Copyright © 2020, NOVOSENSE ±1 0.99 LSB 4 LSB Page 6 NSi1306 Parameters Offset error Offset error thermal drift Gain error Gain error thermal drift Power supply rejection ratio Datasheet (EN) 1.6 Symbol Min Typ Max EO -50 ±2.5 50 µV TCEO -0.5 ±0.15 0.5 µV/°C EG -0.2% ±0.005% 0.2% TCEG -30 ±10 30 PSRR Unit Comments INP = INN = AGND ppm/° C -106 dB PSRR vs AVDD, at DC -104 dB PSRR vs AVDD, 100mV and 10kHz ripple AC Accuracy Signal to noise ratio Signal to noise and distortion SNR 78 82.5 dB fIN = 1kHz SINAD 77 82.5 dB fIN = 1kHz dB fIN = 1kHz dB fIN = 1kHz µA DGND ≤ VIN ≤ DVDD Total harmonic distortion THD -96 -84 Spurious-free dynamic range SFDR 86 Input current IIN 0 Input capacitance CIN 5 pF Output load capacitance CLOAD 30 pF High-level input voltage VIH 0.7×DVDD DVDD+0.3 V Low-level input voltage VIL -0.3 0.3×DVDD V High-level output voltage VOH Low-level output voltage VOL 100 Digital Input / Output 7 DVDD-0.1 V IOH = -20µA DVDD-0.4 V IOH = -4mA 0.1 V IOL = 20µA 0.4 V IOL = 4mA Timing CLKIN clock frequency fCLKIN 5 21 MHz CLKIN clock period tCLKIN 47.6 200 ns CLKIN clock high time tHIGH 20 25 120 ns CLKIN clock low time tLOW 20 25 120 ns DOUT rising time tr 5 ns CLOAD = 15pF DOUT falling time tf 5 ns CLOAD = 15pF DOUT hold time after rising edge of CLKIN tH ns CLOAD = 15pF Rising edge of CLKIN to DOUT valid delay tD ns CLOAD = 15pF Copyright © 2020, NOVOSENSE 3.5 15 Page 7 NSi1306 Parameters Analog setting time Datasheet (EN) 1.6 Symbol Min tAS Typ Max 0.5 Unit Comments ms AVDD step to 3.0 V with DVDD ≥ 3.0 V, to DOUT valid, 0.1% settling 5.2. Electrical Characteristics: NSI1306M25 (AVDD = 3.0V ~ 5.5V, DVDD = 3.0V ~ 5.5V, INP = -250mV to +250mV, and INN = AGND = 0V, TA = -40℃ to 125℃ and sinc3 filter with OSR=256. Unless otherwise noted, Typical values are at CLKIN=20MHz, AVDD = 5V, DVDD = 3.3V, TA = 25℃) Parameters Symbol Min Typ Max Unit Comments Analog Side Supply Voltage AVDD 3.0 5.0 5.5 V Digital Side Supply Voltage DVDD 3.0 3.3 5.5 V Analog Side Supply Current IAVDD 11.4 15.1 mA Digital Side Supply Current IDVDD 1.78 2.5 mA AVDD undervoltage detection threshold voltage AVDDUV 1.8 2.3 2.7 V AVDD falling VCMov 0.9 V Detection level has a typical hysteresis of 96 mV Power Supply Analog Input Common-mode overvoltage detection level CMRRdc -106 dB INP = INN, fIN = 0 Hz, VCM min ≤ VIN ≤ VCM max CMRRac -104 dB INP = INN, fIN = 10 kHz, VCM min ≤ VIN ≤ VCM max Single-ended input resistance RIN 19 kΩ INN = AGND Differential input resistance RIND 22 kΩ Input capacitance CI 2 pF Input bias current IIB Common-mode rejection ratio -24 Input bias current drift TCIIB Common-mode transient immunity CMTI 100 Differential nonlinearity DNL -0.99 Integral nonlinearity INL -4 Offset error EO -18 -12 µA ±1 nA/℃ 150 kV/μs INP = INN = AGND, IIB = (IIBP + IIBN) / 2 Common-mode transient immunity DC Accuracy Offset error thermal drift Gain error Gain error thermal drift Copyright © 2020, NOVOSENSE 0.99 LSB ±1 4 LSB -100 ±4.5 100 µV TCEO -0.5 ±0.15 1.5 µV/℃ EG -0.2% ±0.005% 0.2% TCEG -40 ±20 40 INP = INN = AGND ppm/ Page 8 NSi1306 Parameters Datasheet (EN) 1.6 Symbol Min Typ Max Unit Comments ℃ Power supply rejection ratio PSRR -100 dB PSRR vs AVDD, at DC -90 dB PSRR vs AVDD, 100mV and 10kHz ripple AC Accuracy Signal to noise ratio Signal to noise and distortion SNR 82 86 dB fIN = 1kHz SINAD 82 86 dB fIN = 1kHz dB fIN = 1kHz dB fIN = 1kHz µA DGND ≤ VIN ≤ DVDD Total harmonic distortion THD -95 -85 Spurious-free dynamic range SFDR 83 Input current IIN 0 Input capacitance CIN 5 pF Output load capacitance CLOAD 30 pF High-level input voltage VIH 0.7×DVDD DVDD+0.3 V Low-level input voltage VIL -0.3 0.3×DVDD V High-level output voltage VOH Low-level output voltage VOL 100 Digital Input / Output 7 DVDD-0.1 V IOH = -20µA DVDD-0.4 V IOH = -4mA 0.1 V IOL = 20µA 0.4 V IOL = 4mA Timing CLKIN clock frequency fCLKIN 5 21 MHz CLKIN clock period tCLKIN 47.6 200 ns CLKIN clock high time tHIGH 20 25 120 ns CLKIN clock low time tLOW 20 25 120 ns DOUT rising time tr 5 ns CLOAD = 15pF DOUT falling time tf 5 ns CLOAD = 15pF DOUT hold time after rising edge of CLKIN tH ns CLOAD = 15pF Rising edge of CLKIN to DOUT valid delay tD ns CLOAD = 15pF Analog setting time tAS ms AVDD step to 3.0 V with DVDD ≥ 3.0 V, to DOUT valid, 0.1% settling Copyright © 2020, NOVOSENSE 3.5 15 0.5 Page 9 NSi1306 Datasheet (EN) 1.6 5.3. Typical Performance Characteristics Unless otherwise noted, test at AVDD = 5V, DVDD = 3.3V, Vin = -250mV to 250mV (NSI1306M25) or -50mV to 50mV (NSI1306M05), CLKIN=20MHz, and sinc3 filter with OSR=256. Figure 5.1 Common-Mode Overvoltage Detection Level vs Temperature Figure 5.5 Input Offset Voltage vs Clock Frequency Figure 5.6 Gain Error vs Temperature Figure 5.2 Input Bias Current vs Temperature Figure 5.7 Gain Error vs Clock Frequency Figure 5.3 Common-Mode Rejection Ratio vs Temperature Figure 5.4 Input Offset Voltage vs Temperature Copyright © 2020, NOVOSENSE Figure 5.8 Signal-to-Noise Ratio vs Analog Side Supply Voltage Page 10 NSi1306 Datasheet (EN) 1.6 Figure 5.9 Signal-to-Noise Ratio vs Clock Frequency Figure 5.13 Total Harmonic Distortion vs Temperature Figure 5.10 Signal-to-Noise Ratio vs Temperature Figure 5.14 Signal-to-Noise + Distortion vs Analog Side Supply Voltage Figure 5.11 Total Harmonic Distortion vs Analog Side Supply Voltage Figure 5.12 Total Harmonic Distortion vs Clock Frequency Copyright © 2020, NOVOSENSE Figure 5.15 Signal-to-Noise + Distortion vs Clock Frequency Figure 5.16 Signal-to-Noise + Distortion vs Temperature Page 11 NSi1306 Figure 5.17 Spurious-Free Dynamic Range vs Analog Side Supply Voltage Figure 5.18 Spurious-Free Dynamic Range vs Clock Frequency Datasheet (EN) 1.6 Figure 5.21 Analog Side Supply Current vs Supply Voltage Figure 5.22 Analog Side Supply Current vs Clock Frequency Figure 5.19 Spurious-Free Dynamic Range vs Temperature Figure 5.23 Digital Side Supply Current vs Supply Voltage Figure 5.20 Analog Side Under-Voltage Detection Level vs Temperature Figure 5.24 Digital Side Supply Current vs Clock Frequency Copyright © 2020, NOVOSENSE Page 12 NSi1306 Figure 5.25 Supply Current vs Temperature Datasheet (EN) 1.6 Figure 5.27 Typical Integral Nonlinearity Figure 5.26 Typical Differential Nonlinearity Copyright © 2020, NOVOSENSE Page 13 NSi1306 Datasheet (EN) 1.6 6. High Voltage Feature Description 6.1. Insulation and Safety Related Specifications Parameters Symbol Value Unit Comments Minimum External Air Gap (Clearance) CLR 8 mm Shortest terminal-to-terminal distance through air Minimum External Tracking (Creepage) CPG 8 mm Shortest terminal-to-terminal distance across the package surface Minimum internal gap DTI 32 μm Distance through insulation Tracking Resistance (Comparative Tracking Index) CTI >600 V Material Group I DIN EN 60112 (VDE 0303-11); IEC 60112 IEC 60664-1 6.2. Insulation Characteristics Description Test Condition Symbol DIN VDE 0110 Value Unit SOW8 SOW16 For Rated Mains Voltage ≤ 150Vrms I to IV I to IV I to IV I to IV For Rated Mains Voltage ≤ 400Vrms I to IV I to IV 40/125/21 40/125/21 2 2 2121 2121 VPEAK 1500 1500 VRMS 2121 2121 VDC V pd (m) 3977 3977 VPEAK VIORM × 1.6 = Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC V pd (m) 3394 3394 VPEAK VIORM × 1.2= Vpd (m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC V pd (m) 2545 2545 VPEAK t = 60 sec VIOTM 8000 8000 VPEAK Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 300Vrms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum repetitive isolation voltage Maximum working isolation voltage Input to Output Test Voltage, Method B1 VIORM AC Voltage DC Voltage VIORM × 1.875 = Vpd (m), 100% production test, tini = tm = 1 sec, partial discharge < 5 pC VIOWM Input to Output Test Voltage, Method A After Environmental Tests Subgroup 1 After Input and /or Safety Test Subgroup 2 and Subgroup 3 Maximum transient isolation voltage Copyright © 2020, NOVOSENSE Page 14 NSi1306 Datasheet (EN) 1.6 Description Maximum Surge Isolation Voltage Isolation resistance Isolation capacitance Safety input, output, or total power Safety input, output, or supply current Test Condition Symbol Test method per IEC60065,1.2/50us waveform, VTEST=VIOSM × 1.6 VIOSM 6250 6250 VPEAK VIO =500V, Tamb=Ts RIO >109 >109 Ω VIO =500V, 100℃ ≤ Tamb ≤ 125℃ RIO >1011 >1011 Ω f = 1MHz CIO 0.8 0.8 pF VI = 5.5V, TJ = 150 ℃, TA = 25 ℃ Ps 1430 1524 mW θJA = 86℃/W for SOP8, VI = 5.5V, TJ = 150 ℃, TA = 25 ℃ Value 260 Unit / mA Is θJA = 82℃/W for SOP16, VI = 5.5V, TJ = 150 ℃, TA = 25 ℃ / 277 mA Ts 150 150 ℃ VISO 5000 5000 VRMS Maximum safety temperature UL1577 VTEST = VISO, t = 60 s (qualification), Insulation voltage per UL VTEST = 1.2 × VISO, t = 1 s (100% production test) Figure 6.1 NSi1306 Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN VDE V 0884-11 6.3. Regulatory Information The NSi1306 are approved or pending approval by the organizations listed in table. UL VDE CQC Certified by CQC11-4715432012 UL 1577 Component Recognition Program Approved under CSA Component Acceptance Notice 5A DIN VDE V 0884-11(VDE V 0884-11):2017-01 Single Protection, 5000Vrms Isolation voltage Single Protection, 5000Vrms Isolation voltage Reinforce Insulation 2121Vpeak, VIOSM=6250Vpeak Reinforced insulation Certificate No.E500602 Certificate No.E500602 for Certificate No.40052820 CQC20001264939 Copyright © 2020, NOVOSENSE GB4943.1-2011 Page 15 NSi1306 Datasheet (EN) 1.6 UL VDE CQC SOW8 package File pending for SOW16 package 7. Function Description 7.1. Overview The NSI1306 is a high performance isolated modulator that accept fully-differential input. The fully-differential input is ideally suited to shunt current monitoring in high voltage applications where isolation is required. The analog input is continuously sampled by a second-order Σ-Δ modulator in the device, which is driven by a pre-stage fully-differential amplifier in the device. With the internal voltage reference and clock generator, the modulator convert the analog input signal to a digital bitstream. The drivers (called TX in the Functional Block Diagram) transfer the output of the modulator across the isolation barrier that separate external clock, as shown in the Functional Block Diagram. Figure 7.1 Function Block Diagram 7.2. Analog Input There are two restrictions on the analog input signals (VINP and VINN).  If the input voltage exceeds the range AGND – 6 V to AVDD + 0.5 V, the input current must be limited to 10 mA because the device input electrostatic discharge (ESD) diodes turn on.  The linearity and noise performance of the device are ensured only when the analog input voltage remains within the specified linear full-scale range (FSR) and within the specified common-mode input voltage range. 7.3. Digital Input The digital input refers to clock signal which provides the clock for modulator conversion and output data frame clock. The clock signal should be supplied by an external source with a frequency range from 5MHz to 21MHz. 7.4. Digital Output The digital output provides a stream of ones and zeros that can accurately represents the analog input voltage. Within the linear input range, the density of ones in the bitstream is proportional to the input voltage. Ideally for a 0V input signal, the modulator outputs a bitstream with 50% high time. For a 250mV input signal (for the NSI1306M25), the modulator outputs a bitstream with 89.06% high time. For a -250mV input signal (for the NSI1306M25), the modulator outputs a bitstream with 10.94% high time. If the input signal is greater than or equal to 320mV (64 mV for the NSI1306x05), the modulator clips with a steam of all ones. If the input signal is less than or equal to -320mV (–64 mV for the NSI1306x05), the output of the modulator clips with a stream of all zeros. In this case, however, the NSI1306 generates a single 0 (if the input is at positive full-scale) or 1 every 128 clock cycles to indicate proper device function (see section7.5 for more details). Due to quantization noise of internal Σ-Δ modulator, the digital output frequency is not fixed, but the density of high time is fixed as below. Copyright © 2020, NOVOSENSE Page 16 NSi1306 Datasheet (EN) 1.6 Table 8.1 Input voltage with ideal corresponding density of high time at modulator data output, and ADC code Analog input Input voltage Density of high time Digital output code(16-bit unsigned decimation) +Differential input voltage before clipping output +320mV 99.22% 65024 (+64mV for NSI1306x05) +Linear differential input full scale voltage 89.06% 58366 (+50mV for NSI1306x05) Zero 0mV 50% 32768 +250mV Ideal density of 1s in the output bitstream for any input voltage(except for full-scale input, as described in section7.5 ) at modulator data output can be calculated with: VIN  VCLIPPING 2  VCLIPPING Similarly, the ADC code can be calculated, assuming a 16-bit unsigned decimation filter. 7.5. Fail-safe Output NSI1306 integrates some diagnostic measures and offers a fail-safe output to simplify system-level design. The fail-safe function will be activated in following conditions:  When the undervoltage of AVDD is detected (AVDD< AVDDUV), DOUT pin output a bitstream of all logic zeros, as shown in Figure 7.2.  When the overvoltage of common-mode input voltage is detected (VCM>VCMov), DOUT pin output a bitstream of all logic ones, as shown in Figure 7.2. NOTE: If both of the faults above occur at the same time, DOUT pin output a bitstream of all logic zeros. (AVDD missing has a higher priority). Figure 7.2 Fail-safe output If an overrange input signal is applied to the NSI1306 (VIN ≥ VClipping), the output generates a single 0 or 1 every 128 clock cycles, as shown in Figure 7.3. Copyright © 2020, NOVOSENSE Page 17 NSi1306 Datasheet (EN) 1.6 Figure 7.3 Overrange output Copyright © 2020, NOVOSENSE Page 18 NSi1306 Datasheet (EN) 1.6 8. Application Note 8.1. Typical Application Circuit NSI1306 is ideally suited to shunt resistor-based current sensing in high voltage applications such as frequency inverters. The typical application circuit is shown in Figure 8.1. The voltage across the shunt resistor Rsense is applied to the differential input of NSI1306 through a RC filter. The internal secondorder sigma-delta modulator converts the analog input to a single-bit output stream. The external digital system provides a clock source for the modulator and a digital filter for decimation and quantization noise filtering. Figure 8.1 Typical application circuit in phase current sensing 8.2. Shunt Resistor Selection Choosing a particular shunt resistor is usually a compromise between minimizing power dissipation and maximizing accuracy. Smaller sense resistor decreases power dissipation, while larger sense resistor can improve measure accuracy by utilizing the full input range of isolated amplifier. There are two other factors should be considered when selecting the shunt resistor:  The voltage-drop caused by the rated current range must not exceed the recommended linear input voltage range: VSHUNT ≤ FSR.  The voltage-drop caused by the maximum allowed overcurrent must not exceed the input voltage that causes a clipping output: VSHUNT ≤ VClipping. 8.3. Digital Filter The Σ-Δ modulator a characteristics of noise shaping. Most of the quantization noise is pushed from a low frequency to a higher frequency. In order to reduce higher-frequency quantization noise, the modulator output is fed to the digital low-pass filter. Subsequently, the signal of interest passes through to the output of the digital filter, while much of the higher-frequency quantization noise is filtered out. The digital filter serves another function – decimation. It creates a digital output code from the bitstream that the modulator outputs. The ratio of the modulator rate (fMOD) of the delta-sigma modulator to its output data rate (fDR) is the oversampling ratio (OSR). The relationship between fDR and fMOD is: fDR = fMOD / OSR Equation 8.1 A sinc3 filter is recommended since it’s simple and requires less hardware resources. Equation 8.2 describes the transfer function of a sinc filter. Equation 8.2 where: DR is the decimation rate; Copyright © 2020, NOVOSENSE Page 19 NSi1306 Datasheet (EN) 1.6 N is the sinc filter order. The filter can be implemented in an FPGA or DSP. The sinc filter creates a digital output code by taking a multi-order moving average of the modulator output over a certain number of modulator clock periods. The higher the decimation rate, the higher the conversion accuracy, and the lower the output data rate. So, there is a trade-off between accuracy and data rate. All the characterization in this datasheet is tested with a sinc3 filter with an oversampling ratio (OSR) of 256. The output data size is expressed in Equation 8.3. The 16 most significant bits are used to return a 16-bit result. 蠀╮蠀 esu Equation 8.3 log The filter characteristics for a third-order sinc filter are summarized in Table 8.2. Table 8.2 Sinc3 Filter Characteristics for 20 MHz CLKIN Decimation Rate (DR) Data Output Rate (kHz) Data Size (bits) Filter Response (kHz) 32 625 15 163.7 64 312.5 18 81.8 128 156.2 21 40.9 256 78.1 24 20.4 512 39.1 27 10.2 8.4. PCB Layout There are some key guidelines or considerations for optimizing performance in PCB layout:  NSI1306 requires a 0.1µF bypass capacitor between AVDD and AGND, DVDD and DGND. The capacitor should be placed as close as possible to the VDD pin. If better filtering is required, an additional 1~10µF capacitor may be used.  Kelvin rules is recommended for the connection between shunt resistor to NSI1306. Because of the Kelvin connection, any voltage drops across the trace and leads should have no impact on the measured voltage.  Place the shunt resistor close to the INP and INN inputs and keep the layout of both connections symmetrical and run very close to each other to the input of the NSI1306. This minimizes the loop area of the connection and reduces the possibility of stray magnetic fields from interfering with the measured signal. Copyright © 2020, NOVOSENSE Page 20 NSi1306 Datasheet (EN) 1.6 9. Package Information Figure 9.1 SOW8 Package Shape and Dimension in millimeters Copyright © 2020, NOVOSENSE Page 21 NSi1306 Datasheet (EN) 1.6 Figure 9.2 SOW8 Package Board Layout Example Copyright © 2020, NOVOSENSE Page 22 NSi1306 Datasheet (EN) 1.6 Figure 9.3 SOW16 package shape and dimension in millimeters Figure 9.4 SOW16 Package Board Layout Example Copyright © 2020, NOVOSENSE Page 23 NSi1306 Datasheet (EN) 1.6 10. Ordering Information Part No. NSI1306M05 -DSWVR NSI1306M25 -DSWVR NSI1306M05 -DSWR NSI1306M25 -DSWR NSI1306M05 -Q1SWVR NSI1306M25 -Q1SWVR NSI1306M05 -Q1SWR NSI1306M25 -Q1SWR Isolation Rating(kV) Linear Input Range(mV) Moisture Sensitivity Level Temperature Automotive 5 -50 ~ 50 Level-3 -40 to 125℃ NO 5 -250 ~ 250 Level-3 -40 to 125℃ NO 5 -50 ~ 50 Level-2 -40 to 125℃ NO 5 -250 ~ 250 Level-2 -40 to 125℃ NO 5 -50 ~ 50 Level-3 -40 to 125℃ Yes 5 -250 ~ 250 Level-3 -40 to 125℃ Yes 5 -50 ~ 50 Level-2 -40 to 125℃ Yes 5 -250 ~ 250 Level-2 -40 to 125℃ Yes Package Type SOP8 (300mil) SOP8 (300mil) SOP16 (300mil) SOP16 (300mil) SOP8 (300mil) SOP8 (300mil) SOP16 (300mil) SOP16 (300mil) Package Drawing SPQ SOW8 1000 SOW8 1000 SOW16 1000 SOW16 1000 SOW8 1000 SOW8 1000 SOW16 1000 SOW16 1000 11. Documentation Support Part Number Product Folder Datasheet Technical Documents Isolator selection guide NSi1306 Click here Click here Click here Click here Copyright © 2020, NOVOSENSE Page 24 NSi1306 Datasheet (EN) 1.6 12. Tape and Reel Information Figure 12.1 Tape Information Copyright © 2020, NOVOSENSE Page 25 NSi1306 Datasheet (EN) 1.6 Figure 12.2 Reel Information of SOP8(300mil) Copyright © 2020, NOVOSENSE Page 26 NSi1306 Datasheet (EN) 1.6 Figure 12.3 Reel Information of SOP16(300mil) 13. Revision History Revision 1.0 1.1 1.2 1.3 1.4 1.5 1.6 Description Initial Release Update VDE Certificate number in 6.3, tape and reel information, and typical application circuit in 8.1 Update moisture sensitivity level of NSI1306M05/25 -DSWR Update NSI1306M05 electrical characteristics, add VIH and VIL spec Update description in 7.1 , add SOW8 and SOW16 package layout example Update insulation information in 6.1 and 6.2 Update pin 4 description of NSi1306-DSWR in Figure and table 1.2 Update reel information of SOP16 in Figure 12.3 and add digital output description in 7.3 Copyright © 2020, NOVOSENSE Date 2020/8/29 2020/12/28 2021/6/9 2021/7/8 2021/7/17 2021/9/14 2022/3/10 Page 27