ME50P06-G

* ME50P06/ME50P06-G P- Channel 60-V (D-S) MOSFET GENERAL DESCRIPTION FEATURES The ME50P06 is the P-Channel logic enhancement mode power field ● RDS(ON)≦17mΩ@VGS=-10V effect transistors are produced using high cell density, DMOS trench ● RDS(ON)≦20mΩ@VGS=-4.5V technology. This high density process is especially tailored to ● Super high density cell design for extremely low R DS(ON) minimize on-state resistance. These devices are particularly suited ● Exceptional on-resistance and maximum DC current for low voltage application such as cellular phone and notebook capability computer power management and other battery powered circuits , APPLICATIONS and low in-line power loss are needed in a very small outline surface ● Power Management in Note book ● DC/DC Converter mount package. PIN ● Load Switch ● LCD Display inverter CONFIGURATION (TO-252-3L) Top View The Ordering Information: ME50P06 (Pb-free) ME50P06-G (Green product-Halogen free ) Absolute Maximum Ratings (TC=25℃ Unless Otherwise Noted) Symbol Maximum Ratings Unit Drain-Source Voltage VDS -60 V Gate-Source Voltage VGS ±20 V Parameter TC=25℃ Continuous Drain Current* TC=70℃ Pulsed Drain Current ID IDM TC=25℃ Maximum Power Dissipation* TC=70℃ Operating Junction Temperature Thermal Resistance-Junction to Case* PD -61 -49 -244 114 73 A A W TJ -55 to 150 ℃ RθJC 1.1 ℃/W *The device mounted on 1in2 FR4 board with 2 oz copper DCC 正式發行 Dec, 2015-Ver1.2 01 ME50P06/ME50P06-G P- Channel 60-V (D-S) MOSFET Electrical Characteristics (TC =25℃ Unless Otherwise Specified) Symbol Parameter Limit Min Typ Max Unit STATIC V(BR)DSS Drain-Source Breakdown Voltage VGS=0V, ID=-250μA -60 VGS(th) Gate Threshold Voltage VDS=VGS, ID=-250μA -1 IGSS Gate Leakage Current IDSS Zero Gate Voltage Drain Current RDS(ON) Drain-Source On-State Resistance V -3 V VDS=0V, VGS=±20V ±100 nA VDS=-60V, VGS=0V -1 μA VGS=-10V, ID= -17A 14 17 VGS=-4.5V, ID= -14A 16 20 Diode Forward Voltage IS=-17A, VGS=0V -0.9 -1.2 Qg Total Gate Charge(10V) VDS=-30V, VGS=-10V, ID=-50A 94 Qg Total Gate Charge(4.5V) Qgs Gate-Source Charge Qgd Gate-Drain Charge Ciss Input capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance 336 td(on) Turn-On Delay Time 53 tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time VSD a mΩ V DYNAMIC 46 nC VDS=-30V, VGS=-4.5V, ID=-50A 18 24 4707 VDS=-15V, VGS=0V, F=1MHz VDS=-30V, RL =30Ω VGEN=-10V, RG=6Ω 373 pF 19 ns 221 61 Notes: a. Pulse test: pulse width≦ 300us, duty cycle≦ 2%, Guaranteed by design, not subject to production testing. b. Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice. DCC 正式發行 Dec, 2015-Ver1.2 02 ME50P06/ME50P06-G P- Channel 60-V (D-S) MOSFET Typical Characteristics (TJ =25℃ Noted) DCC 正式發行 Dec, 2015-Ver1.2 03 ME50P06/ME50P06-G P- Channel 60-V (D-S) MOSFET Typical Characteristics (TJ =25℃ Noted) DCC 正式發行 Dec, 2015-Ver1.2 04 ME50P06/ME50P06-G P- Channel 60-V (D-S) MOSFET TO252-3L Package Outline TO-252 Package Outline SYMBOL MIN MAX A 2.10 2.50 B 0.40 0.90 C 0.40 0.90 D 5.30 6.30 D1 2.20 2.90 E 6.30 6.75 E1 4.80 5.50 L1 0.90 1.80 L2 0.50 1.10 L3 0.00 0.20 H 8.90 10.40 P 2.30 BSC DCC 正式發行 Dec, 2015-Ver1.2 05