SLM2005SCA-13GTR

SLM2005S 200V Half Bridge Driver PRODUCT SUMMARY • • • • • VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) FEATURES 200 V max. 130 mA/270 mA 10 V - 20 V 220 ns/200 ns none • Floating channel designed for bootstrap operation Fully operational to +200 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels 3.3 V, 5 V, and 15 V logic compatible Matched propagation delay for both channels • • Logic and power ground +/- 5 V offset Lower di/dt gate driver for better noise immunity • • • RoHS compliant SOIC-8 and PDIP-8 package • • • • • • GENERAL DESCRIPTION The SLM2005S is a high voltage, high speed power MOSFET and IGBT drivers with dependent highand low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 200 V. Outputs in phase with inputs TYPICAL APPLICATION CIRCUIT up to 200V VCC VCC VB HIN HIN HO LIN LIN VS COM LO to load SLM2005S (Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. Typical Application Circuit Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 1 SLM2005S PIN CONFIGURATION Package Pin Configuration (Top View) SOIC-8 1 VCC VB 8 2 HIN HO 7 3 LIN VS 6 4 COM LO 5 and PDIP-8 PIN DESCRIPTION No. Pin Description 1 VCC Low-side and logic fixed supply 2 HIN Logic input for high-side gate driver output (HO), in phase 3 LIN Logic input for low-side gate driver output (LO), in phase 4 COM Low-side return 5 LO Low-side gate drive output 6 VS High-side floating supply return 7 HO High-side gate drive output 8 VB High-side floating supply ORDERING INFORMATION Industrial Range: -40°C to +125°C Order Part No. Package QTY SLM2005SCA-13GTR SLM2005SCA-GT SLM2005SDA-GT SOIC8, Pb-Free SOIC8, Pb-Free PDIP8, Pb-Free 2500/Reel 100/Tube 100/Tube Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 2 SLM2005S FUNCTIONAL BLOCK DIAGRAM VB VBS UVLO Pulse Filter HIN Pulse Gen VCC UVLO R R S Q HO VS VCC Shoot-Through Prevention LO LIN COM Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 3 SLM2005S ABSOLUTE MAXIMUM RATINGS Symbol Definition VB High-side floating absolute voltage VS High-side floating supply offset voltage VHO High-side floating output voltage VCC Low-side and logic fixed supply voltage VLO Low-side output voltage VIN Logic input voltage (HIN & LIN ) dVS/dt Allowable offset supply voltage transient PDIP-8 PD Package power dissipation @ TA ≤ +25°C SOIC-8 PDIP-8 RthJA Thermal resistance, junction to ambient SOIC-8 TJ Junction temperature TS Storage temperature TL Lead temperature (soldering, 10 seconds) Min. -0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 -------------55 --- RECOMMENDED OPERATIONG CONDITIONS Symbol Definition VB High-side floating absolute voltage VS High-side floating supply offset voltage VHO High-side floating output voltage VCC Low-side and logic fixed supply voltage VLO Low-side output voltage VIN Logic input voltage TA Ambient temperature Min. VS + 10 Note 1 VS 10 0 VSS - 40 Max. 225 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 50 1.0 0.625 125 200 150 150 300 Units V V/ns W °C/W °C Note: Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Max. VS + 20 200 VB 20 VCC VCC 125 Units V °C Note: The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 4 SLM2005S DYNAMIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. ton Turn-on propagation delay VS = 0 V --- 220 300 toff Turn-off propagation delay VS = 0 V or 200 V --- 200 280 tr Turn-on rise time --- 100 220 tf Turn-off fall time --- 35 80 --- 0 30 MT VS = 0 V Delay matching, HS & LS turn-on/off Unit ns STATIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V and TA = 25°C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Parameter Condition Min. Typ. Max. 2.5 --- --- --- --- 0.8 --- 0.05 0.2 --- 0.02 0.1 --- --- 50 20 75 130 60 120 180 VIH Logic “1” input voltage VIL Logic “0” input voltage VOH High level output voltage, VBIAS - VO VOL Low level output voltage, VO ILK Offset supply leakage current IQBS Quiescent VBS supply current IQCC Quiescent VCC supply current IIN+ Logic “1” input bias current VIN = 5 V --- 5 20 IIN- Logic “0” input bias current VIN = 0 V --- --- 5 8．0 8.9 9.8 7.4 8.2 9.0 VCCUV+ VBSUV+ VCCUVVBSUV- VCC and VBS supply positive going threshold VCC and VBS supply negative going threshold VCC = 10 V to 20V IO = 2 mA VB = VS = 200 V VIN = 0 V or 5 V undervoltage undervoltage IO+ Output high short circuit pulsed current VO = 0 V, PW ≤ 10 µs 130 290 IO- Output low short circuit pulsed current VO = 15 V, PW ≤ 10 µs 270 600 Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 Unit V µA V mA 5 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 6 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 7 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 8 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 9 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 10 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 11 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 12 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 13 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 14 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 15 SLM2005S PACKAGE CASE OUTLINES Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 16 SLM2005S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 17 SLM2005S Revision History Note: page numbers for previous revisions may differ from page numbers in current version Page or Item Subjects (major changes since previous revision) Rev 1.0 datasheet, 2019-8-29 Whole document new company logo released Page 1 Remove “Fig 1. ” Rev 1.1 datasheet, 2019-10-21 Page 1 Change “high side and low side driver” to “half bridge driver” Page 1 Change “independent” to “dependent” Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev1.1, Oct, 2019 18