HEF4015BT,652

HEF4015B Dual 4-bit static shift register Rev. 9 — 21 March 2016 Product data sheet 1. General description The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input (MR). Information present on D is shifted to the first register position, and all the data in the register is shifted one position to the right on the LOW-to-HIGH transition of CP. A HIGH on MR clears the register and forces Q0 to Q3 to LOW, independent of CP and D. The clock input’s Schmitt trigger action makes the input highly tolerant of slower clock rise and fall times. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits       Tolerant of slow clock rise and fall times Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C. Complies with JEDEC standard JESD 13-B 3. Applications  Serial-to-parallel converter  Buffer stores  General purpose register 4. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C. Type number HEF4015BT Package Name Description Version SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4015B Nexperia Dual 4-bit static shift register 5. Functional diagram 4   '  &3 6+,)7 5(*,67(5 %,76 4  4  4   05 4   '  &3 6+,)7 5(*,67(5 %,76 4  4  4   05 DDH Fig 1. Functional diagram 4 ' ' 4 ))  &3 &' 4 ' 4 )) &3 &' 4 ' 4 4 ' 4 )) )) &3 &' &3 &' &3 05 DDH Fig 2. Logic diagram for one register HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 2 of 14 HEF4015B Nexperia Dual 4-bit static shift register 6. Pinning information 6.1 Pinning +()% &3   9'' 4   ' 4   05 4   4 4   4 05   4 '   4 966   &3 DDH Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin Description 1Q0 to 1Q3 5, 4, 3, 10 parallel output 2Q0 to 2Q3 13, 12, 11, 2 parallel output 1MR, 2MR 6, 14 master reset input (active HIGH) 1D, 2D 7, 15 serial data input VSS 8 ground supply voltage 1CP, 2CP 9, 1 clock input (LOW-to-HIGH edge-triggered) VDD 16 supply voltage 7. Functional description Table 3. Function table [1] number of clock pulse transitions Input 1  D1 L D1 X X X 2  D2 L D2 D1 X X 3  D3 L D3 D2 D1 X 4  D4 L D4 D3 D2 D1 [1] CP Output D MR Q0 Q1 Q2 Q3  X L no change no change no change no change X X H L L L L H = HIGH voltage level; L = LOW voltage level; X = don’t care; Dn = either HIGH or LOW;  = positive-going transition; = negative-going transition. HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 3 of 14 HEF4015B Nexperia Dual 4-bit static shift register 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O input/output current IDD supply current Tstg storage temperature Tamb ambient temperature 40 Ptot total power dissipation [1] Max Unit 0.5 +18 V mA VI < 0.5 V or VI > VDD + 0.5 V - 10 0.5 VDD + 0.5 - 10 mA - 10 mA - 50 mA 65 +150 C +85 C VO < 0.5 V or VO > VDD + 0.5 V V Tamb = 40 C to +85 C SO16 package P Min power dissipation [1] per output - 500 mW - 100 mW For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VDD VI Conditions Min Typ Max Unit supply voltage 3 - 15 V input voltage 0 - VDD V Tamb ambient temperature in free air 40 - +85 C t/V input transition rise and fall rate VDD = 5 V - - 3.75 s/V VDD = 10 V - - 0.5 s/V VDD = 15 V - - 0.08 s/V HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 4 of 14 HEF4015B Nexperia Dual 4-bit static shift register 10. Static characteristics Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter Conditions VDD Tamb = 40 C Min VIH VIL VOH VOL IOH IOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage HIGH-level output current LOW-level output current II input leakage current IDD supply current CI input capacitance HEF4015B Product data sheet IO < 1 A Max Tamb = 25 C Tamb = 85 C Min Min Max Unit Max 5V 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 V VO = 2.5 V 5V - 1.7 - 1.4 - 1.1 mA VO = 4.6 V 5V - 0.52 - 0.44 - 0.36 mA VO = 9.5 V 10 V - 1.3 - 1.1 - 0.9 mA VO = 13.5 V 15 V - 3.6 - 3.0 - 2.4 mA IO < 1 A IO < 1 A IO < 1 A VO = 0.4 V 5V 0.52 - 0.44 - 0.36 - mA VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA 15 V - 0.3 - 0.3 - 1.0 A IO = 0 A 5V - 20 - 20 - 150 A 10 V - 40 - 40 - 300 A 15 V - 80 - 80 - 600 A - - - - 7.5 - - pF All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 5 of 14 HEF4015B Nexperia Dual 4-bit static shift register 11. Dynamic characteristics Table 7. Dynamic characteristics VSS = 0 V; CL = 50 pF; Tamb = 25 C. Symbol Parameter Conditions VDD Extrapolation formula[1] Min Typ Max Unit tPHL HIGH to LOW propagation delay nCP to Qn; see Figure 4 5V 103 ns + (0.55 ns/pF)CL - 130 260 ns 10 V 44 ns + (0.23 ns/pF)CL - 55 110 ns 15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns 5V 78 ns + (0.55 ns/pF)CL - 105 210 ns 10 V 34 ns + (0.23 ns/pF)CL - 45 90 ns 15 V 27 ns + (0.16 ns/pF)CL - 35 70 ns 5V 93 ns + (0.55 ns/pF)CL - 120 240 ns 10 V 44 ns + (0.23 ns/pF)CL - 55 110 ns 15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns nMR to Qn; see Figure 6 LOW to HIGH propagation delay tPLH transition time tt set-up time tsu hold time th pulse width tW recovery time trec maximum frequency fmax [1] nCP to Qn see Figure 4 see Figure 4 nD to nCP; see Figure 5 nD to nCP; see Figure 5 5V 10 ns + (1.00 ns/pF)CL - 60 120 ns 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns 15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns +25 15 - ns 5V 10 V +25 10 - ns 15 V +20 5 - ns 5V 40 20 - ns 10 V 20 10 - ns 15 V 15 8 - ns nCP LOW; minimum width; see Figure 5 5V 60 30 - ns 10 V 30 15 - ns 15 V 20 10 - ns nMR HIGH; minimum width; see Figure 6 5V 80 40 - ns 10 V 30 15 - ns 15 V 24 12 - ns pin nMR; see Figure 6 5V 50 20 - ns 10 V 30 10 - ns 15 V 20 5 - ns 5V 7 15 - MHz 10 V 15 30 - MHz 15 V 22 44 - MHz see Figure 5 The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 6 of 14 HEF4015B Nexperia Dual 4-bit static shift register Table 8. Dynamic power dissipation PD PD can be calculated from the formulas shown. VSS = 0 V; tr = tf  20 ns; Tamb = 25 C. Symbol PD Parameter dynamic power dissipation VDD Typical formula for PD (W) where: 5V PD = 1500  fi + (fo  CL)  VDD 10 V PD = 6300  fi + (fo  CL)  VDD2 fo = output frequency in MHz; 15 V PD = 17000  fi + (fo  CL)  CL = output load capacitance in pF; 2 fi = input frequency in MHz; VDD2 VDD = supply voltage in V; (CL  fo) = sum of the outputs. 12. Waveforms 9, 90 Q&3LQSXW 966 W3+/ 92+ W3/+  90  Q4QRXWSXW 92/ WW WW DDM Measurement points are given in Table 9. Fig 4. Waveforms showing nCP propagation delays and nQn transition times W: 9, Q&3LQSXW 90 966 WK 9, Q'LQSXW 90 90 90 IPD[ 90 WK 90 90 966 WVX WVX DDH The shaded area indicates where the input is permitted to change for predictable output performance. Set-up and hold times are shown as positive values but may be specified as negative values; Measurement points are given in Table 9. Fig 5. Waveforms showing set-up times, hold times, and minimum clock pulse width HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 7 of 14 HEF4015B Nexperia Dual 4-bit static shift register 9, 90 Q05LQSXW 966 90 W: 9, WUHF Q&3LQSXW 90 966 W3+/ 92+ Q4QRXWSXW 90 92/ DDH Measurement points are given in Table 9. Fig 6. Waveforms showing MR recovery time, propagation delay and minimum pulse width Table 9. Measurement points Supply voltage Input Output VDD VM VM 5 V to 15 V 0.5VDD 0.5VDD HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 8 of 14 HEF4015B Nexperia Dual 4-bit static shift register W: 9,   QHJDWLYH SXOVH 90 90  9 9,  WI WU WU WI  SRVLWLYH SXOVH  90 90  9  W: DDM a. Input waveforms 9'' * 9, 92 '87 &/ 57 DDJ b. Test circuit Test data is given in Table 10. Definitions for test circuit: DUT = Device Under Test; CL = load capacitance including jig and probe capacitance; RT = termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 7. Test circuit for measuring switching times Table 10. Test data Supply voltage Input VDD VI tr, tf CL 5 V to 15 V VSS or VDD  20 ns 50 pF HEF4015B Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 9 of 14 HEF4015B Nexperia Dual 4-bit static shift register 13. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ =   4 $ $ $  $ SLQLQGH[ ș /S  /  H Z 0 ES   GHWDLO; PP VFDOH ',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP                                                 LQFKHV         ș R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG Fig 8. 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7(   Package outline SOT109-1 (SO16) HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 10 of 14 HEF4015B Nexperia Dual 4-bit static shift register 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4015B v.9 20160321 Product data sheet - HEF4015B v.8 Modifications: HEF4015B v.8 Modifications: • Type number HEF4015BP (SOT38-4) removed. 20111121 • • Product data sheet - HEF4015B v.7 Legal pages updated. Changes in “General description” and “Features and benefits”. HEF4015B v.7 20110914 Product data sheet - HEF4015B v.6 HEF4015B v.6 20091103 Product data sheet - HEF4015B v.5 HEF4015B v.5 20090624 Product data sheet - HEF4015B v.4 HEF4015B v.4 20090127 Product data sheet - HEF4015B_CNV v.3 HEF4015B_CNV v.3 19950101 Product specification - HEF4015B_CNV v.2 HEF4015B_CNV v.2 19950101 Product specification - - HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 11 of 14 HEF4015B Nexperia Dual 4-bit static shift register 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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HEF4015B Product data sheet Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 12 of 14 HEF4015B Nexperia Dual 4-bit static shift register Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com HEF4015B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 21 March 2016 © Nexperia B.V. 2017. All rights reserved 13 of 14 Nexperia HEF4015B Dual 4-bit static shift register 17. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 © General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 21 March 2016