SIT9002AC-182N33SD125.00000Y 数据手册
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Features
Benefits
• World’s first differential spread spectrum oscillator
• Extremely low cycle-cycle jitter
• As low as10 ps (typical)
• Wide frequency range
• Services most PC peripherals, networking, and consumer
applications
• Provides wide range of spread percentage for maximum
electromagnetic interference (EMI) reduction
• Up to -17 dB reduction on third homonic and -12dB on the
fundamental
• 1 MHz to 220 MHz
• 220 MHz to 800 MHz (contact SiTime)
• Eight spread selections (31.5 KHz modulation rate)
• Fast time to market due to not needing to redesign the PCB
for EMI reduction
• Center Spread: ±0.25%, ±0.5%, ±1.0%, ±2.0%
• Factory programmable for ultra-fast lead time
• Down Spread: -0.5%, -1.0%, -2.0%, -4.0%
• No crystal or load capacitors required
• For -0.25% and ±0.125% contact SiTime
• Eliminates crystal qualification time
• Low frequency stability (Spread = OFF)
• ±25 ppm or ±50 ppm
• Operating voltage
• 50%+ board saving space
• Completely quartz-free
Applications
• 1.8V or 2.5 or 3.3 V
• Operating temperature range:
• PCI-Express
• Industrial, -40°C to 85°C
• USB 3.0
• Extended Commercial, -20°C to 70°C
• Fully Buffered DIMM
• Blade Server
• Small footprint
• Router
• 5.0 x 3.2 x 0.75 mm
• 7.0 x 5.0 x 0.90 mm
• Pb-free and RoHS compliant
• System Clock
• Ultra-reliable start up and greater immunity from interference
• Automotive
• Networking and Computing
• Industrial
Block Diagram
SiTime Corporation
Rev. 1.11
Pinout
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised September 27, 2016
SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Pin Description
Pin No.
Name
Pin Description
1
ST/OE/SD
Input
Standby or Output Enable pin for OUT+ and OUT-.
OE:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance state
ST:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = Output is low (weak pull down), oscillation stops
SD: Spread Disable - disables spread spectrum
When High or Open : Spread Spectrum modulation = active
When Low : Spread Spectrum modulation = Off
2
NC
NA
No connect pin, leave it floating.
3
GND
Power
VDD power supply ground. Connect to ground
4
OUT+
Output
1 to 220 MHz programmable clock output. For frequencies > 220 MHz contact SiTime
5
OUT-
Output
6
VDD
Power
Power supply
Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual
performance of the IC is only guaranteed within the operational specifications, not absolute maximum ratings.
Absolute Maximum Table
Parameter
Min.
Max.
Unit
Storage Temperature
-65
150
°C
VDD
-0.5
4
V
GND - 0.5
VDD + 0.5
V
Theta JA ( with copper plane on VDD and GND) 5.0 x 3.2 package
7.0 x 5.0 package when center pad is soldered down
7.0 x 5.0 package when center pad is not soldered down
Vin
–
68
°C/W
–
38
°C/W
–
90
°C/W
Theta JC (with PCB traces of 0.010 inch to all pins) 5.0 x 3.2 package
7.0 x 5.0 package when center pad is soldered down
7.0 x 5.0 package when center pad is not soldered down
–
45
°C/W
–
35
°C/W
–
48
°C/W
Soldering Temperature (follow standard Pb free soldering guidelines)
–
260
°C
Number of Program Writes
–
1
NA
Program Retention over -40 to 125C, Process, VDD (0 to 3.6V)
–
1,000+
years
Human Body Model (JESD22-A114)
2000
–
V
Charged Device Model (JESD22-C101)
750
–
–
Machine Model (JESD22-A115)
200
–
–
DC Electrical Specifications
Environmental Compliance
Parameter
Condition/Test Method
Mechanical Shock
MIL-STD-883F, Method 2002
Mechanical Vibration
MIL-STD-883F, Method 2007
Temperature Cycle
MIL-STD-883F, Method 1010-65-150°C (1000 cycle)
Solderability
MIL-STD-883F, Method 2003
Moisture Sensitivity Level
MSL1 @ 260°C
Rev. 1.11
Page 2 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
LVCMOS input, OE or ST pin, 3.3V ± 10% or 2.5V ± 10% or 1.8V ± 5%, -40 to 85°C
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
VIH
Input High Voltage
70
–
–
%Vdd
VIL
Input Low Voltage
–
–
30
%Vdd
IIH
IIL
Input High Current
OE or ST or SD pin
–
–
10
uA
Input Low Current
OE or ST or SD pin
-10
–
–
uA
Tpu
Power Up Time
Time from minimum power supply voltage to the
first cycle (Guaranteed no runt pulses)
–
–
10
ms
Min.
Typ.
Max.
Unit
2.97
3.3
3.63
V
2.25
2.5
2.75
V
VDD = 3.3, Excluding Load Termination Current
–
75
84
mA
VDD = 2.5, Excluding Load Termination Current
–
75
84
mA
LVPECL, 3.3V ± 10% or 2.5V ± 10%, -40 to 85°C
Symbol
VDD
IDD
Parameter
Condition
Supply Voltage
Supply Current
VOH
VOL
Output High Voltage
Vswing
Pk-Pk Output Voltage Swing
Output Low Voltage
VDD-1.1
–
VDD-0.7
V
VDD-2.0
–
VDD-1.4
V
600
800
1000
mV
Min.
Typ.
Max.
Unit
2.97
3.3
3.63
V
2.25
2.5
2.75
V
VDD = 3.3, Excluding Load Termination Current
–
73
80
mA
VDD = 2.5, Excluding Load Termination Current
–
73
80
mA
0.6
0.75
0.95
V
0.0
–
50
mV
600
750
950
mV
Min.
Typ.
Max.
Unit
2.97
3.3
3.63
V
2.25
2.5
2.75
V
VDD = 3.3, Excluding Load Termination Current
–
75
85
mA
VDD = 2.5, Excluding Load Termination Current
–
70
77
mA
250
350
450
mV
–
–
50
mV
–
1.2
–
V
–
–
50
mV
500
700
900
mV
–
–
50
mV
–
1.2
–
V
–
–
50
mV
250
350
450
mV
–
–
50
mV
–
1.2
–
V
–
–
50
mV
50 Ohm termination to VDD - 2.0V
See Figure 2,3.
HCSL, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol
VDD
IDD
Parameter
Condition
Supply Voltage
Supply Current
VOH
Output High Voltage
VOL
Output Low Voltage
Vswing
Pk-Pk Output Voltage Swing
50 Ohm termination to GND
See Figure 4.
LVDS, 3.3V ± 10% or 2.5V ± 10%, -40 to 85°C
Symbol
VDD
IDD
Parameter
Supply Voltage
Supply Current
VOD1
∆VOD1
Differential Output Voltage
VOS1
∆VOS1
Offset Voltage
VOD2
∆VOD2
Differential Output Voltage
VOS2
∆VOS2
Offset Voltage
VOD3
∆VOD3
Differential Output Voltage
VOS3
∆VOS3
Offset Voltage
Rev. 1.11
Condition
VOD Magnitude Change
Swing Mode = Normal
Single load termination.
See Figure 5.
VOS Magnitude Change
VOD Magnitude Change
Swing Mode = High
Single load termination.
See Figure 5.
VOS Magnitude Change
VOD Magnitude Change
Swing Mode = High
Double load termination.
See Figure 6.
VOS Magnitude Change
Page 3 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
CML, 3.3V ± 10% or 2.5V ± 10% or 1.8V ± 5%, -40 to 85°C
Symbol
VDD
IDD
Parameter
Condition
Min.
Typ.
Max.
Unit
2.97
3.3
3.63
V
2.25
2.5
2.75
V
1.71
1.8
1.89
V
–
48
51
mA
–
48
51
mA
–
48
51
mA
Swing Mode = Normal
Single Load Termination
See Figure 7.
VDD-0.1
–
VDD
VDD-0.3
V
300
425
550
mV
Swing Mode = High
Single Load Termination
See Figure 7.
VDD-0.1
–
VDD
V
VDD-1.1
VDD-0.85
VDD-0.6
V
600
850
1100
mV
Swing Mode = High
Double Load Termination
See Figure 8.
VDD-0.1
–
VDD
VDD-0.3
V
Supply Voltage
Supply Current
VDD = 3.3V
Excluding Load
Termination
Current
VDD = 2.5V
VDD = 1.8V
VOH1
Output High Voltage
VOL1
Vswing1
Output Low Voltage
VOH2
Output High Voltage
VOL2
Output Low Voltage
Vswing2
VOH3
Pk-Pk Output Voltage Swing
VOL3
Output Low Voltage
Vswing3
Pk-Pk Output Voltage Swing
Pk-Pk Output Voltage Swing
Output High Voltage
VDD-0.55 VDD-0.425
VDD-0.55 VDD-0.425
V
V
300
425
550
mV
Min.
Typ.
Max.
Unit
AC Electrical Specifications
LVPECL, 3.3V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
–
–
1
PPM
First year @ 25°C
45
–
55
%
100
150
300
ps
Fout = 100 MHz, -0.5% down spread
–
10
16
ps
Fout = 150 MHz, -0.5% down spread
–
8
14
ps
Fout = 200 MHz, -0.5% down spread
–
8
14
ps
Min.
Typ.
Max.
Unit
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
LVPECL, 2.5V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
Fout = 100 MHz, -0.5% down spread
Rev. 1.11
First year @ 25°C
–
–
1
PPM
45
–
55
%
100
150
300
ps
–
10
16
ps
Fout = 150 MHz, -0.5% down spread
–
8
14
ps
Fout = 200 MHz, -0.5% down spread
–
8
14
ps
Page 4 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
HCSL, 3.3V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
Min.
Typ.
Max.
Unit
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
–
–
1
PPM
First year @ 25°C
45
–
55
%
200
280
375
ps
Fout = 100 MHz, -0.5% down spread
–
10
16
ps
Fout = 150 MHz, -0.5% down spread
–
10
15
ps
Fout = 200 MHz, -0.5% down spread
–
10
15
ps
Min.
Typ.
Max.
Unit
HCSL, 2.5V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
–
–
1
PPM
First year @ 25°C
45
–
55
%
200
300
400
ps
Fout = 100 MHz, -0.5% down spread
–
9
19
ps
Fout = 150 MHz, -0.5% down spread
–
9
17
ps
Fout = 200 MHz, -0.5% down spread
–
9
15
ps
Min.
Typ.
Max.
Unit
LVDS, 3.3V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
Rev. 1.11
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
–
–
1
PPM
First year @ 25°C
45
–
55
%
100
200
325
ps
Fout = 100 MHz, -0.5% down spread
–
11
19
ps
Fout = 150 MHz, -0.5% down spread
–
11
20
ps
Fout = 200 MHz, -0.5% down spread
–
11
21
ps
Page 5 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
LVDS, 2.5V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
Min.
Typ.
Max.
Unit
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
–
–
1
PPM
First year @ 25°C
45
–
55
%
100
260
325
ps
Fout = 100 MHz, -0.5% down spread
–
14
26
ps
Fout = 150 MHz, -0.5% down spread
–
14
26
ps
Fout = 200 MHz, -0.5% down spread
–
14
27
ps
Min.
Typ.
Max.
Unit
CML, 3.3V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
–
–
1
PPM
First year @ 25°C
45
–
55
%
150
220
300
ps
Fout = 100 MHz, -0.5% down spread
–
11
20
ps
Fout = 150 MHz, -0.5% down spread
–
11
18
ps
Fout = 200 MHz, -0.5% down spread
–
10
19
ps
Min.
Typ.
Max.
Unit
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
CML, 2.5V ± 10%, -40 to 85°C
Symbol
Parameter
Fout
Output Frequency
Fstab
Frequency Stability
Condition
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
Fout = 100 MHz, -0.5% down spread
Rev. 1.11
First year @ 25°C
–
–
1
PPM
45
–
55
%
150
230
300
ps
–
13
22
ps
Fout = 150 MHz, -0.5% down spread
–
12
19
ps
Fout = 200 MHz, -0.5% down spread
–
11
20
ps
Page 6 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
CML, 1.8V ± 5%, -40 to 85°C
Symbol
Parameter
Condition
Fout
Output Frequency
Fstab
Frequency Stability
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
Fage
Aging
DC
Duty Cycle
tR/tF
Output Rise/Fall Time
20% to 80%
TCCJ
Cycle-Cycle Jitter
Min.
Typ.
Max.
Unit
1.0
–
220
MHz
-20 to 70°C
-25
–
+25
ppm
-40 to 85°C
-50
–
+50
ppm
–
–
1
PPM
First year @ 25°C
45
–
55
%
150
230
300
ps
Fout = 100 MHz, -0.5% down spread
–
13
23
ps
Fout = 150 MHz, -0.5% down spread
–
12
22
ps
Fout = 200 MHz, -0.5% down spread
–
12
21
ps
Termination Diagrams
VDD = 3.3V
R1 = 150 Ohm
VDD = 2.5V
R1 = 120 Ohm
Figure 1. LVPECL AC Coupled Typical Termination
Figure 2. LVPECL DC Coupled Typical Termination with Termination Voltage
Rev. 1.11
Page 7 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
VDD = 3.3V
R1 = R3 = 133 Ohm
R2 = R4 = 82 Ohm
VDD = 2.5V
R1 = R3 = 250 Ohm
R2 = R4 = 62.5 Ohm
Figure 3. LVPECL DC Coupled Typical Termination without Termination Voltage
RS = 10 Ohm to 35 Ohm
Figure 4. HCSL Typical Termination
Note:
1. All the tests are done with RS = 20 Ohm (recommended).
Figure 5. LVDS Single Load Termination (Load Terminated)
Rev. 1.11
Page 8 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Figure 6. LVDS Double Termination (Source + Load Terminated)
Figure 7. CML Single Load Termination
Rev. 1.11
Page 9 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Figure 8. CML Double Load Termination
Rev. 1.1
Page 10 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Ordering Information
The Part No. Guide is for reference only. For real-time customization and exact part number, use the SiTime Part Number Generator.
Frequency Stability vs. Temperature Range
Options
Frequency
Stability (PPM)
Temperature
Range
C (-20 to +70°C)
±25
I (-40 to +85°C)
C (-20 to +70°C)
±50
I (-40 to +85°C)
Supply Voltage
1.8 V
2.5 V
3.3 V
Signaling Type vs. Swing Select Options
Signaling
Type
Supply Voltage
Swing Select
1.8 V
2.5 V
3.3 V
Normal
–
High
–
–
–
Normal
–
High
–
–
–
–
LVPECL-0
LVPECL-1
Normal
–
High
–
Normal
High
Normal
–
High
–
–
LVDS
CML
HCSL
Note:
1. Without Center Pad.
Rev. 1.1
Page 11 of 12
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SiT9002
LVPECL / HCSL / LVDS / CML
1 to 220 MHz High Performance Spread Spectrum Oscillator
Package Information [2]
Land Pattern[3] (recommended) (mm)
Dimension (mm)
5.0 x 3.2 x 0.75mm
7.0 x 5.0 x 0.90mm
Notes:
2. Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device.
3. A capacitor of value 0.1µF between VDD and GND is recommended.
4. The 7050 package with part number designation "-8" has NO center pad.
© SiTime Corporation 2013. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a
Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or accident, (iii)
unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv) improper
installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
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Rev. 1.11
Page 12 of 12
Revised September 27, 2016