PESD0542L003

PESD0542L003 1. Electrical Specification 1-1 Test condition Varistor voltage Leakage current Maximum clamping voltage Rated peak single pulse transient current Capacitance Insulation resistance after reflow soldering Reflow soldering condition In = 1 mA DC Vdc = 5.0V DC Ic = 1 A 8 / 20 ㎲ waveform, +/- each 1 time induce 10/1000 ㎲ waveform f = 1MHz, Vrms = 0.5 V Soldering paste : Tamura (Japan) RMA-20-21L Stencil : SUS, 120 ㎛ thickness Pad size : 0.5 (Width) x 0.6 (Length) 0.5 (Distance between pads) Soldering profile : 260±5 ℃, 5 sec. 1-2 Electrical specification Maximum allowable continuous DC voltage 5.0 trigger voltage / Varistor voltage / breakdown voltage Maximum clamping voltage Rated peak single pulse transient current 100-150 V V 200 V Maximum 1 A Maximum Nonlinearity coefficient ＞ 12 Leakage current at continuous DC voltage ＜ 0.1 ㎂ Response time ＜ 0.5 ns Varistor voltage temperature coefficient ＜ 0.05 %/℃ 2.5-4.5 pF Capacitance tolerance -50 to +50 % Insulation resistance after reflow soldering on PCB ＞ 10 Operating ambient temperature -55 to +125 ℃ Storage temperature -55 to +125 ℃ Capacitance measured at 1MHz Rev : 01.06.2016 1/5 Typical MΩ www.leiditech.com PESD0542L003 1-3 Reliability testing procedures Reliability parameter Pulse current capability Electrostatic discharge capability Test Imax 8/20 ㎲ ESD C=150 pF, R=330Ω Environmenta l reliability Thermal shock Test methods and remarks Test requirement IEC 1051-1, Test 4.5. dVn/Vn≤10% 10 pulses in the same direction at 2 pulses per minute at maximum peak current no visible damage IEC 1000-4-2 dVn/Vn≤10% Each 10 times in positive/negative direction in 10 sec at 8KV contact discharge (Level 4) no visible damage IEC 68-2-14 Condition for 1 cycle Step 1 : Min. –40℃, 30±3 min. Step 2 : Max. +125℃, 30±3 min. dVn/Vn≤5% no visible damage Number of cycles: 30 times Low temperature IEC 68-2-1 Place the chip at -40±5℃ for 1000± 12hrs. Remove and place for 24±2hrs at room temp. condition, then measure High temperature IEC 68-2-2 Place the chip at 125±5℃ for 1000± 24hrs. Remove and place for 24±2hrs at room temp. condition, then measure Heat resistance no visible damage dVn/Vn≤5% no visible damage dVn/Vn≤5% Apply the rated voltage for 1000±48hrs at 85±3℃. Remove and place for 24± 2hrs at room temp. condition, then measure no visible damage IEC 68-2-30 dVn/Vn≤10% Place the chip at 40±2℃ and 90 to 95% humidity for 1000±24hrs. Remove and place for 24±2hrs at room temp. condition, then measure no visible damage Pressure cooker test Place the chip at 2 atm, 120℃, 85%RH for 60 hrs. Remove and place for 24± 2hrs at room temp. condition, then measure dVn/Vn≤10% Operating life Apply the rated voltage for 1000±48hrs at 125±3℃. Remove and place for 24± 2hrs at room temp. condition, then measure Humidity resistance Rev : 01.06.2016 IEC 68-2-3 dVn/Vn≤5% 2/5 no visible damage dVn/Vn≤10% no visible damage www.leiditech.com PESD0542L003 Mechanical Solderability IEC 68-2-58 Solder bath method, 230±5℃, 2s Reliability Resistance to soldering heat IEC 68-2-58 Bending strength IEC 68-2-21 dVn/Vn≤5% Solder bath method, 260±5℃, 10±0.5s, 270±5℃, 3±0.5s no visible damage dVn/Vn≤5% Warp:2mm, Speed:0.5mm/sec, Duration: 10sec. The measurement shall be made with board in the bent position Adhesive strength At least 95% of terminal electrode is covered by new solder IEC 68-2-22 no visible damage Strength>10 N Applied force on SMD chip by fracture from PCB no visible damage 2. Material Specification Body ZnO based ceramics Internal electrode Silver – Palladium External electrode Silver – Nickel – Tin Thickness of Ni/Sn plating layer Nickel ＞ 1 ㎛, Tin ＞ 2 ㎛ 3. Dimension Specification Size 0402 0603 L(mm) 1.0±0.10 1.6±0.15 W(mm) 0.5±0.10 0.8±0.15 T(mm) ≤ 0.6 ≤ 0.9 M(mm) 0.20±0.10 0.35±0.10 4. Soldering Recommendations 4-1 Soldering profile Rev : 01.06.2016 3/5 www.leiditech.com PESD0542L003 4-1-1 Pb free solder paste 4-1-2 Repair soldering - Allowable time and temperature for making correction with a soldering iron : 350 ± 10 ℃, 3 sec. - Optimum solder amount when corrections are made using a soldering iron 4-2 Soldering guidelines - Our chip varistors are designed for reflow soldering only. Do not use flow soldering - Use non-activated flux (Cl content 0.2% max.) - Follow the recommended soldering conditions to avoid varistor damage. Rev : 01.06.2016 4/5 www.leiditech.com PESD0542L003 4-3 Solder pad layout 5. Storage condition - Storage environment must be at an ambient temperature of 25~35 ℃ and an ambient humidity of 40~60 % RH - Chip varistors can experience degradation of termination solderability when subjected to high temperature of humidity, or if exposed to sulfur or chlorine gases. - Avoid mechanical shock (ex. Falling) to the chip varistor to prevent mechanical cracking inside of the ceramic dielectric due to its own weight. - Use chips within 6 months. If 6 months of more have elapsed, check solderability before use.- 6. Description about package label Qunatity : 10,000 pcs - Quantity of shipping chip varistor Shanghai Leiditech Electronic Co.,Ltd Email: sale1@leiditech.com Tel : +86- 021 50828806 Fax : +86- 021 50477059 Rev : 01.06.2016 5/5 www.leiditech.com