Preliminary Datasheet
LP3983H
600mA,Ultra-low noise, Small Package
Ultra-Fast CMOS LDO Regulator
General Description
Features
The LP3983H is designed for portable RF and wireless
Ultra-Low-Noise for RF Application
applications with demanding performance and space
2.2V- 6V Input Voltage Range
requirements. The LP3983H performance is optimized
Low Dropout : 420mV @ 600mA
600mA Output Current, 750mA Peak Current
High PSRR: -70dB at 217Hz
< 0.01uA Standby Current When Shutdown
Ultra-Fast Response in Line/Load transient
Current Limiting and Thermal Shutdown
for battery-powered systems to deliver ultra low noise
and low quiescent current. Regulator ground current
increases only slightly in dropout, further prolonging
the battery life. The LP3983H also works with low-ESR
ceramic capacitors, reducing the amount of board
Protection
space necessary for power applications, critical in
hand-held wireless devices. The LP3983H consumes
Applications
less than 0.01µA in shutdown mode and has fast
Portable Media Players/MP3 players
turn-on time less than 50µs. The other features include
Cellular and Smart mobile phone
ultra low dropout voltage, high feedback accuracy,
LCD/ DSC Sensor
current limiting protection, and high ripple rejection
Wireless Card
ratio. It is available in the 5-lead of SOT23-5 and
Typical Application Circuit
SOT89-5 packages.
Vin
LP3983HAB5F
VIN
OUT
1
2.2uF
Order Information
LP3983H □
Vout
5
22pF
(Option)
□ □ □
Chip Enable
3
EN
F: Pb-Free
Package Type
ADJ
GN
D
R1
4
2
R2
B5: SOT23-5
X5: SOT89-5
Output Type
A:Adjustable
Marking Information
Device
Marking
LPS
LP3983HAB5F
1FYWX
Package
Shipping
SOT23-5
3K/REEL
SOT89-5
1K/REEL
LPS
LP3983HAX5F
3983X
YWX
Marking indication:
Y:Year code .W: W is week code. X: X is series number.
LP3983H-04
Jul.-2018
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Page 1 of 10
2.2uF
Preliminary Datasheet
LP3983H
Functional Pin Description
Package Type
Pin Configurations
EN
GND
3
2
VIN
VOUT
GND
3
2
1
(MARKING)
SOT23-5 / SOT89-5
VIN
1
(MARKING)
4
5
4
5
ADJ
VOUT
ADJ
EN
SOT23-5
SOT89-5
Pin Description
Pin
Name
Description
SOT23-5
SOT89-5
1
1
VIN
Power Input Voltage.
2
2
GND
Ground.
3
5
EN
4
4
BP
5
3
VOUT
LP3983H-04
Jul.-2018
Chip Enable (Active High). There is an integrated pull low 1M Ω resistor
connected to GND when the EN pin is floating.
Feedback pin. The reference voltage is 0.8V.
Output Voltage. Vout=VFB ×(1+R1/R2), which VFB = 0.8V
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Preliminary Datasheet
LP3983H
Function Diagram
Absolute Maximum Ratings
Supply Input Voltage --------------------------------------------------------------------------------------- -0.3V to 6.5V
EN Pin Voltage ----------------------------------------------------------------------------------------- -0.3V to Vin+0.3V
Power Dissipation, PD @ TA = 25°C
SOT23-5 --------------------------------------------------------------------------------------------------------------- 500mW
SOT89-5 --------------------------------------------------------------------------------------------------------------- 700mW
Package Thermal Resistance
SOT23-5, θJA ------------------------------------------------------------------------------------------------------- 195°C/W
SOT89-5, θJA ------------------------------------------------------------------------------------------------------- 165°C/W
Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------ 260°C
Storage Temperature Range -------------------------------------------------------------------------- −40°C to 150°C
ESD Susceptibility
HBM (Human Body Mode) --------------------------------------------------------------------------------------------- 2kV
MM(Machine-Mode) --------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
Supply Input Voltage ------------------------------------------------------------------------------------------- 2.2V to 6V
Operation Ambient Temperature Range ------------------------------------------------------------ −40°C to 85°C
LP3983H-04
Jul.-2018
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Page 3 of 10
Preliminary Datasheet
LP3983H
Electrical Characteristics
(VIN = VOUT + 1V, CIN = COUT = 1µF, , TA = 25° C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Output Loading Current
ILOAD
VEN=VIN,VIN>2.5V
600
mA
Current Limit
ILIM
RLOAD = 1Ω
750
mA
VFB
IOUT=1mA
IQ
Adjustable voltage
reference
Quiescent Current
Dropout Voltage
VDROP
Min
0.784
Typ
0.816
V
VEN ≥ 1.2V, IOUT = 0mA
75
130
μA
IOUT = 200mA, VOUT >2.8V
140
160
mV
IOUT = 400mA, VOUT >2.8V
280
320
mV
IOUT = 600mA, VOUT >2.8V
420
480
VIN = (VOUT + 1V) to 5.5V,
ΔVLINE
Load Regulation
ΔVLOAD
1mA < IOUT < 300mA
Standby Current
ISTBY
VEN = GND, Shutdown
0.01
EN Input Bias Current
IIBSD
VEN = 5V
5
VIL
VIN=3V to 5.5V, Shutdown
VIH
VIN=3V to 5.5V, Start-Up
EN
Voltage
Threshold
Logic-High
Voltage
Power Supply
f = 217Hz
Rejection Rate
f = 1kHz
Thermal Shutdown
Temperature
LP3983H-04
Jul.-2018
IOUT = 1mA
10Hz to 100kHz, IOUT=200mA
Output Noise Voltage
COUT=1µF
PSRR
Units
0.8
Line Regulation
Logic-Low
Max
COUT=1µF, IOUT=10mA
TSD
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0.2
%
2
%
1
μA
nA
0.4
VIN+
1.4
0.3
V
V
100
uVRMS
−70
dB
−58
dB
150
°C
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Page 4 of 10
Preliminary Datasheet
LP3983H
Typical Operating Characteristics
LP3983H-04
Jul.-2018
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Page 5 of 10
Preliminary Datasheet
LP3983H
EN Soft Start Function
(VIN=5V,VOUT=3.3V,CIN=1uF,COUT=4.7uF)
EN Voltage
Output Voltage
LP3983H-04
Jul.-2018
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Page 6 of 10
Preliminary Datasheet
LP3983H
Applications Information
Like
any
low-dropout
regulator,
the
external
capacitors used with the LP3983H must be carefully
selected for regulator stability and performance.
Using a capacitor whose value is > 1µF on the
LP3983H input and the amount of capacitance can
be increased without limit. The input capacitor must
be located a distance of not more than 0.5 inch from
the input pin of the IC and returned to a clean analog
ground. There is a special attention which is the input
capacitance
should
not be
less
than
output
capacitance. Any good quality ceramic or tantalum
can be used for this capacitor. The capacitor with
larger value and lower ESR (equivalent series
Enable Function
The
LP3983H
features
an
LDO
regulator
enable/disable function. To assure the LDO regulator
will switch on, the EN turn on control level must be
greater than 1.4 volts but not above Vin+0.3V. The
LDO regulator will go into the shutdown mode when
the voltage on the EN pin falls below 0.4 volts. For
protecting the system, the LP3983H have a
quick-discharge function. If the enable function is not
needed in a specific application, it may be tied to VIN
to keep the LDO regulator in a continuously on state.
Feedback Capacitor and Voltage
resistance) provides better PSRR and line-transient
For adjustable version, connecting a 22pF between
response. The output capacitor must meet both
output pin and FB pin significantly reduces output
requirements for minimum amount of capacitance
voltage ripple, it is critical that the capacitor
and ESR in all LDOs application. The LP3983H is
connection should be direct and PCB traces should
designed specifically to work with low ESR ceramic
be as short as possible. The output voltage of
output capacitor in space-saving and performance
LDO could be set by the formula below:
consideration. Using a ceramic capacitor whose
value is at least 1µF with ESR is > 25mΩ on the
LP3983H output ensures stability. The LP3983H still
works well with output capacitor of other types due to
the wide stable ESR range. Output capacitor of
larger capacitance can reduce noise and improve
load transient response, stability, and PSRR. The
output capacitor should be located not more than 0.5
inch from the VOUT pin of the LP3983H and returned
to a clean analog ground.
Vout=VFB ×(1+R1/R2)
which VFB = 0.8V
VOUT(V)
1.2
1.5
1.8
2
2.5
2.8
3
3.3
3.5
4
4.2
4.5
R2(KΩ)
R1(KΩ)
51
25.5
51
44.6
51
63.8
47
70.5
47
99.9
47
117.5
33
90.8
33
103.1
33
111.4
33
132.0
33
140.3
33
152.6
Considering the practical application, we may add a
small capacitor with R1 in parallel which could be
22pF or 47pF.
LP3983H-04
Jul.-2018
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Preliminary Datasheet
The maximum power dissipation can be calculated
Thermal Considerations(for SOT23-5)
Thermal protection limits power dissipation in
LP3983H. When the operation junction temperature
exceeds 150°C, the OTP circuit starts the thermal
shutdown function turn the pass element off. The
pass element turns on again after the junction
temperature cools by 25°C. For continue operation,
do not exceed absolute maximum operation junction
temperature 150°C.
The power dissipation definition in device is:
PD = (VIN−VOUT) x IOUT + VIN x IQ
The maximum power dissipation depends on the
thermal resistance of IC package, PCB layout, the
rate
of
surroundings
airflow
and
LP3983H
temperature
difference between junction and ambient.
by following formula:
PD(MAX) = ( TJ(MAX) − TA ) /θJA
Where TJ(MAX) is the maximum operation junction
temperature 150°C, TA is the ambient temperature
and the θJA is the junction to ambient thermal
resistance. For recommended operating conditions
specification of LP3983H, where
TJ(MAX) is the maximum junction temperature of the
die (150°C) and TA is the maximum ambient
temperature. The junction to ambient thermal
resistance (θJA is layout dependent) for SOT23-5
package is 195°C/W.
PD = (150°C−25°C) / 195 = 641mW (SOT23-5)
The maximum power dissipation depends on
operating ambient temperature for fixed TJ(MAX) and
thermal resistance θJA. Considering the PCB thermal
feather, the PD(MAX) may be higher than 500mW.
LP3983H-04
Jul.-2018
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Page 8 of 10
Preliminary Datasheet
LP3983H
Packaging Information
SOT23-5
LP3983H-04
Jul.-2018
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Page 9 of 10
Preliminary Datasheet
LP3983H
SOT89-5
LP3983H-04
Jul.-2018
Email: marketing@lowpowersemi.com
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Page 10 of 10
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