HG2269M/TR

HG2269 Current Mode PWM Controller GENERAL DESCRIPTION HG2269 is a highly integrated current mode PWM control IC optimized for high performance, low standby power and cost effective offline flyback converter applications. PWM switching frequency at normal operation is externally programmable and trimmed to tight range. At no load or light load condition, the IC operates in extended ‘burst mode’ to minimize switching loss. Lower standby power and higher conversion efficiency is thus achieved. VDD low startup current and low operating current contribute to a reliable power on startup design with HG2269. A large value resistor could thus be used in the startup circuit to minimize the standby power. The internal slope compensation improves system large signal stability and reduces the possible subharmonic oscillation at high PWM duty cycle output. Leading-edge blanking on current sense input removes the signal glitch due to snubber circuit diode reverse recovery. This greatly helps to reduce the external component count and system cost in application. HG2269 offers complete pr otection coverage with automatic self-recovery feature including Cycle-byCycle current limiting (OCP), over load protection (OLP), over temperature protection (OTP), VDD over voltage protection (OVP) and under voltage lockout (UVLO). The Gate-drive output is clamped at 18V to protect the power MOSFET. In HG2269, OCP threshold slope is internally optimized to reach constant output power limit over universal AC input range. Excellent EMI performance is achieved with OnBright proprietary frequency shuffling technique together with soft switching control at the totem pole gate drive output. http://www.hgsemi.com.cn 1 The tone energy at below 20KHZ is minimized in operation. Consequently, audio noise performance is greatly improved. HG2269 is offered in both SOP-8 and DIP-8 packages. FEATURES On-Bright Proprietary Frequency Shuffling Technology for Improved EMI Performance ■ Extended Burst Mode Control For Improved Efficiency and Minimum Standby Power Design ■ Audio Noise Free Operation Programmable PWM Switching ■ External Frequency ■ Internal Synchronized Slope Compensation ■ Low VIN/VDD Startup Current(6.5uA) and Low Operating Current (2.3mA) ■ Leading Edge Blanking on Current Sense Input ■ Complete Protection Coverage With Auto SelfRecovery o External Programmable Over Temperature Protection (OTP) o With or Without On-chip VDD OVP for System OVP o Under Voltage Lockout with Hysteresis (UVLO) o Gate Output Maximum Voltage Clamp (18V) o Line Compensated Cycle-by-Cycle Overcurrent Threshold Setting For Constant Output Current Limiting Over Universal Input Voltage Range (OCP) o Over Load Protection. (OLP) ■ APPLICATIONS Offline AC/DC flyback converter for ■ Laptop Power Adaptor ■ PC/TV/Set-Top Box Power Supplies ■ Open-frame SMPS ■ Battery Charger 2018 MAR HG2269 TYPICAL APPLICATION GENERAL INFORMATION Pin Configuration The HG2269 is offered in DIP and SOP packages shown as below. Package Dissipation Rating Package DIP8 SOP8 http://www.hgsemi.com.cn Absolute Maximum Ratings Parameter Value VDD/VIN DC Supply 30 V Voltage VDD Zener Clamp VDD_Clamp+0.1V Note Voltage VDD Clamp Continuous 10 mA Current VFB Input Voltage -0.3 to 7V VSENSE Input Voltage to Sense -0.3 to 7V Pin VRT Input Voltage to RT Pin -0.3 to 7V VRI Input Voltage to RI Pin -0.3 to 7V Min/Max Operating Junction -20 to 150 oC Temperature TJ Min/Max Storage -55 to 150 oC Temperature Tstg Lead Temperature (Soldering, 260 oC 10secs) Note: VDD_Clamp has a nominal value of 35V. RθJA (°C/W) 90 150 Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability. 2 2018 MAR HG2269 TERMINAL ASSIGNMENTS Pin Num 1 2 Pin Name GND FB I/O P I 3 VIN I 4 RI I 5 6 RT SENSE I I 7 8 VDD GATE P O Description Ground Feedback input pin. PWM duty cycle is determined by voltage level into this pin and current-sense signal level at Pin 6. Connected through a large value resistor to rectified line input for Startup IC supply and line voltage sensing. Internal Oscillator frequency setting pin. A resistor connected between RI and GND sets the PWM frequency. Temperature sensing input pin. Connected through a NTC resistor to GND. Current sense input pin. Connected to MOSFET current sensing resistor node. DC power supply pin. Totem-pole gate drive output for power MOSFET. BLOCK DIAGRAM RECOMMENDED OPERATING CONDITION Symbol VDD RI TA Parameter VDD Supply Voltage RI Resistor Value Operating Ambient Temperature http://www.hgsemi.com.cn Min 12 24 -20 3 Max 23 31 85 Unit V Kohm o C 2018 MAR HG2269 ESD INFORMATION Symbol HBMNote MM Parameter Human Body Model on All Pins Except VIN and VDD Machine Model on All Pins Test Conditions MIL-STD Min JEDEC-STD Typ 3 Max 250 Unit KV V Note: HBM all pins pass 3KV except High Voltage Input pin. The details are VIN passes 1kV, VDD passes 1.5KV, all other I/Os pass 3KV. In system application, High Voltage Input pin is either a high impedance input or connected to a cap. The lower rating has minimum impacts on system ESD performance. ELECTRICAL CHARACTERISTICS (TA = 25OC, VDD=16V, RI=24Kohm if not otherwise noted) Symbol Parameter Test Conditions Supply Voltage (VDD) I_VDD_Startup VDD Start up VDD =15V, Measure Current current into VDD I_VDD_Operation Operation Current VFB=3V UVLO(Enter) VDD Under Voltage Lockout Enter UVLO(Exit) VDD Under Voltage Lockout Exit (Startup) *Optional OVP(ON) VDD Over Voltage Protection Enter OVP(OFF)*Optional VDD Over Voltage Protection Exit (Recovery) *Optional OVP_Hys OVP Hysteresis OVP(ON)-OVP(OFF) TD_OVP VDD OVP Debounce time VDD_Clamp VDD Zener Clamp I(VDD ) = 5mA Voltage Feedback Input Section(FB Pin) AVCS PWM Input Gain ΔVFB /ΔVcs VFB_Open VFB Open Voltage IFB_Short FB pin short circuit current VTH_0D Zero Duty Cycle FB Threshold Voltage VTH_BM Burst Mode FB Threshold Voltage VTH_PL Power Limiting FB Threshold Voltage TD_PL Power limiting Debounce Time ZFB_IN Input Impedance Current Sense Input(Sense Pin) T_blanking Sense Input Leading Edge Blanking Time ZSENSE_IN Sense Input http://www.hgsemi.com.cn Short FB pin to GND, measure current Min Typ Max Unit 6.5 20 uA 9.5 2.3 10.5 11.5 mA V 15.5 16.5 17.5 V 23.5 25 26.5 V 21.5 23 24.5 V 2 80 V uSec 35 V 2.8 5.9 V/V V 0.80 mA 0.95 4 V 1.7 V 4.4 V 80 mSec 7.2 Kohm 250 nS 30 Kohm 2018 MAR HG2269 TD_OC VTH_OC_0 VTH_OC_1 Oscillator FOSC ∆f_Temp ∆f_VDD RI_range V_RI_open F_BM DC_max DC_min Impedance Over Current Detection and Control Delay Current Limiting Threshold at No Compensation Current Limiting Threshold at Compensation Normal Oscillation Frequency Frequency Temperature Stability Frequency Voltage Stability Operating RI Range RI open voltage Burst Mode Base Frequency Maxmum Duty Cycle Minimum Duty Cycle Gate Drive Output VOL Output Low Level VOH Output High Level VG_Clamp Output Clamp Voltage Level T_r Output Rising Time T_f Output Falling Time Over Temperature Protection I_RT Output Current of RT pin VTH_OTP OTP Threshold Voltage VTH_OTP_off OTP Recovery Threshold Voltage TD_OTP OTP De-bounce Time V_RT_Open RT Pin Open Voltage Frequency Shuffling Frequency ∆f_OSC Modulation range /Base frequency Freq_Shuffling Shuffling Frequency http://www.hgsemi.com.cn CL=1nf at GATE, I(VIN) = 0uA 120 0.85 I(VIN) = 150uA 0.90 nSec 0.95 0.81 60 65 V V 70 KHZ -20oC to 100oC 2 % VDD = 12-25V 2 % Io = -20 mA Io = +20 mA VDD=20V 12 24 2.0 22 60 Kohm V KHZ 75 80 85 % - - 0 % 0.3 18 V V V 120 50 nSec nSec 70 uA 11 CL = 1nf CL = 1nf 1.015 1.065 5 V 1.165 V 100 uSec 3.5 V -3 RI = 24Kohm 1.115 3 32 % HZ 2018 MAR HG2269 CHARACTERIZATION PLOTS VDD Startup Current vs Temperature 11 10 9 8 7 6 5 4 3 2 1 0 8 Istartup(uA) S tart-up C urrent (uA ) VDD Start-up Current vs. Voltage 6 4 2 0 0 2 4 6 8 10 12 14 -25 16 5 35 Fosc 50Khz 2.5 I(VDD) (mA) VDD Current (mA) 3 2 1.5 1 0.5 2 0 4 6 8 10 12 14 16 125 18 20 22 0 24 Fosc 65Khz Fosc 100Khz 6 5 4 3 2 1 500 VDD UVLO(enter) vs. Temperature 1000 1500 Gatedrive Loading (pf) VDD Voltage (V) 2000 VDD UVLO(exit) vs. Temperature 10.6 10.55 10.5 10.45 10.4 10.35 10.3 UVLO(exit) (V) UVLO(enter) (V) 95 VDD Operation Current vs. Load VDD UVLO and Operation Current 0 65 Temperature(C) VDD VOLTAGE (V) 16.9 16.8 16.7 16.6 16.5 16.4 -10 10 30 50 70 90 -10 110 30 50 70 90 110 Temperature(C) Temperature(C) http://www.hgsemi.com.cn 10 6 2018 MAR HG2269 Fosc(KHz) vs. Temperature Fosc(KHz) vs RI(Kohm) 110 Fosc(KHz) Fosc(KHz) 140 80 50 20 12 24 36 RI(Kohm) 48 -20 60 5 30 55 80 Temp(C) 105 130 I_RT vs. Temperature Vth_OC(50KHz) Vth_OC(65KHz) 1.0 71.4 0.9 71.2 I_RT(uA) V th_O C (V ) Vth_OC vs. I(vin) 66.0 65.5 65.0 64.5 64.0 63.5 0.8 0.7 71 70.8 70.6 0.6 0 50 100 150 200 250 -20 300 20 40 60 80 100 120 Temperature(C) I(vin) (uA) http://www.hgsemi.com.cn 0 7 2018 MAR HG2269 OPERATION DESCRIPTION to minimize the switching loss thus reduce the standby power consumption to the greatest extend. The nature of high frequency switching also reduces the audio noise at any loading conditions. The HG2269 is a highly integrated PWM controller IC optimized for offline flyback converter applications. The extended burst mode control greatly reduces the standby power consumption and helps the design easily meet the international power conservation requirements. z Oscillator Operation A resistor connected between RI and GND sets the constant current source to charge/discharge the internal cap and thus the PWM oscillator frequency is determined. The relationship between RI and switching frequency follows the below equation within the specified RI in Kohm range at nominal loading operational condition. • Startup Current and Start up Control Startup current of HG2269 is designed to be very low so that VDD could be charged up above UVLO(exit) threshold level and device starts up quickly. A large value startup resistor can therefore be used to minimize the power loss yet reliable startup in application. For a typical AC/DC adaptor with universal input range design, a 2 MΩ, 1/8 W startup resistor could be used together with a VDD capacitor to provide a fast startup and yet low power dissipation design solution. FOSC = z Current Sensing and Leading Edge Blanking Cycle-by-Cycle current limiting is offered in HG2269 current mode PWM control. The switch current is detected by a sense resistor into the sense pin. An internal leading edge blanking circuit chops off the sense voltage spike at initial MOSFET on state due to snubber diode reverse recovery so that the external RC filtering on sense input is no longer required. The current limit comparator is disabled and thus cannot turn off the external MOSFET during the blanking period. PWM duty cycle is determined by the current sense input voltage and the FB input voltage. z Operating Current The Operating current of HG2269 is low at 2.3mA. Good efficiency is achieved with HG2269 low operating current together with extended burst mode control schemes. z Frequency shuffling for EMI improvement The frequency Shuffling/jittering (switching frequency modulation) is implemented in HG2269. The oscillation frequency is modulated with a internally generated random source so that the tone energy is evenly spread out. The spread spectrum minimizes the conduction band EMI and therefore eases the system design in meeting stringent EMI requirement. z Internal Synchronized Slope Compensation Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM generation. This greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus reduces the output ripple voltage. z Burst Mode Operation At zero load or light load condition, most of the power dissipation in a switching mode power supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the energy. HG2269 self adjusts the switching mode according to the loading condition. At from no load to light/medium load condition, the FB input drops below burst mode threshold level (1.8V). Device enters Burst Mode control. The Gate drive output switches only when VDD voltage drops below a preset level and FB input is active to output an on state. Otherwise the gate drive remains at off state http://www.hgsemi.com.cn 1560 ( Khz ) RI ( Kohm) z Over Temperature Protection A NTC resistor in series with a regular resistor should connect between RT and GND for temperature sensing and protection. NTC resistor value becomes lower when the ambient temperature rises. With the fixed internal current IRT flowing through the resistors, the voltage at RT pin becomes lower at high temperature. The internal OTP circuit is triggered and shutdown the MOSFET when the sensed input voltage is lower than VTH_OTP. 8 2018 MAR HG2269 z Gate Drive HG2269 Gate is connected to the Gate of an external MOSFET for power switch control. Too weak the gate drive strength results in higher conduction and switch loss of MOSFET while too strong gate drive output compromises the EMI. Good tradeoff is achieved through the built-in totem pole gate drive design with right output strength and dead time control. The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 18V clamp is added for MOSFET gate protection at higher than expected VDD input. The OCP threshold value is self adjusted lower at higher current into VIN pin. This OCP threshold slope adjustment helps to compensate the increased output power limit at higher AC voltage caused by inherent Over-Current sensing and control delay. A constant output power limit is achieved with recommended OCP compensation scheme on HG2269. At output overload condition, FB voltage is biased higher. When FB input exceeds power limit threshold value for more than 80mS, control circuit reacts to turnoff the power MOSFET. Similarly, control circuit shutdowns the power MOSFET when an Over Temperature condition is detected. HG2269 resumes the operation when temperature drops below the hysteresis value. VDD is supplied with transformer auxiliary winding output. It is clamped when VDD is higher than 35V. MOSFET is shut down when VDD drops below UVLO(enter) limit and device enters power on startup sequence thereafter. z Protection Controls Good system reliability is achieved with HG2269’s rich protection features including Cycle-by-Cycle current limiting (OCP), Over Load Protection (OLP), over temperature protection (OTP), on-chip VDD over voltage protection (OVP, optional) and under voltage lockout (UVLO). http://www.hgsemi.com.cn 9 2018 MAR HG2269 Important statement: Huaguan Semiconductor Co,Ltd. reserves the right to change the products and services provided without notice. Customers should obtain the latest relevant information before ordering, and verify the timeliness and accuracy of this information. Customers are responsible for complying with safety standards and taking safety measures when using our products for system design and machine manufacturing to avoid potential risks that may result in personal injury or property damage. Our products are not licensed for applications in life support, military, aerospace, etc., so we do not bear the consequences of the application of these products in these fields. Our documentation is only permitted to be copied without any tampering with the content, so we do not accept any responsibility or liability for the altered documents. http://www.hgsemi.com.cn 10 2018 MAR