PMS154C
8bit OTP Type IO Controller
Datasheet
Version 0.03 – Jan. 24, 2018
Copyright 2018 by PADAUK Technology Co., Ltd., all rights reserved.
6F-6, No.1, Sec. 3, Gongdao 5th Rd., Hsinchu City 30069, Taiwan, R.O.C.
TEL: 886-3-572-8688
www.padauk.com.tw
PMS154C
8bit OTP Type IO Controller
IMPORTANT NOTICE
PADAUK Technology reserves the right to make changes to its products or to terminate
production of its products at any time without notice. Customers are strongly
recommended to contact PADAUK Technology for the latest information and verify
whether the information is correct and complete before placing orders.
PADAUK Technology products are not warranted to be suitable for use in life-support
applications or other critical applications. PADAUK Technology assumes no liability for
such applications. Critical applications include, but are not limited to, those that may
involve potential risks of death, personal injury, fire or severe property damage.
PADAUK Technology assumes no responsibility for any issue caused by a customer’s
product design. Customers should design and verify their products within the ranges
guaranteed by PADAUK Technology. In order to minimize the risks in customers’
products, customers should design a product with adequate operating safeguards.
PMS154C is NOT designed for AC RC step-down powered, high power ripple or high EFT
requirement application. Please do NOT apply PMS154C to those application products.
©Copyright 2018, PADAUK Technology Co. Ltd
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PDK-DS-PMS154C-EN-V003 – Jan. 24, 2018
PMS154C
8bit OTP Type IO Controller
Table of Contents
1.
Features ............................................................................................................................. 10
1.1.
Special Features .................................................................................................................10
1.2.
System Features .................................................................................................................10
1.3.
CPU Features .....................................................................................................................10
1.4.
Package Information ...........................................................................................................10
2.
General Description and Block Diagram ........................................................................ 11
3.
Pin Definition and Functional Description...................................................................... 12
4.
Device Characteristics ..................................................................................................... 17
5.
4.1.
DC/AC Characteristics ........................................................................................................17
4.2.
Absolute Maximum Ratings .................................................................................................18
4.3.
Typical IHRC Frequency vs. VDD (calibrated to 16MHz) .....................................................19
4.4.
Typical ILRC Frequency vs. VDD ........................................................................................19
4.5.
Typical IHRC Frequency vs. Temperature (calibrated to 16MHz) ........................................20
4.6.
Typical ILRC Frequency vs. Temperature ...........................................................................20
4.7.
Typical Operating Current vs. VDD and CLK=IHRC/n .........................................................21
4.8.
Typical Operating Current vs. VDD and CLK=ILRC/n..........................................................21
4.9.
Typical Operating Current vs. VDD and CLK=32KHz EOSC / n (reserved) .........................22
4.10.
Typical Operating Current vs. VDD and CLK=1MHz EOSC / n............................................22
4.11.
Typical Operating Current vs. VDD and CLK=4MHz EOSC / n............................................23
4.12.
Typical IO pull high resistance.............................................................................................23
4.13.
Typical IO input high/low threshold voltage (VIH/VIL) ............................................................24
4.14.
Typical IO driving current (IOH) and sink current (IOL) ...........................................................24
Functional Description ..................................................................................................... 26
5.1.
Program Memory – OTP .....................................................................................................26
5.2.
Boot-Up ...............................................................................................................................26
5.3.
Data Memory – SRAM ........................................................................................................27
5.4.
Oscillator and clock .............................................................................................................27
5.4.1. Internal High RC oscillator and Internal Low RC oscillator ......................................27
5.4.2. IHRC calibration .....................................................................................................27
5.4.3. IHRC Frequency Calibration and System Clock ......................................................28
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8bit OTP Type IO Controller
5.4.4. External Crystal Oscillator.......................................................................................29
5.4.5. System Clock and LVR levels .................................................................................31
5.5.
16-bit Timer (Timer16).........................................................................................................32
5.6.
Watchdog Timer ..................................................................................................................33
5.7.
Interrupt Controller ..............................................................................................................34
5.8.
Power-Save and Power-Down ............................................................................................37
5.8.1. Power-Save mode (“stopexe”) ................................................................................37
5.8.2. Power-Down mode (“stopsys”)................................................................................38
5.8.3. Wake-up .................................................................................................................39
5.9.
IO Pins ................................................................................................................................40
5.10.
Reset ..................................................................................................................................41
5.10.1. Reset ......................................................................................................................41
5.10.2. LVR reset ...............................................................................................................41
5.11.
VDD/2 Bias Voltage Generator............................................................................................41
5.12.
Comparator .........................................................................................................................42
5.12.1. Internal reference voltage (Vinternal R) ........................................................................42
5.12.2. Using the comparator .............................................................................................45
5.12.3. Using the comparator and band-gap 1.20V ............................................................45
5.13.
8-bit Timer with PWM generation (Timer2, Timer3) .............................................................47
5.13.1. Using the Timer2 to generate periodical waveform .................................................48
5.13.2. Using the Timer2 to generate 8-bit PWM waveform ................................................49
5.13.3. Using the Timer2 to generate 6-bit PWM waveform ................................................50
5.14.
11-bit PWM generation........................................................................................................52
5.14.1. PWM Waveform .....................................................................................................52
5.14.2. Hardware and Timing Diagram ...............................................................................52
5.14.3. Equations for 11-bit PWM Generator ......................................................................53
6.
IO Registers ....................................................................................................................... 54
6.1.
ACC Status Flag Register (flag), IO address = 0x00 ...........................................................54
6.2.
Stack Pointer Register (sp), IO address = 0x02 ...................................................................54
6.3.
Clock Mode Register (clkmd), IO address = 0x03................................................................54
6.4.
Interrupt Enable Register (inten), IO address = 0x04...........................................................55
6.5.
Interrupt Request Register (intrq), IO address = 0x05 .........................................................55
6.6.
Timer 16 mode Register (t16m), IO address = 0x06 ............................................................56
6.7.
External Oscillator setting Register (eoscr, write only), IO address = 0x0a ..........................56
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PMS154C
8bit OTP Type IO Controller
6.8.
Interrupt Edge Select Register (integs), IO address = 0x0c .................................................57
6.9.
Port A Digital Input Enable Register (padier), IO address = 0x0d ........................................57
6.10.
Port B Digital Input Enable Register (pbdier), IO address = 0x0e ........................................57
6.11.
Port A Data Registers (pa), IO address = 0x10 ...................................................................57
6.12.
Port A Control Registers (pac), IO address = 0x11 ..............................................................57
6.13.
Port A Pull-High Registers (paph), IO address = 0x12 .........................................................57
6.14.
Port B Data Registers (pb), IO address = 0x14 ...................................................................58
6.15.
Port B Control Registers (pbc), IO address = 0x15 ..............................................................58
6.16.
Port B Pull-High Registers (pbph), IO address = 0x16 .........................................................58
6.17.
MISC Register (misc), IO address = 0x08 ...........................................................................58
6.18.
Timer2 Control Register (tm2c), IO address = 0x1c.............................................................59
6.19.
Timer2 Counter Register (tm2ct), IO address = 0x1d ..........................................................59
6.20.
Timer2 Scalar Register (tm2s), IO address = 0x17 ..............................................................59
6.21.
Timer2 Bound Register (tm2b), IO address = 0x09 .............................................................60
6.22.
Timer3 Control Register (tm3c), IO address = 0x32 ............................................................60
6.23.
Timer3 Counter Register (tm3ct), IO address = 0x33 ..........................................................60
6.24.
Timer3 Scalar Register (tm3s), IO address = 0x34 ..............................................................61
6.25.
Timer3 Bound Register (tm3b), IO address = 0x35 .............................................................61
6.26.
Comparator Control Register (gpcc), IO address = 0x18 .....................................................61
6.27.
Comparator Selection Register (gpcs), IO address = 0x19 ..................................................62
6.28.
PWMG0 control Register (pwmg0c), IO address = 0x20 .....................................................62
6.29.
PWMG0 Scalar Register (pwmg0s), IO address = 0x21 ......................................................62
6.30.
PWMG0 Counter Upper Bound High Register (pwmg0cubh), IO address = 0x24 ...............63
6.31.
PWMG0 Counter Upper Bound Low Register (pwmg0cubl), IO address = 0x25 .................63
6.32.
PWMG0 Duty Value High Register (pwmg0dth), IO address = 0x22 ...................................63
6.33.
PWMG0 Duty Value Low Register (pwmg0dtl), IO address = 0x23 .....................................63
6.34.
PWMG1 control Register (pwmg1c), IO address = 0x26 .....................................................63
6.35.
PWMG1 Scalar Register (pwmg1s), IO address = 0x27 ......................................................64
6.36.
PWMG1 Counter Upper Bound High Register (pwmg1cubh), IO address = 0x2a ...............64
6.37.
PWMG1 Counter Upper Bound Low Register (pwmg1cubl), IO address = 0x2b .................64
6.38.
PWMG1 Duty Value High Register (pwmg1dth), IO address = 0x28 ...................................64
6.39.
PWMG1 Duty Value Low Register (pwmg1dtl), IO address = 0x29 .....................................64
6.40.
PWMG2 control Register (pwmg2c), IO address = 0x2c......................................................65
6.41.
PWMG2 Scalar Register (pwmg2s), IO address = 0x2d ......................................................65
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PMS154C
8bit OTP Type IO Controller
7.
6.42.
PWMG2 Counter Upper Bound High Register (pwmg2cubh), IO address = 0x30 ...............65
6.43.
PWMG2 Counter Upper Bound Low Register (pwmg2cubl), IO address = 0x31 .................65
6.44.
PWMG2 Duty Value High Register (pwmg2dth), IO address = 0x2e ...................................65
6.45.
PWMG2 Duty Value Low Register (pwmg2dtl), IO address = 0x2f ......................................66
Instructions ....................................................................................................................... 66
7.1.
Data Transfer Instructions ...................................................................................................67
7.2.
Arithmetic Operation Instructions ........................................................................................70
7.3.
Shift Operation Instructions .................................................................................................72
7.4.
Logic Operation Instructions ................................................................................................73
7.5.
Bit Operation Instructions ....................................................................................................75
7.6.
Conditional Operation Instructions.......................................................................................77
7.7.
System control Instructions .................................................................................................79
7.8.
Summary of Instructions Execution Cycle ...........................................................................80
7.9.
Summary of affected flags by Instructions ...........................................................................81
8.
Code Options .................................................................................................................... 82
9.
Special Notes .................................................................................................................... 83
9.1.
Warning...............................................................................................................................83
9.2.
Using IC ..............................................................................................................................83
9.2.1. IO pin usage and setting .........................................................................................83
9.2.2. Interrupt ..................................................................................................................83
9.2.3. System clock switching ...........................................................................................84
9.2.4. Watchdog ...............................................................................................................84
9.2.5. TIMER16 time out ...................................................................................................84
9.2.6. IHRC Calibration .....................................................................................................84
9.2.7. LVR ........................................................................................................................84
9.2.8. Instructions .............................................................................................................85
9.2.9. BIT definition...........................................................................................................85
9.2.10. Program writing ......................................................................................................85
9.3.
Using ICE ............................................................................................................................86
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PMS154C
8bit OTP Type IO Controller
Revision History:
Revision
Date
0.01
2017/07/03
0.02
2017/11/23
Description
1st version
1. Amend register modify : pwmg0c, pwmg1c, pwmg2c
2. Amend S154C-U06: SOT23-6 pin assignment
3. Amend Chapter 3 Pin Definition and Functional Description
4. Amend Section 4.1 DC/AC Characteristics
5. Amend Section 4.13 Typical IO input high/low threshold voltage (VIH/VIL)
6. Amend Section 5.1 Program Memory – OTP
7. Amend Table2: Three Oscillator Circuits provided by PMS154C
8. Amend Section 5.4.1 Internal High RC oscillator and Internal Low RC oscillator
9. Amend Section 5.4.3 IHRC Frequency Calibration and System Clock
10. Amend Section 5.4.4 External Crystal Oscillator
11. Amend Fig. 3 Options of System Clock
12. Amend Section 5.6 Watchdog Timer
13. Amend Section 5.8.1 Power-Save mode
14. Amend Section 5.8.2 Power-Down mode
15. Amend Section 5.14.3 Equations for 11-bit PWM Generator
16. Amend Section 6.3 Clock Mode Register
17. Amend Section 6.9 Port A Digital Input Enable Register
18. Amend Section 6.10 Port B Digital Input Enable Register
19. Amend Section 6.11 Port A Data Registers
20. Amend Section 6.12 Port A Control Registers
21. Amend Section 6.13 Port A Pull-High Registers
22. Amend Section 6.14 Port B Data Registers
23. Amend Section 6.15 Port B Control Registers
24. Amend Section 6.16 Port B Pull-High Registers
25. Amend Section 6.17 MISC Register
26. Amend Section 6.26 Comparator Control Register
27. Amend Section 6.28 PWMG0 control Register
28. Amend Section 6.34 PWMG1 control Register
29. Amend Section 6.36 PWMG1 Counter Upper Bound High Register
30. Amend Section 6.37 PWMG1 Counter Upper Bound Low Register
31. Amend Section 6.38 PWMG1 Duty Value High Register
32. Amend Section 6.39 PWMG1 Duty Value Low Register
33. Amend Section 6.40 PWMG2 control Register
34. Amend Section 6.42 PWMG2 Counter Upper Bound High Register
35. Amend Section 6.43 PWMG2 Counter Upper Bound Low Register
36. Amend Section 6.44 PWMG2 Duty Value High Register
37. Amend Section 6.45 PWMG2 Duty Value Low Register
38. Delete the Symbol “pc0” in Chapter 7
39. Add the Symbol “IO.n” in Chapter 7
40. Amend the instruction cneqsn a, I in Section 7.9
41. Amend Chapter 8 Code Options
42. Amend Section 9.2.1 IO pin usage and setting
43. Amend Section 9.2.7 LVR
44. Amend Section 9.2.9 BIT definition
45. Amend Section 9.2.10 Program writing
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PMS154C
8bit OTP Type IO Controller
46. Amend Section 9.3 Using ICE
1. Amend the address and phone number of PADAUK Technology Co.,Ltd.
2. Amend Section 1.3: CPU Features
3. Amend Chapter 3 Pin Definition and Functional Description: PA5
4. Amend Section 5.4.3 IHRC Frequency Calibration and System Clock
5. Amend Section 5.4.4 External Crystal Oscillator
0.03
2018/01/24
6. Amend Section 5.4.5 System Clock and LVR levels
7. Amend Section 5.7. Interrupt Controller
8. Amend Section 5.8.1 Power-Save mode
9. Amend Section 5.8.2 Power-Down mode
10. Amend Section 5.8.3 Wake-up
11.
12.
13.
14.
Amend Section 5.12.2 Using the comparator
Amend Section 5.12.3 Using the comparator and band-gap 1.20V
Amend Section 6.27. Comparator Selection Register (gpcs), IO address = 0x19
Amend Section 9.3. Using ICE
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PMS154C
8bit OTP Type IO Controller
Major Differences between PMS154B and PMS154C
Item
Function
PMS154B
PMS154C
1
Operating voltage range
2.2V ~ 5.5V
1.8V ~ 5.5V
One Set :
Three Sets:
2
11-bit PWM
PWMG0
PWMG0, PWMG1 & PWMG2
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PMS154C
8bit OTP Type IO Controller
1. Features
1.1. Special Features
Please don’t apply to AC RC step-down powered, high power ripple or high EFT requirement application
Operating temperature range: -20°C ~ 70°C
1.2. System Features
2KW OTP program memory
128 Bytes data RAM
One hardware 16-bit timer
Two hardware 8-bit timer with PWM generators
Three hardware 11-bit PWM generators
Provide one hardware comparator
14 IO pins with optional pull-high resistor
Three different IO driving capability groups to meet different application requirement
Optional IO driving capability for each port：normal drive and low drive
Every IO pin can be configured to enable wake-up function
Built-in half VDD bias voltage generator to provide maximum 4x10 dots LCD display
1
Clock sources: IHRC, ILRC & EOSC(XTAL mode, 32KHz Reserved )
For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast
Eight levels of LVR: 4.0V, 3.5V, 3.0V, 2.75V, 2.5V, 2.2V, 2.0V, 1.8V
Two external interrupt pins
1.3. CPU Features
One processing unit operating mode
86 powerful instructions
Most instructions are 1T execution cycle
Programmable stack pointer and adjustable stack level
Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of
Indirect addressing mode
IO space and memory space are independent
1.4. Package Information
PMS154C series
◎ PMS154C-U06: SOT23-6 (60mil)
◎ PMS154C-S08: SOP8 (150mil)
◎ PMS154C-M10: MSOP10 (118mil)
◎ PMS154C-S14: SOP14 (150mil)
◎ PMS154C-S16: SOP16 (150mil)
◎ PMS154C-D16: DIP16 (300mil)
◎ PMS154C-1J16A: QFN3*3-16pin (0.5pitch)
1
Please contact our sales representative.
©Copyright 2018, PADAUK Technology Co. Ltd
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PMS154C
8bit OTP Type IO Controller
2. General Description and Block Diagram
The PMS154C is an IO-Type, fully static, OTP-based controller; it employs RISC architecture and most the
instructions are executed in one cycle except that few instructions are two cycles that handle indirect memory
access. 2KW OTP program memory and 128 bytes data SRAM are inside, one hardware 16-bit timer, two
hardware 8-bit timers with PWM generation (Timer2, Timer3) and Three hardware 11-bit timers with PWM
generation (PWMG0,1,2) is also included, PMS154C also supports one hardware comparator and VDD/2 bias
voltage generator for LCD display application.
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PDK-DS-PMS154C-EN-V003 – Jan. 24, 2018
PMS154C
8bit OTP Type IO Controller
3. Pin Definition and Functional Description
PB4/TM2PWM/PG0PWM
1
16
PB3/PG2PWM
PB5/TM3PWM/PG0PWM
2
15
PB2/TM2PWM/PG2PWM
PB6/TM3PWM/CIN2-/PG1PWM
3
14
PB1
PB7/TM3PWM/CIN3-/PG1PWM
4
13
PB0/INT1/COM1
VDD
5
12
GND
PA7/X1
6
11
PA0/INT0/COM2/CO/PG0PWM
PA6/X2
7
10
PA4/COM3/CIN+/CIN4-/PG1PWM
PA5/PRST#/PG2PWM
8
9
PA3/TM2PWM/COM4/CIN1-/PG2PWM
PMS154C-S16:SOP16 (150mil)
PMS154C-D16:DIP16 (300mil)
PMS154C-1J16A: QFN3*3-16pin (0.5pitch)
PB5/TM3PWM/PG0PWM
1
14
PB2/TM2PWM/PG2PWM
PB6/TM3PWM/CIN2-/PG1PWM
2
13
PB1
PB7/TM3PWM/CIN3-/PG1PWM
3
12
PB0/INT1/COM1
VDD
4
11
GND
PA7/X1
5
10
PA0/INT0/COM2/CO/PG0PWM
PA6/X2
6
9
PA4/COM3/CIN+/CIN4-/PG1PWM
PA5/PRST#/PG2PWM
7
8
PA3/TM2PWM/COM4/CIN1-/PG2PWM
PMS154C-S14:SOP14 (150mil)
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PDK-DS-PMS154C-EN-V003 – Jan. 24, 2018
PMS154C
8bit OTP Type IO Controller
PB7/TM3PWM/CIN3-/PG1PWM
1
10 PB0/INT1/COM1
VDD
2
9
GND
PA7/X1
3
8
PA0/INT0/COM2/CO/PG0PWM
PA6/X2
4
7
PA4/COM3/CIN+/CIN4-/
PA5/PRST#/PG2PWM
5
6
PA3/TM2PWM/COM4/CIN1-/PG2PW
PMS154C-M10: MSOP10 (118mil)
PMS154C-S08: SOP8 (150mil)
PMS154C-U06: SOT23-6 (60mil)
Pin Name
Pin & Buffer
Description
Type
This pin can be used as:
(1) Bit 7 of port A. It can be configured as digital input, two-state output with pull-up
PA7 /
X1
IO
ST /
CMOS
resistor by software independently.
(2) X1 when crystal oscillator is used.
When this pin is configured as crystal oscillator function, please use bit 7 of
register padier to disable the digital input to prevent current leakage. This pin can
be used to wake-up system during sleep mode; however, wake-up function is also
disabled if bit 7 of padier register is “0”.
This pin can be used as:
(1) Bit 6 of port A. It can be configured as digital input, two-state output with pull-up
IO
PA6 /
ST /
X2
CMOS
resistor by software independently.
(2) X2 when crystal oscillator is used.
When this pin is configured as crystal oscillator function, please use bit 6 of
register padier to disable the digital input to prevent current leakage. This pin can
be used to wake-up system during sleep mode; however, wake-up function is also
disabled if bit 6 of padier register is “0”.
©Copyright 2018, PADAUK Technology Co. Ltd
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PDK-DS-PMS154C-EN-V003 – Jan. 24, 2018
PMS154C
8bit OTP Type IO Controller
Pin Name
Pin & Buffer
Description
Type
This pin can be used as:
(1) Bit 5 of port A. It can be configured as digital input, open drain output with
pull-up resistor by software independently.
PA5 /
IO
PRST# /
ST /
PG2PWM
CMOS
(2) Hardware reset
(3) Output of 11-bit PWM generator PWMG2. (ICE does NOT Support.)
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 5 of padier register is “0”.
Please put 33Ω resistor in series to have high noise immunity when this pin is in
input mode.
This pin can be used as:
(1) Bit 3 of port A. It can be configured as digital input, two-state output with pull-up
PA4 /
COM3 /
CIN+ /
CIN4- /
IO
ST /
CMOS
PG1PWM
resistor by software independently.
(2) COM3 to provide (1/2 VDD) for LCD display
(3) Plus input source of comparator
(4) Minus input source 4 of comparator
(5) Output of 11-bit PWM generator PWMG2
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 4 of padier register is “0”.
This pin can be used as:
(1) Bit 3 of port A. It can be configured as digital input, two-state output with pull-up
PA3 /
TM2PWM /
COM4 /
CIN1- /
IO
ST /
CMOS
PG2PWM
resistor by software independently.
(2) Minus input source 1 of comparator
(3) Output of 8-bit Timer2 (TM2)
(4) COM4 to provide (1/2 VDD) for LCD display
(5) Output of 11-bit PWM generator PWMG2
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 3 of padier register is “0”.
This pin can be used as:
(1) Bit 0 of port A. It can be configured as digital input, two-state output with
PA0 /
INT0 /
PG0PWM /
CO /
COM2
pull-up resistor by software independently.
IO
ST /
CMOS
(2) External interrupt line 0. Both rising edge and falling edge are accepted to
request interrupt service.
(3) Output of comparator
(4) Output of 11-bit PWM generator PWMG0
(5) COM2 to provide (1/2 VDD) for LCD display
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 0 of padier register is “0”.
©Copyright 2018, PADAUK Technology Co. Ltd
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PDK-DS-PMS154C-EN-V003 – Jan. 24, 2018
PMS154C
8bit OTP Type IO Controller
Pin Name
Pin & Buffer
Description
Type
This pin can be used as:
(1) Bit 7 of port B. It can be configured as digital input, two-state output with pull-up
PB7 /
IO
TM3PWM /
ST /
CIN3- /
CMOS
PG1PWM
resistor by software independently.
(2) Minus input source 3 of comparator.
(3) Output of 8-bit timer Timer3 (TM3)
(4) Output of 11-bit PWM generator PWMG1
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 7 of pbdier register is “0”.
This pin can be used as:
(1) Bit 6 of port B. It can be configured as digital input, two-state output with pull-up
PB6 /
IO
TM3PWM /
ST /
CIN2- /
CMOS
PG1PWM
resistor by software independently.
(2) Minus input source 2 of comparator.
(3) Output of 8-bit timer Timer3 (TM3)
(4) Output of 11-bit PWM generator PWMG1
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 6 of pbdier register is “0”.
This pin can be used as:
PB5 /
TM3PWM /
PG0PWM
IO
ST /
CMOS
(1) Bit 5 of port B. It can be configured as digital input, two-state output with pull-up
resistor by software independently.
(2) Output of 8-bit timer Timer3 (TM3)
(3) Output of 11-bit PWM generator PWMG0
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 5 of pbdier register is “0”.
This pin can be used as:
PB4 /
TM2PWM /
PG0PWM
IO
ST /
CMOS
(1) Bit 4 of port B. It can be configured as digital input, two-state output with pull-up
resistor by software independently.
(2) Output of 8-bit timer Timer2 (TM2)
(3) Output of 11-bit PWM generator PWMG0
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 4 of pbdier register is “0”.
This pin can be used as:
IO
PB3 /
ST /
PG2PWM
CMOS
(1) Bit 3 of port B. It can be configured as digital input, two-state output with pull-up
resistor by software independently.
(2) Output of 11-bit PWM generator PWMG2
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 3 of pbdier register is “0”.
©Copyright 2018, PADAUK Technology Co. Ltd
Page 15 of 86
PDK-DS-PMS154C-EN-V003 – Jan. 24, 2018
PMS154C
8bit OTP Type IO Controller
Pin Name
Pin & Buffer
Description
Type
This pin can be used as:
PB2 /
TM2PWM /
PG2PWM
(1) Bit 2 of port B. It can be configured as digital input, two-state output with pull-up
IO
ST /
CMOS
resistor by software independently.
(2) Output of 8-bit timer Timer2 (TM2)
(3) Output of 11-bit PWM generator PWMG2
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 2 of pbdier register is “0”.
This pin can be used as:
IO
PB1
ST /
CMOS
(1) Bit 1 of port B. It can be configured as digital input, two-state output with pull-up
resistor by software independently.
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 1 of pbdier register is “0”.
This pin can be used as:
(1) Bit 0 of port A. It can be configured as digital input, two-state output with
PB0 /
INT1 /
COM1
IO
pull-up resistor by software independently.
ST /
CMOS
(2) External interrupt line 1. Both rising edge and falling edge are accepted to
request interrupt service.
(3) COM1 to provide (1/2 VDD) for LCD display
This pin can be used to wake-up system during sleep mode; however, wake-up
function is also disabled if bit 0 of pbdier register is “0”.
VDD
Positive power
GND
Ground
Notes: IO: Input/Output;
ST: Schmitt Trigger input;
©Copyright 2018, PADAUK Technology Co. Ltd
CMOS: CMOS voltage level
Page 16 of 86
PDK-DS-PMS154C-EN-V003 – Jan. 24, 2018
PMS154C
8bit OTP Type IO Controller
4. Device Characteristics
4.1. DC/AC Characteristics
All data are acquired under the conditions of VDD=3.3V, fSYS=2MHz unless noted.
Symbol
Max
Unit
1.8*
5.5
V
Low Voltage Reset tolerance
-5
5
%
fSYS
System clock (CLK)* =
IHRC/2
IHRC/4
IHRC/8
ILRC
0
0
0
8M
4M
2M
VPOR
Power On Reset Voltage
VDD
LVR%
Description
Operating Voltage
Min
Typ
70K
1.9
2.0
2.1
Operating Current
* Subject to LVR tolerance
VDD ≧ 3.5V
VDD ≧ 2.5V
VDD ≧ 1.8V
VDD = 3V
12
V
mA fSYS=IHRC/16=1MIPS@3V
uA fSYS=ILRC=70KHz@3V
10
uA
0.3
IOP
Hz
o
Conditions(Ta=25 C)
fSYS=EOSC=32KHz@3V
(reserved)
IPD
Power Down Current
(by stopsys command)
Power Save Current
0.5
uA
fSYS= 0Hz, VDD =3.3V
5
uA
VDD =3.3V
IPS
(by stopexe command)
VIL
*Disable IHRC
Input low voltage for IO lines
0
0.2 VDD
Input high voltage for IO lines
0
0.7 VDD
0.1 VDD
VDD
VIH
PA5
V
other IO
IO lines sink current (normal)
IOL
*PA0,PA3,PA4,PB2,PB5,PB6
10
*PA6,PA7,PB0,PB1,PB3,PB4,PB7
6
*PA5
5
mA VDD=3.3V, VOL=0.33V
IO lines sink current (low)
IOH
VIN
IINJ (PIN)
RPH
fIHRC
*PA5
5
*Others
2
IO lines drive current (normal)
-5
IO lines drive current (low)
Input voltage
-0.3
VDD + 0.3
1
200
15.84*
16.16*
15.20*
16.80*
16*
13.60*
tINT
Interrupt pulse width
©Copyright 2018, PADAUK Technology Co. Ltd
mA VDD=3.3V, VOH=2.97V
-1.6
Injected current on pin
Pull-high Resistance
Frequency of IHRC after calibration *
mA VDD=3.3V, VOL=0.33V
30
Page 17 of 86
V
mA VDD +0.3≧VIN≧ -0.3
KΩ VDD=3.3V
o
VDD=5V, Ta=25 C
VDD =2.0V~5.5V,
MHz -20oC
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