BSH103,215

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Thank you for your cooperation and understanding, Kind regards, Team Nexperia DISCRETE SEMICONDUCTORS DATA SHEET andbook, halfpage M3D088 BSH103 N-channel enhancement mode MOS transistor Product specification Supersedes data of 1998 Jan 30 File under Discrete Semiconductors, SC13b 1998 Feb 11 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 FEATURES PINNING - SOT23 • Very low threshold PIN SYMBOL • High-speed switching DESCRIPTION 1 g gate • No secondary breakdown 2 s source • Direct interface to C-MOS, TTL etc. 3 d drain APPLICATIONS • Power management handbook, halfpage 3 d • DC to DC converters • Battery powered applications • ‘Glue-logic’; interface between logic blocks and/or periphery g • General purpose switch. s 1 2 Top view MAM273 DESCRIPTION N-channel enhancement mode MOS transistor in a SOT23 SMD package. Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL PARAMETERS CONDITIONS MIN. MAX. UNIT − 30 V − 1 V − ±8 V VDS = VGS ; ID = 1 mA 0.4 − V drain current (DC) Ts = 80 °C − 0.85 A drain-source on-state resistance VGS = 2.5 V; ID = 0.5 A − 0.5 Ω total power dissipation Ts = 80 °C − 0.5 W VDS drain-source voltage (DC) VSD source-drain diode forward voltage VGS gate-source voltage (DC) VGSth gate-source threshold voltage ID RDSon Ptot VGD = 0; IS = 0.5 A CAUTION This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B. 1998 Feb 11 2 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) − 30 V VGS gate-source voltage (DC) − ±8 V ID drain current (DC) Ts = 80 °C; note 1 − 0.85 A IDM peak drain current note 2 − 3.4 A Ptot total power dissipation Ts = 80 °C − 0.5 W Tamb = 25 °C; note 3 − 0.75 W Tamb = 25 °C; note 4 − 0.54 W Tstg storage temperature −55 +150 °C Tj operating junction temperature −55 +150 °C Source-drain diode IS source current (DC) Ts = 80 °C − 0.5 A ISM peak pulsed source current note 2 − 2 A Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. 3. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 27.5 K/W. 4. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W. MBK502 MGM190 0.6 10 handbook, halfpage handbook, halfpage IDS Ptot (A) (W) (2) 1 (1) 0.4 10−1 tp δ= T P 0.2 DC 10−2 t tp 10−3 10−1 0 0 40 80 120 Ts (°C) 160 T 1 10 δ = 0.01; Ts = 80 °C. (1) RDSon limitation. (2) Pulsed. Fig.2 Power derating curve. 1998 Feb 11 Fig.3 SOAR. 3 VDS (V) 102 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT 140 K/W thermal resistance from junction to soldering point Rth j-s MBK503 103 handbook, full pagewidth Rth j-s (K/W) δ=1 0.75 102 0.5 0.33 0.2 0.1 10 δ= P 0.05 tp T 0.02 t tp 0.01 T 1 10−6 Fig.4 0 10−5 10−4 10−3 10−2 10−1 tp (s) 1 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values. 1998 Feb 11 4 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage VGS = 0; ID = 10 µA 30 − − V VGSth gate-source threshold voltage VGS = VDS ; ID = 1 mA 0.4 − − V IDSS drain-source leakage current VGS = 0; VDS = 24 V − − 100 nA IGSS gate leakage current VGS = ±8 V; VDS = 0 − − ±100 nA RDSon drain-source on-state resistance VGS = 4.5 V; ID = 0.5 A − − 0.4 Ω VGS = 2.5 V; ID = 0.5 A − − 0.5 Ω VGS = 1.8 V; ID = 0.25 A − − 0.6 Ω Ciss input capacitance VGS = 0; VDS = 24 V; f = 1 MHz − 83 − pF Coss output capacitance VGS = 0; VDS = 24 V; f = 1 MHz − 27 − pF Crss reverse transfer capacitance VGS = 0; VDS = 24 V; f = 1 MHz − 14 − pF QG total gate charge VGS = 4.5 V; VDD = 15 V; ID = 0.5 A; Tamb = 25 °C − 2100 − pC QGS gate-source charge VDD = 15 V; ID = 0.5 A; Tamb = 25 °C − 95 − pC QGD gate-drain charge VDD = 15 V; ID = 0.5 A; Tamb = 25 °C − 670 − pC Switching times td(on) turn-on delay time VGS = 0 to 8 V; VDD = 15 V; ID = 0.5 A; Rgen = 6 Ω − 2.5 − ns tf fall time VGS = 0 to 8 V; VDD = 15 V; ID = 0.5 A; Rgen = 6 Ω − 3.5 − ns ton turn-on switching time VGS = 0 to 8 V; VDD = 15 V; ID = 0.5 A; Rgen = 6 Ω − 6 − ns td(off) turn-off delay time VGS = 8 to 0 V; VDD = 15 V; ID = 0.5 A; Rgen = 6 Ω − 20 − ns tr rise time VGS = 8 to 0 V; VDD = 15 V; ID = 0.5 A; Rgen = 6 Ω − 7 − ns toff turn-off switching time VGS = 8 to 0 V; VDD = 15 V; ID = 0.5 A; Rgen = 6 Ω − 27 − ns Source-drain diode VSD source-drain diode forward voltage VGD = 0; IS = 0.5 A − − 1 V trr reverse recovery time IS = 0.5 A; di/dt = −100 A/µs − 25 − ns 1998 Feb 11 5 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor handbook, full pagewidth BSH103 VDD 90 % Vin RL 10 % 0 Vout 90 % Vout Vin 10 % 0 td(off) td(on) tf MAM274 tr ton toff Fig.5 Switching times test circuit with input and output waveforms. MBK507 5 handbook, halfpage 16 VGS 14 (V) MBK505 4 handbook, halfpage (1)(2) (3)(4) (5) VDS ID (A) (V) 4 (6) 3 12 10 3 (7) 2 8 (1) (2) 2 6 1 (8) 4 1 (9) 2 0 0 2 4 6 8 QG (pC) Tamb = 25 °C; tp = 300 µs; δ = 0. (1) (2) (3) (4) VDD = 15 V; ID = 0.5 A; Tamb = 25 °C. (1) VDS. (2) VGS. Fig.6 Gate-source and drain-source voltages as functions of total gate charge; typical values. 1998 Feb 11 10 VDS (V) 2200 2000 1800 1800 1600 1000 1000 800 600 400 200 0 0 0 VGS = 7.5 V. VGS = 5.5 V. VGS = 4.5 V. VGS = 3.5 V. Fig.7 6 (5) (6) (7) (8) VGS = 3 V. VGS = 2.5 V. VGS = 2 V. VGS = 1.5 V. (9) VGS = 1 V. Output characteristics; typical values. Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 MBK506 4 MBK504 300 handbook, halfpage handbook, halfpage ID (A) C (pF) 3 200 2 100 Ciss 1 Coss Crss 0 0 0 1 2 VGS (V) 0 3 20 VDS (V) 30 VGS = 0 ; f = 1 MHz; Tamb = 25 °C. VDS = 10 V; Tamb = 25 °C; tp = 300 µs; δ = 0. Fig.9 Fig.8 10 Capacitance as a function of drain-source voltage; typical values. Transfer characteristic; typical values. MBK508 2 MBK509 10 handbook, halfpage handbook, halfpage IS (A) RDSon 1.6 (Ω) (1) (2) (3) (4) 1.2 (5) (6) 1 0.8 (1) (2) (3) 0.4 0 10−1 0 0.4 0.8 VSD (V) 1.2 0 2 4 VGD = 0. Tamb = 25 °C; tp = 300 µs; δ = 0. (1) Tamb = 150 °C. (2) Tamb = 25 °C. (3) Tamb = −65 °C. (1) ID = 0.1 A. (2) ID = 0.22 A. (3) ID = 0.45 A. Fig.10 Source current as a function of source-drain diode forward voltage; typical values. 1998 Feb 11 6 8 10 VGS (V) (4) ID = 0.9 A. (5) ID = 1.8 A. (6) ID = 3.6 A. Fig.11 Drain-source on-state resistance as a function of gate-source voltage; typical values. 7 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 MBK510 MBK511 1.6 1.2 handbook, halfpage handbook, halfpage (1) k k (2) 1.2 0.8 0.8 0.4 0.4 0 −65 −15 V GSth at T j k = -------------------------------------. V GSth at 25°C 35 85 135 0 −65 185 Tj (°C) R DSon at T j k = ---------------------------------------- . R DSon at 25 °C VGSth at VDS = VGS; ID = 1 mA. Fig.12 Temperature coefficient of gate-source threshold voltage as a function of junction temperature; typical values. 1998 Feb 11 −15 35 85 135 185 Tj (°C) (1) RDSon at VGS = 4.5 V; ID = 0.5 mA. (2) RDSon at VGS = 2.5 V; ID = 0.5 mA. Fig.13 Temperature coefficient of drain-source on-resistance as a function of junction temperature; typical values. 8 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 PACKAGE OUTLINE Plastic surface mounted package; 3 leads SOT23 D E B A X HE v M A 3 Q A A1 1 2 e1 bp c w M B Lp e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max. bp c D E e e1 HE Lp Q v w mm 1.1 0.9 0.1 0.48 0.38 0.15 0.09 3.0 2.8 1.4 1.2 1.9 0.95 2.5 2.1 0.45 0.15 0.55 0.45 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 97-02-28 SOT23 1998 Feb 11 EUROPEAN PROJECTION 9 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 DEFINITIONS Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Feb 11 10 Philips Semiconductors Product specification N-channel enhancement mode MOS transistor BSH103 NOTES 1998 Feb 11 11 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 135108/00/04/pp12 Date of release: 1998 Feb 11 Document order number: 9397 750 03303