74LVC1G80GW-Q100,1

74LVC1G80-Q100 Single D-type flip-flop; positive-edge trigger Rev. 3 — 31 January 2022 Product data sheet 1. General description The 74LVC1G80-Q100 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and -40 °C to +125 °C Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity ±24 mA output drive (VCC = 3.0 V) CMOS low power dissipation Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA Complies with JEDEC standard: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) • JESD36 (4.5 V to 5.5 V) ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G80GW-Q100 -40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 74LVC1G80GV-Q100 -40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 4. Marking Table 2. Marking codes Type number Marking[1] 74LVC1G80GW-Q100 VT 74LVC1G80GV-Q100 V80 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 D Q 4 1 2 CP 2 D CP 001aac523 mna649 Fig. 1. 4 Logic symbol Fig. 2. CP IEC logic symbol C C D C C TG TG C C Fig. 3. Q C C TG TG C C mna651 Logic diagram 6. Pinning information 6.1. Pinning 74LVC1G80 D 1 CP 2 GND 3 5 VCC 4 Q 001aab662 Fig. 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 2 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 6.2. Pin description Table 3. Pin description Symbol Pin Description D 1 data input CP 2 clock pulse input GND 3 ground (0 V) Q 4 data output VCC 5 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; X = don’t care; q = lower case letter indicates the state of referenced input, one set-up time prior to the LOW-to-HIGH CP transition. Output Input CP D Q ↑ L H ↑ H L L X q 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 3 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current VO > VCC or VO < 0 V VO output voltage Active mode Power-down mode; VCC = 0 V Min Max Unit -0.5 +6.5 V -50 - -0.5 +6.5 V - ±50 mA [1] -0.5 VCC + 0.5 V [1] -0.5 +6.5 V - ±50 mA VI < 0 V [1] IO output current ICC supply current - 100 mA IGND ground current -100 - mA Ptot total power dissipation - 250 mW Tstg storage temperature -65 +150 °C [1] [2] VO = 0 V to VCC mA Tamb = -40 °C to +125 °C [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT353-1 (TSSOP5) package: Ptot derates linearly with 3.3 mW/K above 74 °C. For SOT753 (SC-74A) package: Ptot derates linearly with 3.8 mW/K above 85 °C. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 1.65 - 5.5 V VI input voltage 0 - 5.5 V VO output voltage Active mode 0 - VCC V Power-down mode; VCC = 0 V 0 - 5.5 V -40 - +125 °C VCC = 1.65 V to 2.7 V - - 20 ns/V VCC = 2.7 V to 5.5 V - - 10 ns/V Tamb ambient temperature Δt/ΔV input transition rise and fall rate 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 4 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 10. Static characteristics Table 7. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ[1] Max Unit 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7 × VCC - - V VCC = 1.65 V to 1.95 V - - VCC = 2.3 V to 2.7 V - - VCC = 2.7 V to 3.6 V - VCC = 4.5 V to 5.5 V - Tamb = -40 °C to +85 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 1.65 V to 1.95 V 0.7 V - 0.8 V - 0.3 × VCC V VCC - 0.1 - - V IO = -4 mA; VCC = 1.65 V 1.2 - - V IO = -8 mA; VCC = 2.3 V 1.9 - - V IO = -12 mA; VCC = 2.7 V 2.2 - - V IO = -24 mA; VCC = 3.0 V 2.3 - - V IO = -32 mA; VCC = 4.5 V 3.8 - - V IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.45 V IO = 8 mA; VCC = 2.3 V - - 0.3 V IO = 12 mA; VCC = 2.7 V - - 0.4 V IO = 24 mA; VCC = 3.0 V - - 0.55 V IO = 32 mA; VCC = 4.5 V VI = VIH or VIL IO = -100 μA; VCC = 1.65 V to 5.5 V VOL LOW-level output voltage 0.35 × VCC V VI = VIH or VIL - - 0.55 V II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - ±0.1 ±1 μA IOFF power-off leakage current VCC = 0 V; VI or VO = 5.5 V - ±0.1 ±2 μA ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A - 0.1 4 μA ΔICC additional supply current per pin; VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A - 5 500 μA CI input capacitance VCC = 3.3 V; VI = GND to VCC - 5 - pF 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 5 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger Symbol Parameter Conditions Min Typ[1] Max Unit 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - V VCC = 4.5 V to 5.5 V 0.7 × VCC - - V VCC = 1.65 V to 1.95 V - - VCC = 2.3 V to 2.7 V - - VCC = 2.7 V to 3.6 V - VCC = 4.5 V to 5.5 V - Tamb = -40 °C to +125 °C VIH HIGH-level input voltage VIL LOW-level input voltage VOH HIGH-level output voltage VCC = 1.65 V to 1.95 V 0.7 V - 0.8 V - 0.3 × VCC V VCC - 0.1 - - V IO = -4 mA; VCC = 1.65 V 0.95 - - V IO = -8 mA; VCC = 2.3 V 1.7 - - V IO = -12 mA; VCC = 2.7 V 1.9 - - V IO = -24 mA; VCC = 3.0 V 2.0 - - V IO = -32 mA; VCC = 4.5 V 3.4 - - V IO = 100 μA; VCC = 1.65 V to 5.5 V - - 0.1 V IO = 4 mA; VCC = 1.65 V - - 0.70 V IO = 8 mA; VCC = 2.3 V - - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.60 V IO = 24 mA; VCC = 3.0 V - - 0.80 V IO = 32 mA; VCC = 4.5 V VI = VIH or VIL IO = -100 μA; VCC = 1.65 V to 5.5 V VOL LOW-level output voltage 0.35 × VCC V VI = VIH or VIL - - 0.80 V II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - ±1 μA IOFF power-off leakage current VCC = 0 V; VI or VO = 5.5 V - - ±2 μA ICC supply current VI = 5.5 V or GND; VCC = 1.65 V to 5.5 V; IO = 0 A - - 4 μA ΔICC additional supply current per pin; VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A - - 500 μA [1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 6 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7. Symbol Parameter tpd tsu th propagation delay set-up time hold time Conditions -40 °C to +85 °C Min Typ[1] Max Min Max VCC = 1.65 V to 1.95 V 1.0 3.4 9.9 1.0 13.0 ns VCC = 2.3 V to 2.7 V 0.5 2.3 7.0 0.5 9.0 ns VCC = 2.7 V 0.5 2.5 6.0 0.5 8.0 ns VCC = 3.0 V to 3.6 V 0.9 2.4 5.0 0.9 6.5 ns VCC = 4.5 V to 5.5 V 0.5 1.8 4.5 0.5 6.0 ns VCC = 1.65 V to 1.95 V 2.3 0.8 - 2.3 - ns VCC = 2.3 V to 2.7 V 1.5 0.6 - 1.5 - ns VCC = 2.7 V 1.5 0.5 - 1.5 - ns VCC = 3.0 V to 3.6 V 1.3 0.4 - 1.3 - ns VCC = 4.5 V to 5.5 V 1.1 0.5 - 1.1 - ns VCC = 1.65 V to 1.95 V 0 -0.6 - 0 - ns VCC = 2.3 V to 2.7 V 0 -0.4 - 0 - ns +0.5 -0.2 - 0.5 - ns CP to Q; see Fig. 5 [2] HIGH or LOW; D to CP; see Fig. 6 [3] D to CP; see Fig. 6 VCC = 2.7 V tW fmax CPD [1] [2] [3] [4] pulse width maximum frequency power dissipation capacitance -40 °C to +125 °C Unit VCC = 3.0 V to 3.6 V 0.9 0.2 - 0.9 - ns VCC = 4.5 V to 5.5 V +0.5 -0.1 - 0.5 - ns VCC = 1.65 V to 1.95 V 3.0 1.1 - 3.0 - ns VCC = 2.3 V to 2.7 V 2.5 0.7 - 2.5 - ns VCC = 2.7 V 2.5 0.6 - 2.5 - ns VCC = 3.0 V to 3.6 V 2.5 0.6 - 2.5 - ns VCC = 4.5 V to 5.5 V 2.0 0.5 - 2.0 - ns VCC = 1.65 V to 1.95 V 160 300 - 160 - MHz VCC = 2.3 V to 2.7 V 160 350 - 160 - MHz VCC = 2.7 V 160 350 - 160 - MHz VCC = 3.0 V to 3.6 V 160 350 - 160 - MHz VCC = 4.5 V to 5.5 V 200 400 - 200 - MHz - 17 - - - pF CP HIGH or LOW; see Fig. 6 CP; see Fig. 6 VI = GND to VCC; VCC = 3.3 V [4] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. tpd is the same as tPLH and tPHL. tsu is the same as tsu(H) and tsu(L). CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + ∑(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; 2 VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC × fo) = sum of outputs. 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 7 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 11.1. Waveforms and test circuit VI D input GND VI CP input VM VM GND t PLH t PHL VOH VM Q output VM VOL mna652 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output. Fig. 5. Clock (CP) to output (Q) propagation delay times VI VM D input GND th th t su(L) 1/fmax t su(H) VI CP input VM GND tW t PLH t PHL VOH VM Q output VOL mna653 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig. 6. Clock (CP) to output (Q) propagation delay times, clock pulse width, D to set-up times, the CP to D hold times and maximum clock pulse frequency Table 9. Measurement points Supply voltage Input Output VCC VM VM 1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC 2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × VCC 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 8 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger VEXT VCC G VI RL VO DUT RT CL RL mna616 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance; CL = Load capacitance including jig and probe capacitance; RT = Termination resistance should be equal to the output impedance Zo of the pulse generator; VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 10. Test data Supply voltage Input VCC VI tr = tf CL RL tPLH, tPHL 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 kΩ open 2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open 74LVC1G80_Q100 Product data sheet VEXT Load All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 9 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 12. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm D SOT353-1 E B A X c (5x) y HE v M A e1 5 4 pin 1 index A 1 2 A1 3 A3 θ Lp w M B bp (5x) e A2 detail X e 0 3 mm scale Dimensions (mm are the original dimensions) Unit mm max min A A1 A2 A3 1.1 0.8 0.1 0 1.0 0.8 0.15 bp c 0.30 0.25 0.15 0.08 D(1) E(1) 2.2 1.8 1.35 0.65 1.15 e e1 HE Lp v w y θ 1.3 2.4 1.8 0.46 0.26 0.3 0.1 0.1 8° 0° Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. Outline version SOT353-1 Fig. 8. References IEC JEDEC JEITA MO-203 SC-88A sot353-1_po European projection Issue date 21-12-15 21-12-16 Package outline SOT353-1 (TSSOP5) 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 10 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger Plastic surface-mounted package; 5 leads SOT753 D B E y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT753 Fig. 9. JEITA EUROPEAN PROJECTION ISSUE DATE 02-04-16 06-03-16 SC-74A Package outline SOT753 (SC-74A) 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 11 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger 13. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC1G80_Q100 v.3 20220131 Product data sheet - Modifications: • • • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Section 1 and Section 2 updated. Table 5: Derating values for Ptot total power dissipation updated. Fig. 8: Package outline drawing SOT353-1 (TSSOP5) has changed. 74LVC1G80_Q100 v.2 20161212 Modifications: • 74LVC1G80_Q100 v.1 20120731 74LVC1G80_Q100 Product data sheet 74LVC1G80_Q100 v.2 Product data sheet - 74LVC1G80_Q100 v.1 Table 7: The maximum limits for leakage current and supply current have changed. Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 - © Nexperia B.V. 2022. All rights reserved 12 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. 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In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 13 / 14 74LVC1G80-Q100 Nexperia Single D-type flip-flop; positive-edge trigger Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................2 6.1. Pinning.........................................................................2 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................7 11.1. Waveforms and test circuit........................................ 8 12. Package outline........................................................ 10 13. Abbreviations............................................................ 12 14. Revision history........................................................12 15. Legal information......................................................13 © Nexperia B.V. 2022. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 31 January 2022 74LVC1G80_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 31 January 2022 © Nexperia B.V. 2022. All rights reserved 14 / 14