HEF4051BT-Q100,118

HEF4051B-Q100 8-channel analog multiplexer/demultiplexer Rev. 2 — 11 September 2014 Product data sheet 1. General description The HEF4051B-Q100 is an 8-channel analog multiplexer/demultiplexer with three address inputs (S1 to S3), an active LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). The device contains eight bidirectional analog switches, each with one side connected to an independent input/output (Y0 to Y7) and the other side connected to a common input/output (Z). With E LOW, one of the eight switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3. If break before make is needed, then it is necessary to use the enable input. VDD and VSS are the supply voltage connections for the digital control inputs (S1 to S3, and E). The VDD to VSS range is 3 V to 15 V. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VDD as a positive limit and VEE as a negative limit. VDD  VEE may not exceed 15 V. Unused inputs must be connected to VDD, VSS, or another input. For operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically ground). VEE and VSS are the supply voltage connections for the switches. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits  Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Fully static operation  5 V, 10 V, and 15 V parametric ratings  Standardized symmetrical output characteristics  ESD protection:  MIL-STD-833, method 3015 exceeds 2000V  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )  Complies with JEDEC standard JESD 13-B 3. Applications  Analog multiplexing and demultiplexing  Digital multiplexing and demultiplexing  Signal gating HEF4051B-Q100 Nexperia 8-channel analog multiplexer/demultiplexer 4. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C. Type number Package Name Description Version HEF4051BT-Q100 SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4051BTT-Q100 TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 5. Functional diagram VDD 16 13 Y0 S1 11 14 Y1 15 Y2 S2 10 12 Y3 LOGIC LEVEL CONVERSION 1 − OF − 8 DECODER 1 Y4 S3 9 5 Y5 2 Y6 4 Y7 E 6 3 Z 8 VSS Fig 1. 7 VEE 001aac277 Functional diagram HEF4051B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 11 September 2014 © Nexperia B.V. 2017. All rights reserved 2 of 21 HEF4051B-Q100 Nexperia 8-channel analog multiplexer/demultiplexer Yn VDD VDD Z VEE 001aac281 Fig 2. Schematic diagram (one switch) 11 10 9 13 S1 S2 S3 11 14 10 15 9 12 1 5 2 E 6 4 3 Y0 6 Y1 1 X 3 0 7 EN Y2 MUX/DMUX 0 Y3 Y4 1 Y5 2 Y6 3 3 4 Y7 5 Z 6 001aac278 7 13 14 15 12 1 5 2 4 001aac279 Fig 3. Logic symbol HEF4051B_Q100 Product data sheet Fig 4. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 2 — 11 September 2014 © Nexperia B.V. 2017. All rights reserved 3 of 21 HEF4051B-Q100 Nexperia 8-channel analog multiplexer/demultiplexer Y0 Y1 S1 S2 S3 E LEVEL CONVERTER Y2 LEVEL CONVERTER Y3 LEVEL CONVERTER Y4 LEVEL CONVERTER Y5 Y6 Y7 Z 001aac280 Fig 5. Logic diagram HEF4051B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 11 September 2014 © Nexperia B.V. 2017. All rights reserved 4 of 21 HEF4051B-Q100 Nexperia 8-channel analog multiplexer/demultiplexer 6. Pinning information 6.1 Pinning +()%4