SIT1618BAA83-XXS-48.000000Y 数据手册
SiT1618B
Standard Frequency, High Temperature Oscillator
Features
Applications
◼
33 standard frequencies between 7.3728 MHz and 48 MHz
◼
Supply voltage of 1.8 V or 2.5 V to 3.3 V continuous
◼
Operating temperature from -40°C to 125°C.
For -55°C option, refer to SiT8920 and SiT8921
◼
Excellent total frequency stability as low as ±20 ppm
◼
Low power consumption of 3.5 mA typical at 1.8 V
◼
LVCMOS/LVTTL compatible output
◼
Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5,
5.0 x 3.2, 7.0 x 5.0 mm x mm
◼
Instant samples with Time Machine II and Field
Programmable oscillators
◼
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
◼
For AEC-Q100 oscillators, refer to SiT8924 and SiT8925
◼
Industrial, medical, automotive, avionics and other
high temperature applications
◼
Industrial sensors, PLC, motor servo, outdoor
networking equipment, medical video cam, asset
tracking systems, etc.
Electrical Specifications
Table 1. Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and nominal supply voltage.
Parameters
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency Range
Output Frequency Range
f
33 standard frequencies between
7.3728 MHz and 48 MHz
MHz
Refer to Table 13 for the exact list of supported frequencies
Frequency Stability and Aging
Frequency Stability
F_stab
-20
–
+20
ppm
-25
–
+25
ppm
-30
–
+30
ppm
-50
–
+50
ppm
Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C,
and variations over operating temperature,
rated power supply voltage and load.
Operating Temperature Range
Operating Temperature Range
(ambient)
T_use
-40
–
+105
°C
Extended Industrial
-40
–
+125
°C
Automotive
Supply Voltage and Current Consumption
Supply Voltage
Current Consumption
OE Disable Current
Standby Current
Rev 1.03
Vdd
Idd
I_OD
I_std
1.62
1.8
1.98
V
2.25
2.5
2.75
V
2.52
2.8
3.08
V
2.7
3.0
3.3
V
2.97
3.3
3.63
V
2.25
–
3.63
V
–
3.8
4.7
mA
No load condition, f = 20 MHz, Vdd = 2.8 V or 3.3 V
–
3.6
4.5
mA
No load condition, f = 20 MHz, Vdd = 2.5 V
–
3.5
4.5
mA
No load condition, f = 20 MHz, Vdd = 1.8 V
–
–
4.5
mA
Vdd = 2.5 V to 3.3 V, OE = Low, Output in high-Z state
–
–
4.3
mA
Vdd = 1.8 V. OE = Low, Output in high-Z state
–
2.6
8.5
A
Vdd = 2.8 V to 3.3 V, ST = Low, Output is weakly pulled down
–
1.4
5.5
A
Vdd = 2.5 V, ST = Low, Output is weakly pulled down
–
0.6
4.0
A
Vdd = 1.8 V, ST = Low, Output is weakly pulled down
9 March 2021
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SiT1618B Standard Frequency, High Temperature Oscillator
Table 1. Electrical Characteristics (continued)
Parameters
Symbol
Min.
Typ.
Max.
Unit
Condition
LVCMOS Output Characteristics
DC
45
–
55
%
All Vdds
Tr, Tf
–
1.0
2.0
ns
Vdd = 2.5 V, 2.8 V, 3.0 V or 3.3 V, 20% - 80%
–
1.3
2.5
ns
Vdd = 1.8 V, 20% - 80%
–
1.0
3
ns
Vdd = 2.25 V - 3.63 V, 20% - 80%
Duty Cycle
Rise/Fall Time
Output High Voltage
VOH
90%
–
–
Vdd
IOH = -4 mA (Vdd = 3.0 V or 3.3 V)
IOH = -3 mA (Vdd = 2.8 V or Vdd = 2.5 V)
IOH = -2 mA (Vdd = 1.8 V)
Output Low Voltage
VOL
–
–
10%
Vdd
IOL = 4 mA (Vdd = 3.0 V or 3.3 V)
IOL = 3 mA (Vdd = 2.8 V or 2.5 V)
IOL = 2 mA (Vdd = 1.8 V)
Input High Voltage
VIH
70%
–
–
Vdd
Pin 1, OE or ST
Input Low Voltage
VIL
–
–
30%
Vdd
Pin 1, OE or ST
Input Pull-up Impedance
Z_in
50
87
150
k
Pin 1, OE logic high or logic low, or ST logic high
2
–
–
M
Pin 1, ST logic low
Input Characteristics
Startup and Resume Timing
T_start
–
–
5
ms
Measured from the time Vdd reaches its rated minimum value
T_oe
–
–
162
ns
f = 48 MHz.
For other frequencies, T_oe = 100 ns + 3 * clock periods
T_resume
–
–
5
ms
Measured from the time ST pin crosses 50% threshold
Startup Time
Enable/Disable Time
Resume Time
Jitter
RMS Period Jitter
T_jitt
Peak-to-peak Period Jitter
T_pk
RMS Phase Jitter (random)
T_phj
–
1.6
2.5
ps
f = 20 MHz, Vdd = 2.5 V, 2.8 V, 3.0 V or 3.3 V
–
1.9
4
ps
f = 20 MHz, Vdd = 1.8 V
–
12
20
ps
f = 20 MHz, Vdd = 2.5 V, 2.8 V, 3.0 V or 3.3 V
–
14
30
ps
f = 20 MHz, Vdd = 1.8 V
–
0.5
0.8
ps
f = 40 MHz, Integration bandwidth = 900 kHz to 7.5 MHz
–
1.3
2
ps
f = 40 MHz, Integration bandwidth = 12 kHz to 20 MHz
Table 2. Pin Description
Pin
1
Symbol
OE/ST
̅ ̅ ̅ /NC
Top View
Functionality
Output
Enable
H[1]: specified frequency output
L: output is high impedance. Only output driver is disabled.
Standby
H[1]: specified frequency output
L: output is low (weak pull down). Device goes to sleep mode.
Supply current reduces to I_std.
No Connect
OE/ST
̅ ̅ ̅ /NC
Any voltage between 0 and Vdd or Open[1]:
Specified frequency output. Pin 1 has no function.
2
GND
Power
3
OUT
Output
Electrical ground
Oscillator output
4
VDD
Power
Power supply voltage[2]
Figure 1. Pin Assignments
Notes:
1. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven. If pin 1 needs to be left floating, use the NC option.
2. A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Rev 1.03
Page 2 of 18
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SiT1618B Standard Frequency, High Temperature Oscillator
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Min.
Max.
Unit
Storage Temperature
-65
150
°C
Vdd
-0.5
4
V
Electrostatic Discharge
–
2000
V
Soldering Temperature
(follow standard Pb free soldering guidelines)
–
260
°C
[3]
–
150
°C
Junction Temperature
Note:
3.
Exceeding this temperature for extended period of time may damage the device.
Table 4. Thermal Consideration[4]
Package
JA, 4 Layer Board (°C/W)
JA, 2 Layer Board (°C/W)
JC, Bottom
7050
142
273
30
5032
97
199
24
3225
109
212
27
2520
117
222
26
2016
152
252
36
(°C/W)
Note:
4. Refer to JESD51 for JA and JC definitions, and reference layout used to determine the JA and JC values in the above table.
Table 5. Maximum Operating Junction Temperature[5]
Max Operating Temperature(ambient)
Maximum Operating Junction Temperature
105°C
115°C
125°C
135°C
Note:
5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 6. Environmental Compliance
Parameter
Condition/Test Method
Mechanical Shock
MIL-STD-883F, Method 2002
Mechanical Vibration
MIL-STD-883F, Method 2007
Temperature Cycle
JESD22, Method A104
Solderability
MIL-STD-883F, Method 2003
Moisture Sensitivity Level
MSL1 @ 260°C
Rev 1.03
Page 3 of 18
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SiT1618B Standard Frequency, High Temperature Oscillator
Test Circuit and Waveform[6]
Vdd
Vout
4
Power
Supply
Test Point
3
tf
80% Vdd
15pF
(including probe
and fixture
capacitance)
0.1 uF
2
1
tr
50%
20% Vdd
High Pulse
(TH)
Low Pulse
(TL)
Period
Vdd
OE/ST Function
1 kΩ
Figure 3. Waveform
Figure 2. Test Circuit
Note:
6. Duty Cycle is computed as Duty Cycle = TH/Period.
Timing Diagrams
90% Vdd
Vdd
Vdd
50% Vdd
Pin 4 Voltage
T_start
[7]
T_resume
ST Voltage
No Glitch
during start up
CLK Output
CLK Output
HZ
HZ
T_resume: Time to resume from ST
T_start: Time to start from power-off
Figure 4. Startup Timing (OE/ST Mode)
Figure 5. Standby Resume Timing (ST Mode Only)
Vdd
Vdd
50% Vdd
OE Voltage
OE Voltage
T_oe
50% Vdd
T_oe
CLK Output
CLK Output
HZ
HZ
T_oe: Time to re-enable the clock output
T_oe: Time to put the output in High Z mode
Figure 6. OE Enable Timing (OE Mode Only)
Figure 7. OE Disable Timing (OE Mode Only)
Note:
7. SiT1618 has “no runt” pulses and “no glitch” output during startup or resume.
Rev 1.03
Page 4 of 18
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SiT1618B Standard Frequency, High Temperature Oscillator
Performance Plots[8]
1.8 V
2.5 V
2.8 V
3V
DUT1
DUT8
DUT15
DUT22
3.3 V
5.0
4.8
DUT2
DUT9
DUT16
DUT23
DUT3
DUT10
DUT17
DUT24
DUT4
DUT11
DUT18
DUT25
DUT5
DUT12
DUT19
DUT6
DUT13
DUT20
DUT7
DUT14
DUT21
25
4.6
20
Frequency (ppm)
Idd (mA)
4.4
4.2
4.0
3.8
3.6
3.4
15
10
5
0
-5
-10
-15
3.2
-20
3.0
10
15
20
25
30
35
40
45
-25
50
‐40
‐20
0
20
40
60
80
100
120
Temperature (°C)
Figure 8. Idd vs Frequency
Figure 9. Frequency vs Temperature
1.8 V
2.5 V
2.8 V
15
20
25
3.0 V
3.3 V
55
54
Duty cycle (%)
RMS period jitter (ps)
53
52
51
50
49
48
47
46
45
10
Figure 10. RMS Period Jitter vs Frequency
2.5 V
2.8 V
3.0 V
3.3 V
1.8 V
2.5
2.5
2.0
2.0
1.5
1.0
0.5
40
45
50
2.5 V
2.8 V
3.0 V
3.3 V
1.5
1.0
0.5
0.0
0.0
-40
-20
0
20
40
60
80
100
-40
120
Figure 12. 20%-80% Rise Time vs Temperature
Rev 1.03
35
Figure 11. Duty Cycle vs Frequency
Fall time (ns)
Rise time (ns)
1.8 V
30
-20
0
20
40
60
80
100
120
Figure 13. 20%-80% Fall Time vs Temperature
Page 5 of 18
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SiT1618B Standard Frequency, High Temperature Oscillator
IPJ (ps)
IPJ (ps)
Performance Plots[8] (continued)
Figure 14. RMS Integrated Phase Jitter Random
(12 kHz to 20 MHz) vs Frequency[9]
Figure 15. RMS Integrated Phase Jitter Random
(900 kHz to 20 MHz) vs Frequency[9]
Notes:
8. All plots are measured with 15 pF load at room temperature, unless otherwise stated.
9. Phase noise plots are measured with Agilent E5052B signal source analyzer. Integration range is up to 5 MHz for carrier frequencies below 40 MHz.
Rev 1.03
Page 6 of 18
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SiT1618B Standard Frequency, High Temperature Oscillator
Programmable Drive Strength
The SiT1618 includes a programmable drive strength
feature to provide a simple, flexible tool to optimize the clock
rise/fall time for specific applications. Benefits from the
programmable drive strength feature are:
◼ Improves system radiated electromagnetic interference
(EMI) by slowing down the clock rise/fall time.
◼ Improves the downstream clock receiver’s (RX) jitter by
decreasing (speeding up) the clock rise/fall time.
◼ Ability to drive large capacitive loads while maintaining
full swing with sharp edge rates.
For more detailed information about rise/fall time control
and drive strength selection, see the SiTime Application
Notes section.
EMI Reduction by Slowing Rise/Fall Time
Figure 16 shows the harmonic power reduction as the rise/
fall times are increased (slowed down). The rise/fall times
are expressed as a ratio of the clock period. For the ratio of
0.05, the signal is very close to a square wave. For the ratio
of 0.45, the rise/fall times are very close to near-triangular
waveform. These results, for example, show that the 11th
clock harmonic can be reduced by 35 dB if the rise/fall edge
is increased from 5% of the period to 45% of the period.
trise=0.05
trise=0.1
trise=0.15
trise=0.2
trise=0.25
trise=0.3
trise=0.35
trise=0.4
trise=0.45
10
Harmonic amplitude (dB)
0
-10
-20
The SiT1618 can support up to 60 pF or higher in
maximum capacitive loads with drive strength settings.
Refer to the Rise/Tall Time Tables (Table 7 to 11) to
determine the proper drive strength for the desired
combination of output load vs. rise/fall time.
SiT1618 Drive Strength Selection
Tables 7 through 11 define the rise/fall time for a given
capacitive load and supply voltage.
1. Select the table that matches the SiT1618 nominal
supply voltage (1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V).
2. Select the capacitive load column that matches
the application requirement (5 pF to 60 pF)
3. Under the capacitive load column, select the
desired rise/fall times.
4. The left-most column represents the part number
code for the corresponding drive strength.
5. Add the drive strength code to the part number for
ordering purposes.
Calculating Maximum Frequency
Based on the rise and fall time data given in Tables 7
through 11, the maximum frequency the oscillator can
operate with guaranteed full swing of the output voltage
over temperature can be calculated:
Max Frequency =
1
5 x Trf_20/80
where Trf_20/80 is the typical value for 20%-80%
rise/fall time.
-30
-40
Example 1
-50
Calculate fMAX for the following condition:
-60
◼
-70
-80
◼
1
3
5
7
9
11
Harmonic number
Figure 16. Harmonic EMI reduction as a Function of
Slower Rise/Fall Time
◼
Vdd = 1.8 V (Table 7)
Capacitive Load: 30 pF
Desired Tr/f time = 3 ns
(rise/fall time part number code = E)
fMAX = 48.000000 where 48 MHz is highest available
frequency for this device.
Jitter Reduction with Faster Rise/Fall Time
Part number for the above example:
Power supply noise can be a source of jitter for the
downstream chipset. One way to reduce this jitter is to speed
up the rise/fall time of the input clock. Some chipsets may also
require faster rise/fall time in order to reduce their sensitivity to
this type of jitter. Refer to the Rise/Fall Time Tables (Table 7
to Table 11) to determine the proper drive strength.
SiT1618BIE12-18E-48.000000
Drive strength code is inserted here. Default setting is “-”
High Output Load Capability
The rise/fall time of the input clock varies as a function of the
actual capacitive load the clock drives. At any given drive
strength, the rise/fall time becomes slower as the output load
increases. As an example, for a 3.3 V SiT1618 device with
default drive strength setting, the typical rise/fall time is 1ns
for 15 pF output load. The typical rise/fall time slows down
to 2.6 ns when the output load increases to 45 pF. One can
choose to speed up the rise/fall time to 1.83 ns by then
increasing the drive strength setting on the SiT1618.
Rev 1.03
Page 7 of 18
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SiT1618B Standard Frequency, High Temperature Oscillator
Rise/Fall Time (20% to 80%) vs CLOAD Tables
Table 7. Vdd = 1.8 V Rise/Fall Times
for Specific CLOAD
Table 8. Vdd = 2.5 V Rise/Fall Times
for Specific CLOAD
Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD
L
A
R
B
T
E
U
F or "‐": default
5 pF
6.16
3.19
2.11
1.65
0.93
0.78
0.70
0.65
15 pF
11.61
6.35
4.31
3.23
1.91
1.66
1.48
1.30
30 pF
22.00
11.00
7.65
5.79
3.32
2.94
2.64
2.40
Rise/Fall Time Typ (ns)
45 pF
31.27
16.01
10.77
8.18
4.66
4.09
3.68
3.35
60 pF
39.91
21.52
14.47
11.08
6.48
5.74
5.09
4.56
Table 9. Vdd = 2.8 V Rise/Fall Times
for Specific CLOAD
Drive Strength \ CLOAD
L
A
R
B
T
E or "‐": default
U
F
5 pF
4.13
2.11
1.45
1.09
0.62
15 pF
8.25
4.27
2.81
2.20
1.28
30 pF
12.82
7.64
5.16
3.88
2.27
45 pF
21.45
11.20
7.65
5.86
3.51
60 pF
27.79
14.49
9.88
7.57
4.45
0.54
0.43
0.34
1.00
0.96
0.88
2.01
1.81
1.64
3.10
2.79
2.54
4.01
3.65
3.32
Table 10. Vdd = 3.0 V Rise/Fall Times
for Specific CLOAD
Rise/Fall Time Typ (ns)
Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD
5 pF
15 pF
30 pF
45 pF
60 pF
Drive Strength \ CLOAD
5 pF
15 pF
30 pF
45 pF
60 pF
L
A
R
B
T
3.77
1.94
1.29
0.97
0.55
7.54
3.90
2.57
2.00
1.12
12.28
7.03
4.72
3.54
2.08
19.57
10.24
7.01
5.43
3.22
25.27
13.34
9.06
6.93
4.08
E or "‐": default
U
F
0.44
0.34
0.29
1.00
0.88
0.81
1.83
1.64
1.48
2.82
2.52
2.29
3.67
3.30
2.99
L
A
R
B
T or "‐": default
E
U
F
3.60
1.84
1.22
0.89
0.51
0.38
0.30
0.27
7.21
3.71
2.46
1.92
1.00
0.92
0.83
0.76
11.97
6.72
4.54
3.39
1.97
1.72
1.55
1.39
18.74
9.86
6.76
5.20
3.07
2.71
2.40
2.16
24.30
12.68
8.62
6.64
3.90
3.51
3.13
2.85
Table 11. Vdd = 3.3 V Rise/Fall Times
for Specific CLOAD
Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD
L
A
R
B
T or "‐": default
5 pF
3.39
1.74
1.16
0.81
0.46
15 pF
6.88
3.50
2.33
1.82
1.00
30 pF
11.63
6.38
4.29
3.22
1.86
45 pF
17.56
8.98
6.04
4.52
2.60
60 pF
23.59
12.19
8.34
6.33
3.84
E
U
F
0.33
0.28
0.25
0.87
0.79
0.72
1.64
1.46
1.31
2.30
2.05
1.83
3.35
2.93
2.61
Rev 1.03
Page 8 of 18
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SiT1618B Standard Frequency, High Temperature Oscillator
Pin 1 Configuration Options (OE, ST
̅ ̅ ̅ , or NC)
Pin 1 of the SiT1618 can be factory-programmed to support
three modes: Output Enable (OE), standby ( ST
̅ ̅ ̅ ) or
No Connect (NC). These modes can also be programmed
with the Time Machine using field programmable devices.
Output Enable (OE) Mode
In the OE mode, applying logic Low to the OE pin only disables
the output driver and puts it in Hi-Z mode. The core of the
device continues to operate normally. Power consumption is
reduced due to the inactivity of the output. When the OE pin is
pulled High, the output is typically enabled in