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498

498

  • 厂商:

    ADAFRUIT

  • 封装:

    -

  • 描述:

    HOLDER BATTERY 1/3 N HORIZON SMD

  • 数据手册
  • 价格&库存
498 数据手册
Winstar Display Co., LTD 華凌光電股份有限公司 住址: 407 台中市中清路 163 號 No.163 Chung Ching RD., Taichune, Taiwan, R.O.C WEB: http://www.winstar.com.tw E-mail: sales@winstar.com.tw Tel:886-4-24262208 Fax:886-4-24262207 SPECIFICATION CUSTOMER : MODULE NO.: WH2004A-CFH-JT# APPROVED BY: ( FOR CUSTOMER USE ONLY ) PCB VERSION: SALES BY APPROVED BY DTAT: CHECKED BY VERSION DATE REVISED PAGE NO. B 2008/12/25 21 PREPARED BY SUMMARY Modify backlight information. 第 1 頁,共 29 頁 Winstar Display Co., LTD MODLE NO: 華凌光電股份有限公司 DOC. FIRST ISSUE RECORDS OF REVISION VERSION DATE 0 A 2008/8/25 2008/11/7 REVISED PAGE NO. 14 SUMMARY First issue Modify Character Generator ROM Pattern B 2008/12/25 21 Modify backlight information. 第 2 頁,共 29 頁 Contents 1.Module Classification Information 2.Precautions in use of LCD Modules 3.General Specification 4.Absolute Maximum Ratings 5.Electrical Characteristics 6.Optical Characteristics 7.Interface Pin Function 8.Contour Drawing & Block Diagram 9.Function Description 10.Character Generator ROM Pattern 11.Instruction Table 12.Timing Characteristics 13.Initializing of LCM 14.Reliability 15.Backlight Information 16. Inspection specification 17. Material List of Components for RoHs 第 3 頁,共 29 頁 1.Module 1.Module Classification Information W H 2 0 0 4 A-C F H-     JT#   Brand:WINSTAR DISPLAY CORPORATION  Display Type:H→Character Type, G→Graphic Type  Display Font:Character 20 words, 4Lines.  Model serials no.  Backlight Type:  LCD Mode: N→Without backlight B→EL, Blue green D→EL, Green T→LED,White A→LED, Amber R→LED, Red W→EL, White F→CCFL, White Y→LED, Yellow Green O→LED, Orange G→LED, Green C→LED, Triple color B→TN Positive, Gray N→TN Negative, G→STN Positive, Gray T→FSTN Negative Y→STN Positive, Yellow Green M→STN Negative, Blue F→FSTN Positive A→Reflective, N.T, 6:00 H→Transflective, W.T,6:00  LCD Polarizer Type/ Temperature D→Reflective, N.T, 12:00 G→Reflective, W. T, 6:00 range/ View J→Reflective, W. T, 12:00 direction B→Transflective, N.T,6:00 E→Transflective, N.T.12:00  Special Code K→Transflective, W.T,12:00 C→Transmissive, N.T,6:00 F→Transmissive, N.T,12:00 I→Transmissive, W. T, 6:00 L→Transmissive, W.T,12:00 JT : English and Japanese standard font #:Fit in with the ROHS Directions and regulations 第 4 頁,共 29 頁 2.Precautions in use of LCD Modules (1)Avoid applying excessive shocks to the module or making any alterations or modifications to it. (2)Don’t make extra holes on the printed circuit board, modify its shape or change the components of LCD module. (3)Don’t disassemble the LCM. (4)Don’t operate it above the absolute maximum rating. (5)Don’t drop, bend or twist LCM. (6)Soldering: only to the I/O terminals. (7)Storage: please storage in anti-static electricity container and clean environment. (8). Winstar have the right to change the passive components (9). Winstar have the right to change the PCB Rev. 3.General Specification Item Dimension Unit 20 characters x 4Lines - 98.0 x 60.0 x 13.6(MAX) mm View area 77.0 x 25.2 mm Active area 70.4 x 20.8 mm Dot size 0.55 x 0.55 mm Dot pitch 0.60 x 0.60 mm Character size 2.95 x 4.75 mm Character pitch 3.55 x 5.35 mm Number of Characters Module dimension LCD type FSTN Positive Transflective, (In LCD production, It will occur slightly color difference. We can only guarantee the same color in the same batch.) Duty 1/16 View direction 6 o’clock Backlight Type LED, Triple color 第 5 頁,共 29 頁 4.Absolute Maximum Ratings Item Symbol Min Typ Max Unit Operating Temperature TOP -20 - +70 ℃ Storage Temperature TST -30 - +80 ℃ Input Voltage VI VSS - VDD V Supply Voltage For Logic VDD-VSS -0.3 - 7 V Supply Voltage For LCD VDD-V0 -0.3 - 13 V 5.Electrical Characteristics Item Supply Voltage For Logic Symbol Condition Min Typ Max Unit VDD-VSS - 4.5 5.0 5.5 V Ta=--20℃ - - - V Ta=25℃ 4.05 4.5 5.0 V Ta=70℃ - - - V Supply Voltage For LCD VDD-V0 *Note Input High Volt. VIH - 0.7 VDD - VDD V Input Low Volt. VIL - Vss - 0.6 V Output High Volt. VOH - 3.9 - - V Output Low Volt. VOL - - - 0.4 V Supply Current IDD VDD=5V 1.02 1.28 1.49 mA * Note: Please design the VOP adjustment circuit on customer's main board Vdd VR 10K~20K Vo LCM Module VSS 第 6 頁,共 29 頁 6.Optical Characteristics Item Symbol Condition Min Typ Max Unit (V)θ CR≧2 30 - 60 deg (H)φ CR≧2 -45 - 45 deg CR - - 5 - - T rise - - 150 200 ms T fall - - 150 200 ms View Angle Contrast Ratio Response Time Definition of Operation Voltage (Vop) Intensity 100% Definition of Response Time ( Tr , Tf ) Non-selected Conition Selected Wave Non-selected Wave Selected Conition Non-selected Conition Intensity 10% Cr Max Cr = Lon / Loff 90% 100% Vop Tr Driving Voltage(V) [positive type] Tf [positive type] Conditions : Operating Voltage : Vop Viewing Angle(θ,φ) : 0°, 0° Frame Frequency : 64 HZ Driving Waveform : 1/N duty , 1/a bias Definition of viewing angle(CR≧ ≧2) θb θf θl φ= 180° θr φ= 90° φ= 270° φ= 0° 第 7 頁,共 29 頁 7.Interface Pin Function Pin No. Symbol Level Description 1 VSS 0V Ground 2 VDD 5.0V 3 VO 4 RS H/L H: DATA, L: Instruction code 5 R/W H/L H: Read(MPU→Module) L: Write(MPU→Module) 6 E H,H→L 7 DB0 H/L Data bit 0 8 DB1 H/L Data bit 1 9 DB2 H/L Data bit 2 10 DB3 H/L Data bit 3 11 DB4 H/L Data bit 4 12 DB5 H/L Data bit 5 13 DB6 H/L Data bit 6 14 DB7 H/L Data bit 7 15 A - 16 R - Power Supply for LED backlight ( Red ) 17 G - Power Supply for LED backlight (Green) 18 B - Power Supply for LED backlight (blue) Supply Voltage for logic (Variable) Operating voltage for LCD Chip enable signal Power supply for LED backlight ( + ) 第 8 頁,共 29 頁 8.Contour Drawing &Block Diagram 9 8 .0 0 .5 9 6 .8 9 3 .0 0 .6 2 .5 7 7 .0 ( V A ) 7 0 .4 ( A A ) 2.5 1 3 .6 M A X 9 .0 19.6 G A 55.0 17.4 P 2 .5 4 * 1 7 = 4 3 .1 8 1 6 - 1 .0 P T H 1 6 - 2 .0 P A D 20.8(AA) 39.3 25.2(VA) 60.0 0.5 10.35 1 3 .8 1 0 .0 2.5 1 0 .5 R /K B 4 9 .0 4 - 2 .5 P T H 4 - 5 .0 P A D 1 .6 L E D B /L 2 .9 5 0 .6 P 1 .0 * 1 7 = 1 7 13 1 0 .0 0 .6 0 .5 5 0.6 0.6 0 .7 V ss V dd Vo RS R /W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 A R G B 1 0.55 4.75 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 T h e n o n - s p e c i f i e d to l e r a n c e o f d im e n s io n is D O T S IZ E S C A L E 5 /1 第 9 頁,共 29 頁 0 .2 m m . VR 10K ~20K V dd Vo V ss E x te rn al c o n tra st ad ju stm en t. 20X 4 LC D C o m 1 7~32 Bias and Power Circuit 8 0 se ries or 6 8 se ries C om 1~16 C o n tro ller/C o m D riv er H D 44780 or E q u iv alen t Seg1~40 D Seg41~120 S eg 12 0~200 S e g D riv er S e g D riv er M CL1 CL2 V d d ,V ss ,V 1 ~ V 5 N.V. Generator M PU RS R /W E D B 0~D B 7 O p tio n al C h a ra c te r lo cated D D R A M a d d res s D D R A M a d d res s D D R A M a d d res s D D R A M a d d res s 1 00 40 14 54 2 01 41 15 55 3 02 42 16 56 4 03 43 17 57 5 04 44 18 58 6 05 45 19 59 7 06 46 1A 5A 8 07 47 1B 5B 第 10 頁,共 29 頁 9 08 48 1C 5C 10 09 49 1D 5D 11 0A 4A 1E 5E 12 0B 4B 1F 5F 13 0C 4C 20 60 14 0D 4D 21 61 15 0E 4E 22 62 16 0F 4F 23 63 17 10 50 24 64 18 11 51 25 65 19 12 52 26 66 20 13 53 27 67 9.Function Description The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an instruction register (IR) and a data register (DR). The IR stores instruction codes, such as display clear and cursor shift, and address information for display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written from the MPU. The DR temporarily stores data to be written or read from DDRAM or CGRAM. When address information is written into the IR, then data is stored into the DR from DDRAM or CGRAM. By the register selector (RS) signal, these two registers can be selected. RS R/W 0 0 IR write as an internal operation (display clear, etc.) 0 1 Read busy flag (DB7) and address counter (DB0 to DB7) 1 0 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM) 1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR) Operation Busy Flag (BF) When the busy flag is 1, the controller LSI is in the internal operation mode, and the next instruction will not be accepted. When RS=0 and R/W=1, the busy flag is output to DB7. next instruction must be written after ensuring that the busy flag is 0. The Address Counter (AC) The address counter (AC) assigns addresses to both DDRAM and CGRAM Display Data RAM (DDRAM) This DDRAM is used to store the display data represented in 8-bit character codes. Its extended capacity is 80×8 bits or 80 characters. Below figure is the relationships between DDRAM addresses and positions on the liquid crystal display. High bits Low bits Example: DDRAM addresses 4E AC (hexadecimal) AC6 AC5 AC4 AC3 AC2 AC1 AC0 第 11 頁,共 29 頁 1 0 0 1 1 1 0 Display position DDRAM address 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 11 19 20 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 12 13 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 4-Line by 20-Character Display Character Generator ROM (CGROM) The CGROM generate 5×8 dot or 5×10 dot character patterns from 8-bit character codes. See Table 2. Character Generator RAM (CGRAM) In CGRAM, the user can rewrite character by program. For 5×8 dots, eight character patterns can be written, and for 5×10 dots, four character patterns can be written. Write into DDRAM the character code at the addresses shown as the left column of table 1. To show the character patterns stored in CGRAM. 第 12 頁,共 29 頁 Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character patterns Table 1. F o r 5 * 8 d o t c h a ra c te r p a tte rn s C h a ra c te r C o d e s ( D D R A M d a ta ) 7 6 5 4 3 H ig h 0 0 0 0 0 0 0 0 0 2 1 0 Low 0 0 0 * 0 * 0 * 1 0 0 1 C h a ra c te r P a tte rn s ( C G R A M d a ta ) C G R A M A d d re ss 5 4 3 2 1 0 7 Low 0 0 0 0 0 1 0 1 0 0 0 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 * * * * * * * * * * * * * * * * * H ig h 0 1 1 1 1 1 1 1 1 1 0 0 1 1 0 1 0 1 * 6 5 H ig h * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 4 3 2 1 0 Low 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C h a ra c te r p a tte rn ( 1 ) 0 0 0 0 C u rs o r p a tte rn 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C h a ra c te r p a tte rn ( 2 ) C u rs o r p a tte rn * F o r 5 * 1 0 d o t c h a ra c te r p a tte rn s C h a ra c te r C o d e s ( D D R A M d a ta ) 7 6 5 4 H ig h 0 0 0 3 2 1 0 Low 0 * 0 0 C h a ra c te r P a tte rn s ( C G R A M d a ta ) C G R A M A d d re ss 5 4 3 H ig h 0 0 2 1 0 7 Low 0 6 5 4 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 H ig h 2 Low 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 * * * * * * * * * * * * * * * * * * * * * * * 0 * 0 * * * * * * * * * 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 * * * * * * * : " H ig h " 第 13 頁,共 29 頁 * C h a ra c te r p a tte rn C u rs o r p a tte rn 10.Character 10.Character Generator ROM Pattern Table.2 Upper 4 bit Lower 4 bit LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH LLLL CG RAM (1) LLLH (2) LLHL (3) LLHH (4) LHLL (5) LHLH (6) LHHL (7) LHHH (8) HLLL (1) HLLH (2) HLHL (3) HLHH (4) HHLL (5) HHLH (6) HHHL (7) HHHH (8) 第 14 頁,共 29 頁 11.Instruction 11.Instruction Table Instruction Code Execution time Instruction Description (fosc=270Khz) RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Write “00H” to DDRAM and set Clear Display 0 0 0 0 0 0 0 0 0 1 1.53ms DDRAM address to “00H” from AC Set DDRAM address to “00H” from AC Return Home 0 0 0 0 0 0 0 0 1 - and return cursor to its original position 1.53ms if shifted. The contents of DDRAM are not changed. Entry Mode Assign cursor moving direction and 0 0 0 0 0 0 0 1 I/D 39μs SH Set enable the shift of entire display. Display Set display (D), cursor (C), and blinking ON/OFF 0 0 0 0 0 0 1 D C 39μs B of cursor (B) on/off control bit. Control Set cursor moving and display shift Cursor or 0 0 0 0 0 1 S/C R/L - - control bit, and the direction, without 39μs Display Shift changing of DDRAM data. Set interface data length Function Set 0 0 0 0 1 DL N F - - (DL:8-bit/4-bit), numbers of display line 39μs (N:2-line/1-line)and, display font type (F:5×11 dots/5×8 dots) Set CGRAM 0 0 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter. 39μs AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter. 39μs 1 Address Set DDRAM Address Whether during internal operation or not Read Busy can be known by reading BF. The Flag and 0 1 0μs BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 contents of address counter can also be Address read. Write Data to Write data into internal RAM 1 0 D7 D6 D5 D4 D3 D2 D1 43μs D0 RAM (DDRAM/CGRAM). Read Data Read data from internal RAM 1 1 D7 D6 D5 D4 D3 D2 D1 43μs D0 from RAM (DDRAM/CGRAM). * ”-”:don’t care 第 15 頁,共 29 頁 12.Timing Characteristics 12.1 Write Operation Ta=25 ℃ VDD=5.0V Item Symbol Min Typ Max Unit Enable cycle time TC 1200 - - ns Enable pulse width TPW 140 - - ns Enable rise/fall time TR,TF - - 25 ns Address set-up time (RS, R/W to E) tAS 0 - - ns Address hold time tAH 10 - - ns Data set-up time tDSW 40 - - ns tH 10 - - ns Data hold time 第 16 頁,共 29 頁 , 12.2 Read Operation Ta=25 ℃ VDD=5V Item Symbol Min Typ Max Unit TC 1200 - - ns TPW 140 - - ns TR,TF - - 25 ns Address set-up time (RS, R/W to E) tAS 0 - - ns Address hold time tAH 10 - - ns Data delay time tDDR - - 100 ns Data hold time tH 10 - - ns Enable cycle time Enable pulse width (high level) Enable rise/fall time 第 17 頁,共 29 頁 , 13.Initializing of LCM Power on Wait for more than 40 ms after VDD rises to 4.5 V BF can not be checked before this instruction. RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set 0 0 0 0 1 1 * * * * Wait for more than 39us BF can not be checked before this instruction. RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 0 * * * * 0 N F * * * * * * 0 Function set Wait for more than 39 µs BF can not be checked before this instruction. RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 1 0 * * * * Function set 0 N F * * * 0 0 * * * Wait for more than 37us RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control 0 0 0 0 0 0 * * * * 0 * * * * 0 1 D C B Wait for more than 37 µs RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear * * * 0 0 0 0 0 0 * 0 * * * 0 0 0 0 1 * Wait for more than 1.53ms RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set 0 0 0 0 0 0 * * * * 0 0 0 1 * * * I/D SH * Initialization ends 4-Bit Ineterface 第 18 頁,共 29 頁 Power on Wait for more than 40 ms after VDD rises to 4.5 V BF can not be checked before this instruction. RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set 0 0 0 0 1 1 N F * * Wait for more than 39us BF can not be checked before this instruction. RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 N F * * Function set Wait for more than 37us RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control 0 0 0 0 0 0 1 B C D Wait for more than 37 µs RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear 0 0 0 0 0 0 0 0 0 1 Wait for more than 1.53ms RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set 0 0 0 0 0 0 0 1 I/D S Initialization ends 8-Bit Ineterface 第 19 頁,共 29 頁 14.Reliability Content of Reliability Test (wide temperature, -20℃~70℃ ℃) Environmental Test Test Item High Temperature storage Low Temperature storage High Temperature Operation Low Temperature Operation High Temperature/ Humidity Operation Thermal shock resistance Content of Test Endurance test applying the high storage temperature for a long time. Endurance test applying the high storage temperature for a long time. Endurance test applying the electric stress (Voltage & Current) and the thermal stress to the element for a long time. Endurance test applying the electric stress under low temperature for a long time. The module should be allowed to stand at 60 ℃,90%RH max For 96hrs under no-load condition excluding the polarizer, Then taking it out and drying it at normal temperature. The sample should be allowed stand the following 10 cycles of operation -20℃ 25℃ 70℃ 30min 5min 1 cycle Test Condition 80℃ 200hrs -30℃ 200hrs Note 2 1,2 70℃ 200hrs —— -20℃ 200hrs 1 60℃,90%RH 96hrs 1,2 -20℃/70℃ 10 cycles —— 30min Total fixed amplitude : 1.5mm Vibration Frequency : Vibration test 3 10~55Hz One cycle 60 seconds to 3 directions of X,Y,Z for Each 15 minutes VS=800V,RS=1.5k Endurance test applying the electric stress to the Ω Static electricity test —— terminal. CS=100pF 1 time Endurance test applying the vibration during transportation and using. Note1: No dew condensation to be observed. Note2: The function test shall be conducted after 4 hours storage at the normal Temperature and humidity after remove from the test chamber. Note3: Vibration test will be conducted to the product itself without putting it in a container. 第 20 頁,共 29 頁 15.Backlight Information Specification PARAMETER SYMBOL MIN TYP Supply Current ILED_RED - 42 - mA Supply Current ILED_GREEN - 44 - mA Supply Current ILED_BULE - 47 - mA 4.9 5.0 5.1 Supply Voltage Reverse Voltage V VR MAX 5 UNIT TEST CONDITION V=5.0V - V V - Luminous Intensity IV_RED 34.6 43.3 - CD/M2 ILED=42mA Luminous Intensity IV_GREEN 102.7 128.4 - CD/M2 ILED =44mA Luminous Intensity IV_BULE 12.9 16.2 - CD/M2 ILED =47mA Wave Length λp _RED 620 625 630 nm ILED =42mA Wave Length λp _GREEN 515 520 525 nm ILED =44mA Wave Length λp _BULE 465 470 475 nm ILED=47mA R 80K - - G 40K - - B 40K - - LED Life Time Color Hr. ILED≦ ≦15mA For each LED Lamp RED, REEN,BLUE Note: The LED of B/L is drive by current only, drive voltage is for reference only. drive voltage can make driving current under safety area (current between minimum and maximum). Note1 :LED Life Time is only an estimate for reference. D riv e fro m p in 1 5 ,p in 1 6 ,p in 1 7 ,p in 1 8 p in 1 5 R R A p in 1 6 p in 1 7 B /L K (R ) G p in 1 8 B LCM 第 21 頁,共 29 頁 16. Inspection specification NO Item Criterion AQL 1.1 Missing vertical, horizontal segment, segment contrast defect. 01 Electrical Testing 1.2 Missing character , dot or icon. 1.3 Display malfunction. 1.4 No function or no display. 0.65 1.5 Current consumption exceeds product specifications. 1.6 LCD viewing angle defect. 1.7 Mixed product types. 1.8 Contrast defect. Black or white 2.1 White and black spots on display ≦0.25mm, no more than 02 spots on LCD (display only) three white or black spots present. 2.2 Densely spaced: No more than two spots or lines within 3mm 3.1 Round type : As following drawing Φ=( x + y ) / 2 SIZE Φ≦0.10 03 LCD black spots, white spots, contamination (non-display) 04 Acceptable Q TY Accept no dense 0.10<Φ≦0.20 2 0.20<Φ≦0.25 1 0.25<Φ 0 2.5 3.2 Line type : (As following drawing) Length Width W≦0.02 --L≦3.0 0.02<W≦0.03 L≦2.5 0.03<W≦0.05 --- Polarizer bubbles 2.5 0.05<W Size Φ If bubbles are visible, judge using black spot specifications, not easy to find, must check in specify direction. Φ≦0.20 Acceptable Q TY Accept no dense 2.5 2 As round type Acceptable Q TY Accept no dense 0.20<Φ≦0.50 3 0.50<Φ≦1.00 2 1.00<Φ 0 Total Q TY 第 22 頁,共 29 頁 3 2.5 NO Item 05 Scratches Criterion AQL Follow NO.3 LCD black spots, white spots, contamination Symbols Define: x: Chip length y: Chip width z: Chip thickness k: Seal width t: Glass thickness a: LCD side length L: Electrode pad length: 6.1 General glass chip : 6.1.1 Chip on panel surface and crack between panels: 06 z: Chip thickness y: Chip width x: Chip length Chipped Z≦1/2t Not over viewing area x≦1/8a glass 1/2t<z≦2t Not exceed 1/3k x≦1/8a ☉If there are 2 or more chips, x is total length of each chip. 6.1.2 Corner crack: z: Chip thickness y: Chip width x: Chip length Z≦1/2t Not over viewing area x≦1/8a 1/2t<z≦2t Not exceed 1/3k x≦1/8a ☉If there are 2 or more chips, x is the total length of each chip. 第 23 頁,共 29 頁 2.5 NO Item Criterion AQL Symbols : x: Chip length y: Chip width z: Chip thickness k: Seal width t: Glass thickness a: LCD side length L: Electrode pad length 6.2 Protrusion over terminal : 6.2.1 Chip on electrode pad : y: Chip width x: Chip length z: Chip thickness y≦0.5mm x≦1/8a 0 < z≦t 6.2.2 Non-conductive portion: 06 Glass 2.5 crack y: Chip width x: Chip length z: Chip thickness y≦ L x≦1/8a 0 < z≦t ☉If the chipped area touches the ITO terminal, over 2/3 of the ITO must remain and be inspected according to electrode terminal specifications. ☉If the product will be heat sealed by the customer, the alignment mark not be damaged. 6.2.3 Substrate protuberance and internal crack. y: width x: length y≦1/3L x≦a 第 24 頁,共 29 頁 NO Item 07 Cracked glass 08 09 Backlight elements Bezel Criterion AQL The LCD with extensive crack is not acceptable. 2.5 8.1 Illumination source flickers when lit. 8.2 Spots or scratched that appear when lit must be judged. Using 0.65 2.5 LCD spot, lines and contamination standards. 8.3 Backlight doesn’t light or color wrong. 0.65 9.1 Bezel may not have rust, be deformed or have fingerprints, stains or other contamination. 9.2 Bezel must comply with job specifications. 2.5 0.65 10.1 COB seal may not have pinholes larger than 0.2mm or 2.5 contamination. 10.2 COB seal surface may not have pinholes through to the IC. 10.3 The height of the COB should not exceed the height 2.5 0.65 indicated in the assembly diagram. 10 PCB、COB 10.4 There may not be more than 2mm of sealant outside the seal area on the PCB. And there should be no more than three places. 10.5 No oxidation or contamination PCB terminals. 2.5 10.6 Parts on PCB must be the same as on the production characteristic chart. There should be no wrong parts, missing parts or excess parts. 10.7 The jumper on the PCB should conform to the product characteristic chart. 10.8 If solder gets on bezel tab pads, LED pad, zebra pad or screw hold pad, make sure it is smoothed down. 10.9 The Scraping testing standard for Copper Coating of PCB 0.65 2.5 0.65 2.5 2.5 X Y 11 Soldering X * Y

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498
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