Winstar Display Co., LTD
華凌光電股份有限公司
住址: 407 台中市中清路 163 號
No.163 Chung Ching RD.,
Taichune, Taiwan, R.O.C
WEB: http://www.winstar.com.tw
E-mail: sales@winstar.com.tw
Tel:886-4-24262208 Fax：886-4-24262207
SPECIFICATION
CUSTOMER
:
MODULE NO.:
WH1602B-TMI-ET#
APPROVED BY:
( FOR CUSTOMER USE ONLY )
SALES BY
PCB VERSION:
APPROVED BY
VERSION
DATE
REVISED
PAGE NO.
C
2009/4/29
20
DATA:
CHECKED BY
PREPARED BY
SUMMARY
Modify backlight
information.
第 1 頁，共 28 頁
Winstar Display Co., LTD MODLE NO：
華凌光電股份有限公司
RECORDS OF REVISION
DOC. FIRST ISSUE
REVISED
PAGE NO. SUMMARY
VERSION
DATE
0
A
2006-10-10
2008/5/12
20
B
2008/10/15
20
C
2009/4/29
20
First issue
Modify backlight
information.
Modify backlight
information.
Modify backlight
information.
第 2 頁，共 28 頁
Contents
1.Module Classification Information
2.Precautions in use of LCD Modules
3.General Specification
4.Absolute Maximum Ratings
5.Electrical Characteristics
6.Optical Characteristics
7.Interface Pin Function
8.Contour Drawing & Block Diagram
9.Function Description
10.Character Generator ROM Pattern
11.Instruction Table
12.Timing Characteristics
13.Initializing of LCM
14.Reliability
15.Backlight Information
16. Inspection specification
17. Material List of Components for RoHs
第 3 頁，共 28 頁
1.Module Classification Information
WH
cd
1602
e
B－T M I－
ET#
f ghi
j
c
d
e
f
g
Brand：WINSTAR DISPLAY CORPORATION
Display Type：H→Character Type, G→Graphic Type
Display Font：Character 16 words, 2Lines.
Model serials no.
Backlight Type： N→Without backlight
A→LED, Amber
B→EL, Blue green
R→LED, Red
D→EL, Green
O→LED, Orange
W→EL, White
G→LED, Green
F→CCFL, White
T→LED, White
Y→LED, Yellow Green
h LCD Mode：
B→TN Positive, Gray
T→FSTN Negative
N→TN Negative,
G→STN Positive, Gray
Y→STN Positive, Yellow Green
M→STN Negative, Blue
F→FSTN Positive
i LCD Polarize
A→Reflective, N.T, 6:00
H→Transflective, W.T,6:00
Type/ Temperature D→Reflective, N.T, 12:00
K→Transflective, W.T,12:00
range/ View
G→Reflective, W. T, 6:00
C→Transmissive, N.T,6:00
direction
J→Reflective, W. T, 12:00
F→Transmissive, N.T,12:00
B→Transflective, N.T,6:00
I→Transmissive, W. T, 6:00
E→Transflective, N.T.12:00 L→Transmissive, W.T,12:00
j Special Code
ET : English and European standard font
#:Fit in with the ROHS Directions and regulations
第 4 頁，共 28 頁
2.Precautions in use of LCD Modules
(1)Avoid applying excessive shocks to the module or making any alterations or modifications to it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the components of
LCD module.
(3)Don’t disassemble the LCM.
(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.
(8). Winstar have the right to change the passive components
(9). Winstar have the right to change the PCB Rev.
3.General Specification
Item
Dimension
Unit
16 characters x 2 Lines
－
80.0 x 36.0 x 13.5(MAX)
mm
View area
66.0 x 16.0
mm
Active area
56.20 x 11.5
mm
Dot size
0.55 x 0.65
mm
Dot pitch
0.60 x 0.70
mm
Character size
2.95 x 5.55
mm
Character pitch
3.55 x 5.95
mm
Number of Characters
Module dimension
LCD type
STN Negative, Blue Transmissive
(In LCD production, It will occur slightly color difference. We
can only guarantee the same color in the same batch.)
Duty
1/16
View direction
6 o’clock
Backlight Type
LED white
第 5 頁，共 28 頁
4.Absolute Maximum Ratings
Item
Symbol
Min
Typ
Max
Unit
Operating Temperature
TOP
-20
－
+70
℃
Storage Temperature
TST
-30
－
+80
℃
Input Voltage
VI
VSS
－
VDD
V
Supply Voltage For Logic
VDD-VSS
-0.3
－
7
V
Supply Voltage For LCD
VDD-V0
-0.3
－
13
V
5.Electrical Characteristics
Item
Supply Voltage For Logic
Symbol
Condition
Min
Typ
Max
Unit
VDD-VSS
－
4.5
5.0
5.5
V
Ta=-20℃
－
－
5.2
V
Ta=25℃
－
3.7
－
V
Ta=70℃
3.2
－
－
V
Supply Voltage For LCD
*Note
VDD-V0
Input High Volt.
VIH
－
0.7
－
VDD
V
Input Low Volt.
VIL
－
Vss
－
0.6
V
Output High Volt.
VOH
－
3.9
－
VDD
V
Output Low Volt.
VOL
－
0
－
0.4
V
Supply Current
IDD
VDD=5V
1.0
1.2
1.5
mA
* Note: Please design the VOP adjustment circuit on customer's main board
第 6 頁，共 28 頁
6.Optical Characteristics
Item
Symbol
Condition
Min
Typ
Max
Unit
(V)θ
CR≧5
20
－
40
deg
(H)φ
CR≧5
-30
－
30
deg
CR
－
－
3
－
－
T rise
－
－
150
200
ms
T fall
－
－
150
200
ms
View Angle
Contrast Ratio
Response Time
Definition of Operation Voltage (Vop)
Intensity
100％
Definition of Response Time ( Tr , Tf )
Non-selected
Conition
Selected Wave
Non-selected Wave
Selected Conition
Non-selected
Conition
Intensity
10％
Cr Max
Cr = Lon / Loff
90％
100％
Vop
Tr
Driving Voltage(V)
[positive type]
Tf
[positive type]
Conditions :
Operating Voltage : Vop
Viewing Angle(θ，φ) : 0°， 0°
Frame Frequency : 64 HZ
Driving Waveform : 1/N duty , 1/a bias
Definition of viewing angle(CR≧2)
θb
θf
θl
φ= 180°
θr
φ= 90°
φ= 270°
φ= 0°
第 7 頁，共 28 頁
7.Interface Pin Function
Pin No. Symbol
Level
Description
1
VSS
0V
Ground
2
VDD
5.0V
3
VO
4
RS
H/L
H: DATA, L: Instruction code
5
R/W
H/L
H: Read(MPU→Module) L: Write(MPU→Module)
6
E
H,H→L
7
DB0
H/L
Data bus line
8
DB1
H/L
Data bus line
9
DB2
H/L
Data bus line
10
DB3
H/L
Data bus line
11
DB4
H/L
Data bus line
12
DB5
H/L
Data bus line
13
DB6
H/L
Data bus line
14
DB7
H/L
Data bus line
15
A
－
LED +
16
K
－
LED－
Supply Voltage for logic
(Variable) Operating voltage for LCD
Chip enable signal
第 8 頁，共 28 頁
80.0 0.5
71.2
66.0(VA)
56.2(AA)
P2.54*15=38.1
1.8 16-21.0 PTH
8.9
18.3
16
31.0
K
11.5
A
40.55
2.5
75.0
4-22.5 PTH
4-25.0 PAD
1.6
LED B/L
3.55
2.95
0.6
5.95
5.55
0.7
0.65
0.6
0.55
0.4
25.2
16.0(VA)
36.0 0.5
1
13.5Max
2.5
4.95
7.55
12.45
8.0
2
12.55
10.3
5.7
8.Contour Drawing &Block Diagram
DOT SIZE
SCALE 5/1
第 9 頁，共 28 頁
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Vss
Vdd
Vo
RS
R/W
E
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
A
K
9.Function Description
The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an
instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information for
display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written from the
MPU. The DR temporarily stores data to be written or read from DDRAM or CGRAM. When
address information is written into the IR, then data is stored into the DR from DDRAM or CGRAM.
By the register selector (RS) signal, these two registers can be selected.
RS
R/W
Operation
0
0
IR write as an internal operation (display clear, etc.)
0
1
Read busy flag (DB7) and address counter (DB0 to DB7)
1
0
Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM)
1
1
Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR)
Busy Flag (BF)
When the busy flag is 1, the controller LSI is in the internal operation mode, and the next instruction
will not be accepted. When RS=0 and R/W=1, the busy flag is output to DB7. The next instruction
must be written after ensuring that the busy flag is 0.
Address Counter (AC)
The address counter (AC) assigns addresses to both DDRAM and CGRAM
Display Data RAM (DDRAM)
This DDRAM is used to store the display data represented in 8-bit character codes. Its extended
capacity is 80×8 bits or 80 characters. Below figure is the relationships between DDRAM addresses
and positions on the liquid crystal display.
High bits
Low bits
Example: DDRAM addresses 4E
AC
(hexadecimal)
AC6 AC5 AC4 AC3 AC2 AC1 AC0
第 10 頁，共 28 頁
1
0
0
1
1
1
0
Display position DDRAM address
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
2-Line by 16-Character Display
Character Generator ROM (CGROM)
The CGROM generate 5×8 dot or 5×10 dot character patterns from 8-bit character codes. See Table 2.
Character Generator RAM (CGRAM)
In CGRAM, the user can rewrite character by program. For 5×8 dots, eight character patterns can be
written, and for 5×10 dots, four character patterns can be written.
Write into DDRAM the character code at the addresses shown as the left column of table 1. To show
the character patterns stored in CGRAM.
第 11 頁，共 28 頁
Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character patterns
Table 1.
F o r 5 * 8 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s
( D D R A M d a ta )
7
6
5
4
3
H ig h
0
0
0
0
0
0
0
0
0
2
1
0
Low
0
0
0
* 0
* 0
*
1
0
0
1
C h a ra c te r P a tte rn s
( C G R A M d a ta )
C G R A M A d d re ss
5
4
3
2
1
0
7
Low
0 0
0 0
0 1
0 1
0 0 0 1 0
1 0
1 1
1 1
0 0
0 0
0 1
0 1
0 0 1
1 0
1 0
1 1
1 1
0 0
0 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
H ig h
0
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
*
6
5
H ig h
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
* *
*
4
3
2
1
0
Low
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C h a ra c te r
p a tte rn ( 1 )
0
0
0
0
C u rs o r p a tte rn
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C h a ra c te r
p a tte rn ( 2 )
C u rs o r p a tte rn
*
F o r 5 * 1 0 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s
( D D R A M d a ta )
7
6
5
4
H ig h
0
0
0
3
2
1
0
Low
0
* 0
0
C h a ra c te r P a tte rn s
( C G R A M d a ta )
C G R A M A d d re ss
5
4
3
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
0
1
1
H ig h
0
0
2
1
0
7
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
*
*
*
*
*
*
*
*
*
*
*
1
1
*
Low
6
5
4
3
1
0
*
*
*
*
*
*
*
*
*
*
*
* 0
* 0
*
*
*
*
*
*
*
*
* 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
*
*
*
*
*
H ig h
: " H ig h "
第 12 頁，共 28 頁
2
Low
*
C h a ra c te r
p a tte rn
C u rs o r p a tte rn
10.Character Generator ROM Pattern
Upper
4 bit
Lower
4 bit
LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH
LLLL
CG
RAM
(1)
LLLH
CG
RAM
(2)
LLHL
CG
RAM
(3)
LLHH
CG
RAM
(4)
LHLL
CG
RAM
(5)
LHLH
CG
RAM
(6)
LHHL
CG
RAM
(7)
LHHH
CG
RAM
(8)
HLLL
CG
RAM
(1)
HLLH
CG
RAM
(2)
HLHL
CG
RAM
(3)
HLHH
CG
RAM
(4)
HHLL
CG
RAM
(5)
HHLH
CG
RAM
(6)
HHHL
CG
RAM
(7)
HHHH
CG
RAM
(8)
第 13 頁，共 28 頁
11.Instruction Table
Instruction Code
Instruction
Execution time
Description
(fosc=270Khz)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Clear Display
0
0
0
0
0
0
0
0
0
1
Write “00H” to DDRAM and set
DDRAM address to “00H” from AC
1.53ms
1.53ms
Return Home
0
0
0
0
0
0
0
0
1
－
Set DDRAM address to “00H” from AC
and return cursor to its original position
if shifted. The contents of DDRAM are
not changed.
Entry Mode
Set
0
0
0
0
0
0
0
1
I/D
SH
Assign cursor moving direction and
enable the shift of entire display.
39μs
Display
ON/OFF
Control
0
0
0
0
0
0
1
D
C
B
Set display (D), cursor (C), and blinking
of cursor (B) on/off control bit.
39μs
Cursor or
Display Shift
0
0
0
0
0
1
－
－ control bit, and the direction, without
Function Set
Set CGRAM
Address
Set DDRAM
Address
Set cursor moving and display shift
S/C R/L
39μs
changing of DDRAM data.
Set interface data length
(DL:8-bit/4-bit), numbers of display line
(N:2-line/1-line)and, display font type
(F:5×11 dots/5×8 dots)
39μs
AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter.
39μs
1
DL
N
F
－
－
0
0
0
0
0
0
0
1
0
0
1
AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter.
39μs
Whether during internal operation or not
can be known by reading BF. The
AC6 AC5 AC4 AC3 AC2 AC1 AC0
contents of address counter can also be
read.
0μs
Read Busy
Flag and
Address
0
1
BF
Write Data to
RAM
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Write data into internal RAM
(DDRAM/CGRAM).
43μs
Read Data
from RAM
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read data from internal RAM
(DDRAM/CGRAM).
43μs
＊ ”－”：don’t care
第 14 頁，共 28 頁
12.Timing Characteristics
12.1
Write Operation
Ta=25℃, VDD=5.0V
Item
Symbol
Min
Typ
Max
Unit
Enable cycle time
TC
1200
－
－
ns
Enable pulse width
TPW
140
－
－
ns
Enable rise/fall time
TR,TF
－
－
25
ns
Address set-up time (RS, R/W to E)
tAS
0
－
－
ns
Address hold time
tAH
10
－
－
ns
Data set-up time
tDSW
40
－
－
ns
tH
10
－
－
ns
Data hold time
第 15 頁，共 28 頁
12.2
Read Operation
Ta=25℃, VDD=5V
Item
Symbol
Min
Typ
Max
Unit
TC
1200
－
－
ns
TPW
140
－
－
ns
TR,TF
－
－
25
ns
Address set-up time (RS, R/W to E)
tAS
0
－
－
ns
Address hold time
tAH
10
－
－
ns
Data delay time
tDDR
－
－
100
ns
Data hold time
tH
10
－
－
ns
Enable cycle time
Enable pulse width (high level)
Enable rise/fall time
第 16 頁，共 28 頁
13.Initializing of LCM
Power on
Wait for more than 40 ms after VDD rises to 4.5 V
BF can not be checked before this instruction.
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set
0
*
0
0
1
1
0
*
*
*
Wait for more than 39us
BF can not be checked before this instruction.
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
*
*
*
0
0
0
1
0
*
0
*
*
*
*
*
0
N F
*
Function set
Wait for more than 39 µs
BF can not be checked before this instruction.
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
*
*
* Function set
0
1
0
*
0
0
N F
*
*
*
*
*
*
0
Wait for more than 37us
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control
0
0
*
* *
*
0
0
0
0
0
*
* *
*
1
D C B
0
Wait for more than 37 µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear
0
0
0
*
*
*
*
0
0
0
0
1
0
*
*
*
*
0
0
0
Wait for more than 1.53ms
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set
0
0
*
* *
*
0
0
0
0
0
* *
*
0
0
1
I/D SH *
Initialization ends
4-Bit Ineterface
第 17 頁，共 28 頁
Power on
Wait for more than 40 ms after VDDrises to 4.5 V
BF can not be checked before this instruction.
RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set
0 0 0 0 1 1 N F * *
Wait for more than 39us
BF can not be checked before this instruction.
RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Function set
0 0 0 0 1 1 N F * *
Wait for more than 37us
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control
0 0 0 0 0 0 1 B C D
Wait for more than 37 µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear
0 0 0 0 0 0 0 0 0 1
Wait for more than 1.53ms
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set
0 0 0 0 0 0 0 1 I/D S
Initialization ends
8-Bit Ineterface
第 18 頁，共 28 頁
14.Reliability
Content of Reliability Test (wide temperature, -20℃~70℃)
Environmental Test
Test Item
High Temperature
storage
Low Temperature
storage
High Temperature
Operation
Low Temperature
Operation
High Temperature/
Humidity Operation
Thermal shock
resistance
Content of Test
Endurance test applying the high storage
temperature for a long time.
Endurance test applying the high storage
temperature for a long time.
Endurance test applying the electric stress
(Voltage & Current) and the thermal stress to the
element for a long time.
Endurance test applying the electric stress under
low temperature for a long time.
The module should be allowed to stand at 60
℃,90%RH max
For 96hrs under no-load condition excluding the
polarizer,
Then taking it out and drying it at normal
temperature.
The sample should be allowed stand the
following 10 cycles of
operation
-20℃
25℃
70℃
30min
1 cycle
Vibration test
Static electricity test
5min
Test Condition
80℃
200hrs
-30℃
200hrs
Note
2
1,2
70℃
200hrs
——
-20℃
200hrs
1
60℃,90%RH
96hrs
-20℃/70℃
10 cycles
1,2
——
30min
Endurance test applying the vibration during
transportation and using.
Total fixed
amplitude : 1.5mm
Vibration
Frequency :
10~55Hz
One cycle 60
seconds to 3
directions of X,Y,Z
for
Each
15 minutes
Endurance test applying the electric stress to the
terminal.
VS=800V,RS=1.5k
Ω
——
CS=100pF
1 time
Note1: No dew condensation to be observed.
Note2: The function test shall be conducted after 4 hours storage at the normal
Temperature and humidity after remove from the test chamber.
Note3: Vibration test will be conducted to the product itself without putting it in a container.
第 19 頁，共 28 頁
3
15.Backlight Information
Specification
PARAMETER
SYMBOL MIN
TYP
MAX
UNIT
TEST
Supply Current
ILED
14.4
16
20
mA
V=3.5V
Supply Voltage
V
3.3
3.5
3.7
V
－
Reverse Voltage
VR
－
－
5
V
－
IV
264
330
－
CD/M2 ILED=16mA
Luminous
Intensity
Chromaticity
x
－
0.300
－
－
－
y
－
0.310
－
－
－
ILED≦16mA
LED Life Time
(For Reference
only)
Color
CONDITION
－
－
50K
－
Hr.
25℃,50-60%RH,
(Note 1)
White
Note: The LED of B/L is drive by current only, drive voltage is for reference only.
drive voltage can make driving current under safety area (current between
minimum and maximum).
Note1 :50K hours is only an estimate for reference.
2.Drive from pin15,pin16
R
R
A
B/L
K
LCM
ill never get Vee output from pin15)
第 20 頁，共 28 頁
16. Inspection specification
NO
01
02
Item
Criterion
AQL
Electrical
Testing
1.1 Missing vertical, horizontal segment, segment contrast defect.
1.2 Missing character , dot or icon.
1.3 Display malfunction.
1.4 No function or no display.
1.5 Current consumption exceeds product specifications.
1.6 LCD viewing angle defect.
1.7 Mixed product types.
1.8 Contrast defect.
0.65
Black or white 2.1 White and black spots on display ≦0.25mm, no more than
spots on LCD
three white or black spots present.
(display only) 2.2 Densely spaced: No more than two spots or lines within 3mm
3.1 Round type : As following drawing
Φ=( x + y ) / 2
SIZE
Φ≦0.10
03
LCD black
spots, white
spots,
contamination
(non-display)
L≦3.0
L≦2.5
---
04
Polarizer
bubbles
If bubbles are visible,
judge using black spot
specifications, not easy
to find, must check in
specify direction.
Acceptable Q TY
Accept no dense
0.10＜Φ≦0.20
2
0.20＜Φ≦0.25
1
0.25＜Φ
0
3.2 Line type : (As following drawing)
Length
Width
--W≦0.02
0.05＜W
Size Φ
Φ≦0.20
Accept no dense
2.5
2
As round type
Acceptable Q TY
Accept no dense
0.20＜Φ≦0.50
3
0.50＜Φ≦1.00
2
1.00＜Φ
Total Q TY
0
第 21 頁，共 28 頁
2.5
Acceptable Q TY
0.02＜W≦0.03
0.03＜W≦0.05
2.5
3
2.5
NO
Item
05
Scratches
Criterion
AQL
Follow NO.3 LCD black spots, white spots, contamination
Symbols Define:
x: Chip length
y: Chip width
z: Chip thickness
k: Seal width
t: Glass thickness a: LCD side length
L: Electrode pad length:
6.1 General glass chip :
6.1.1 Chip on panel surface and crack between panels:
06
Chipped
glass
z: Chip thickness
y: Chip width
x: Chip length
Z≦1/2t
Not over viewing area
x≦1/8a
1/2t＜z≦2t
Not exceed 1/3k
x≦1/8a
☉If there are 2 or more chips, x is total length of each chip.
6.1.2 Corner crack:
z: Chip thickness
y: Chip width
x: Chip length
Z≦1/2t
Not over viewing area
x≦1/8a
1/2t＜z≦2t
Not exceed 1/3k
x≦1/8a
☉If there are 2 or more chips, x is the total length of each chip.
第 22 頁，共 28 頁
2.5
NO
Item
Criterion
AQL
Symbols :
x: Chip length
y: Chip width
z: Chip thickness
k: Seal width
t: Glass thickness a: LCD side length
L: Electrode pad length
6.2 Protrusion over terminal :
6.2.1 Chip on electrode pad :
y: Chip width
x: Chip length
z: Chip thickness
y≦0.5mm
x≦1/8a
0 ＜ z≦t
6.2.2 Non-conductive portion:
06
Glass
crack
2.5
y: Chip width
x: Chip length
z: Chip thickness
y≦ L
x≦1/8a
0 ＜ z≦t
☉If the chipped area touches the ITO terminal, over 2/3 of the ITO must
remain and be inspected according to electrode terminal specifications.
☉If the product will be heat sealed by the customer, the alignment mark
not be damaged.
6.2.3 Substrate protuberance and internal crack.
y: width
x: length
y≦1/3L
x≦a
第 23 頁，共 28 頁
NO
Item
07
Cracked glass
08
09
10
Backlight
elements
Bezel
PCB、COB
Criterion
AQL
The LCD with extensive crack is not acceptable.
2.5
8.1 Illumination source flickers when lit.
8.2 Spots or scratched that appear when lit must be judged. Using
LCD spot, lines and contamination standards.
8.3 Backlight doesn＇t light or color wrong.
0.65
2.5
9.1 Bezel may not have rust, be deformed or have fingerprints,
stains or other contamination.
9.2 Bezel must comply with job specifications.
10.1 COB seal may not have pinholes larger than 0.2mm or
contamination.
10.2 COB seal surface may not have pinholes through to the IC.
10.3 The height of the COB should not exceed the height
indicated in the assembly diagram.
10.4 There may not be more than 2mm of sealant outside the
seal area on the PCB. And there should be no more than
three places.
10.5 No oxidation or contamination PCB terminals.
10.6 Parts on PCB must be the same as on the production
characteristic chart. There should be no wrong parts,
missing parts or excess parts.
10.7 The jumper on the PCB should conform to the product
characteristic chart.
10.8 If solder gets on bezel tab pads, LED pad, zebra pad or
screw hold pad, make sure it is smoothed down.
10.9 The Scraping testing standard for Copper Coating of PCB
0.65
2.5
0.65
2.5
2.5
0.65
2.5
2.5
0.65
0.65
2.5
2.5
X
Y
11
Soldering
X * Y
工商网监
湘ICP备2023018690号
