Product Specification
Part Name: OEL Display Module
Part ID:
UG-2864HSWEG01
Doc No.: SAS1-9046-B
Customer:
Approved by
From: Univision Technology Inc.
Approved by
Univision Technology Inc.
8, Kebei RD 2, Science Park, Chu-Nan, Taiwan 350, R.O.C.
Notes:
1. Please contact Univision Technology Inc. before assigning your product based on this
module specification
2. The information contained herein is presented merely to indicate the characteristics and
performance of our products. No responsibility is assumed by Univision Technology
Inc. for any intellectual property claims or other problems that may result from
application based on the module described herein.
Univision Technology Inc.
Doc. No: SAS1-9046-B
Revised History
Part Number
Revision
UG-2864HSWEG01
A
Revision Content
New
Page 5~6 Section 1.6
Revised on
February 17, 2009
Update Application Circuit
Page 7
Section 2
Update Absolute Maximum Ratings
Page 8
UG-2864HSWEG01
B
Section 3.1 & 3.2
Modify Brightness
VCC Supplied Externally
(Min/Typ) 80/100Î100/120
VCC Generated by Internal DC/DC
(Min/Typ) 50/60Î70/90
Update DC Characteristics
Page 15
June 5, 2009
Section 4.4
Update Initialization
i
Univision Technology Inc.
Doc. No: SAS1-9046-B
Notice:
No part of this material may be reproduces or duplicated in any form or by any means
without the written permission of Univision Technology Inc. Univision Technology Inc.
reserves the right to make changes to this material without notice. Univision Technology
Inc. does not assume any liability of any kind arising out of any inaccuracies contained in this
material or due to its application or use in any product or circuit and, further, there is no
representation that this material is applicable to products requiring high level reliability, such
as, medical products. Moreover, no license to any intellectual property rights is granted by
implication or otherwise, and there is no representation or warranty that anything made in
accordance with this material will be free from any patent or copyright infringement of a
third party. This material or portions thereof may contain technology or the subject relating
to strategic products under the control of Foreign Exchange and Foreign Trade Law of
Taiwan and may require an export license from the Ministry of International Trade and
Industry or other approval from another government agency.
© Univision Technology Inc. 2009, All rights reserved.
All other product names mentioned herein are trademarks and/or registered trademarks of
their respective companies.
ii
Univision Technology Inc.
Doc. No: SAS1-9046-B
Contents
Revision History ................................................................................................... i
Notice ................................................................................................................... ii
Contents .............................................................................................................. iii
1. Basic Specifications .................................................................................. 1~6
1.1
1.2
1.3
1.4
1.5
1.6
Display Specifications .................................................................................................1
Mechanical Specifications ...........................................................................................1
Active Area & Pixel Construction ...............................................................................1
Mechanical Drawing....................................................................................................2
Pin Definition...............................................................................................................3
Block Diagram .............................................................................................................5
1.6.1 VCC Supplied Externally ....................................................................................5
1.6.2 VCC Generated by Internal DC/DC Circuit........................................................6
2. Absolute Maximum Ratings .......................................................................... 7
3. Optics & Electrical Characteristics ......................................................... 8~13
3.1 Optics Characteristics ..................................................................................................8
3.2 DC Characteristics .......................................................................................................8
3.3 AC Characteristics .......................................................................................................9
3.3.1 68XX-Series MPU Parallel Interface Timing Characteristics ...........................9
3.3.2 80XX-Series MPU Parallel Interface Timing Characteristics .........................10
3.3.3 Serial Interface Timing Characteristics (4-wire SPI).......................................11
3.3.4 Serial Interface Timing Characteristics (3-wire SPI).......................................12
3.3.5 I2C Interface Timing Characteristics ...............................................................13
4. Functional Specification ....................................................................... 14~15
4.1 Commands .................................................................................................................14
4.2 Power down and Power up Sequence ........................................................................14
4.2.1 Power up Sequence ..........................................................................................14
4.2.2 Power down Sequence .....................................................................................14
4.3 Reset Circuit...............................................................................................................14
4.4 Actual Application Example ......................................................................................15
5. Reliability ...................................................................................................... 16
5.1 Contents of Reliability Tests......................................................................................16
5.2 Lifetime......................................................................................................................16
5.3 Failure Check Standard..............................................................................................16
6. Outgoing Quality Control Specifications .............................................. 17~21
6.1 Environment Required ...............................................................................................17
6.2 Sampling Plan ............................................................................................................17
6.3 Criteria & Acceptable Quality Level .........................................................................17
6.3.1 Cosmetic Check (Display Off) in Non-Active Area ........................................17
6.3.2 Cosmetic Check (Display Off) in Active Area.................................................20
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Univision Technology Inc.
Doc. No: SAS1-9046-B
6.3.3 Pattern Check (Display On) in Active Area.....................................................21
7. Package Specifications ................................................................................ 22
8. Precautions When Using These OEL Display Modules ....................... 23~25
8.1
8.2
8.3
8.4
8.5
Handling Precautions .................................................................................................23
Storage Precautions....................................................................................................24
Designing Precautions ...............................................................................................24
Precautions when disposing of the OEL display modules.........................................25
Other Precautions.......................................................................................................25
iv
Univision Technology Inc.
Doc. No: SAS1-9046-B
1. Basic Specifications
1.1 Display Specifications
1)
2)
3)
Display Mode:
Display Color:
Drive Duty:
Passive Matrix
Monochrome (White)
1/64 Duty
1.2 Mechanical Specifications
1)
2)
3)
4)
5)
6)
7)
Outline Drawing:
Number of Pixels:
Panel Size:
Active Area:
Pixel Pitch:
Pixel Size:
Weight:
According to the annexed outline drawing
128 × 64
26.70 × 19.26 × 1.45 (mm)
21.744 × 10.864 (mm)
0.17 × 0.17 (mm)
0.154 × 0.154 (mm)
1.54 (g)
1.3 Active Area & Pixel Construction
P0.17x128-0.016=21.744
"A"
0.17
0.154
P0.17x64-0.016=10.864
0.17
0.154
Segment 127
( Column 1 )
Common 32
( Row 63 )
Common 63
( Row 1 )
Segment 0
( Column 128 )
Common 0
Detail "A"
Scale (10:1)
( Row 64 )
Common 31
( Row 2 )
1
VCC
E/RD#
R/W#
D2
D/C#
D0
CS#
BS1
RES#
VDD
VSS
BS2
N.C.
BS0
C1N
C2N
VBAT
C1P
2-R0.4±0.05
30
Contact Side
8
2±0.3
Customer Approval
Signature
1.45±0.1
4
4.75
6.887
mm
Tolerance
±0.3
Dimension
Angle
±1
General Roughness
By
Date
Title
( Row 1 )
Common 63
0.17
0.154
Segment 0
Drawn
Humphrey Lin
20090120
E.E.
James Wang
20090120
Panel / E.
Ivy Lo
20090120
Remark
Original Drawing
B
Material
DMX2864SDGF46
Drawing Number
Symbol
N.C. (GND)
C2P
C2N
C1P
C1N
VBAT
N.C.
VSS
VDD
BS0
BS1
BS2
CS#
RES#
D/C#
R/W#
E/RD#
D0
D1
D2
D3
D4
D5
D6
D7
IREF
VCOMH
VCC
VLSS
N.C. (GND)
Rev.
B
Scale
1:1
Sheet
1 of 1
Size
A3
Soda Lime / Polyimide
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Change FPC & Modify Pin Definition
P.M.
Cherry Lin
20090120
UG-2864HSWEG01 Folding Type OEL Display Module
Pixel Number: 128 x 64, Monochrome, COG Package
( Row 2 )
Common 31
( Row 64 )
Common 0
( Column 128 )
Detail "A"
Scale (10:1)
Univision Technology Inc.
P0.17x64-0.016=10.864
Unit
Unless Otherwise Specified
0.1±0.03
(1.613)
Common 32
( Column 1 )
( Row 63 )
Date
20080910
20090120
P0.17x128-0.016=21.744
Segment 127
"A"
0.154
0.17
VLSS
C2P
1. Color: White
2. Driver IC: SSD1306
3. FPC Number: UT-0206-P05 B
4. Interface:
8-bit 68XX/80XX Parallel, 3-/4-wire SPI, I2C
5. General Tolerance: ±0.30
6. The total thickness (1.55 Max) is without polarizer protective film & remove tape.
The actual assembled total thickness with above materials should be 1.80 Max.
12±0.2
16±0.1 (Alignment Mark)
P0.70x(30-1)=20.3±0.05 (W0.40±0.03)
0.85±0.1
22±0.2
D4
5
3M #1318B
15x8x0.063mm
(2.35)
1
10
Active Area 0.96"
128 x 64 Pixels
D1
0.5±0.5
(1.478)
(2.478)
Contact Side
Notes:
11
12±0.3
N.C. (GND)
26.7±0.2 (Panel Size)
26.7±0.2 (Cap Size)
25.7±0.5 (Polarizer)
23.744 (V/A)
21.744 (A/A)
D6
10.864 (A/A)
12.864 (V/A)
14.4±0.5 (Polarizer)
15.5±0.2 (Cap Size)
19.26±0.2 (Panel Size)
(31.26)
D3
(2.1)
(1.1)
0.5±0.5
Polarizer
t=0.2mm
D5
Glue
IREF
Remove Tape
t=0.15mm Max
(1.6)
D7
(20.86)
N.C. (GND)
(10.55)
VCOMH
Item
A
B
Univision Technology Inc.
Doc. No: SAS1-9046-B
1.4 Mechanical Drawing
2
The drawing contained herein is the exclusive property of Univision. It is not allowed to copy, reproduce and or disclose in any formats without permission of Univision.
Univision Technology Inc.
Doc. No: SAS1-9046-B
1.5 Pin Definition
Pin Number
Symbol
Type
9
VDD
P
8
VSS
P
Function
Power Supply
Power Supply for Logic
This is a voltage supply pin. It must be connected to
external source.
Ground of Logic Circuit
This is a ground pin. It acts as a reference for the logic
pins. It must be connected to external ground.
Power Supply for OEL Panel
28
VCC
P
29
VLSS
P
This is the most positive voltage supply pin of the chip.
A stabilization capacitor should be connected between
this pin and VSS when the converter is used. It must be
connected to external source when the converter is not
used.
Ground of Analog Circuit
This is an analog ground pin. It should be connected to VSS
externally.
Driver
Current Reference for Brightness Adjustment
26
IREF
I
This pin is segment current reference pin. A resistor
should be connected between this pin and VSS. Set the
current lower than 12.5μA.
Voltage Output High Level for COM Signal
27
VCOMH
O
This pin is the input pin for the voltage output high level
for COM signals. A capacitor should be connected
between this pin and VSS.
DC/DC Converter
Power Supply for DC/DC Converter Circuit
6
4/5
2/3
VBAT
C1P / C1N
C2P / C2N
P
I
This is the power supply pin for the internal buffer of the
DC/DC voltage converter. It must be connected to
external source when the converter is used. It should be
connected to VDD when the converter is not used.
Positive Terminal of the Flying Inverting Capacitor
Negative Terminal of the Flying Boost Capacitor
The charge-pump capacitors are required between the
terminals. They must be floated when the converter is
not used.
Interface
Communicating Protocol Select
10
11
12
BS0
BS1
BS2
I
14
RES#
I
These pins are MCU interface selection input. See the
following table:
BS0
BS1
BS2
I2C
0
1
0
3-wire SPI
1
0
0
4-wire SPI
0
0
0
8-bit 68XX Parallel
0
0
1
8-bit 80XX Parallel
0
1
1
Power Reset for Controller and Driver
This pin is reset signal input. When the pin is low,
initialization of the chip is executed.
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Univision Technology Inc.
Doc. No: SAS1-9046-B
1.5 Pin Definition (Continued)
Pin Number
Symbol
I/O
Function
Interface (Continued)
Chip Select
13
CS#
I
This pin is the chip select input. The chip is enabled for
MCU communication only when CS# is pulled low.
Data/Command Control
15
D/C#
I
This pin is Data/Command control pin. When the pin is
pulled high, the input at D7~D0 is treated as display data.
When the pin is pulled low, the input at D7~D0 will be
transferred to the command register.
For detail
relationship to MCU interface signals, please refer to the
Timing Characteristics Diagrams.
When the pin is pulled high and serial interface mode is
selected, the data at SDIN is treated as data. When it is
pulled low, the data at SDIN will be transferred to the
command register. In I2C mode, this pin acts as SA0 for
slave address selection.
Read/Write Enable or Read
17
E/RD#
I
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as the
Enable (E) signal. Read/write operation is initiated when
this pin is pulled high and the CS# is pulled low.
When connecting to an 80XX-microprocessor, this pin
receives the Read (RD#) signal. Data read operation is
initiated when this pin is pulled low and CS# is pulled
low.
Read/Write Select or Write
16
R/W#
I
This pin is MCU interface input. When interfacing to a
68XX-series microprocessor, this pin will be used as
Read/Write (R/W#) selection input. Pull this pin to
“High” for read mode and pull it to “Low” for write
mode.
When 80XX interface mode is selected, this pin will be
the Write (WR#) input. Data write operation is initiated
when this pin is pulled low and the CS# is pulled low.
Host Data Input/Output Bus
18~25
D0~D7
I/O
N.C.
-
These pins are 8-bit bi-directional data bus to be
connected to the microprocessor’s data bus. When serial
mode is selected, D1 will be the serial data input SDIN
and D0 will be the serial clock input SCLK. When I2C
mode is selected, D2 & D1 should be tired together and
serve as SDAout & SDAin in application and D0 is the
serial clock input SCL.
Reserve
Reserved Pin
7
The N.C. pins between function pins are reserved for
compatible and flexible design.
Reserved Pin (Supporting Pin)
1, 30
N.C. (GND)
-
The supporting pins can reduce the influences from
stresses on the function pins. These pins must be
connected to external ground.
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Univision Technology Inc.
Doc. No: SAS1-9046-B
1.6 Block Diagram
1.6.1 VCC Supplied Externally
~
Common 31
~ ~ ~
Common 0
Segment 0
Segment 127
~
Common 32
Common 63
Active Area 0.96"
128 x 64 Pixels
VLSS
IREF
VCOMH
VCC
~
D7
D0
VDD
BS0
BS1
BS2
CS#
RES#
D/C#
R/W#
E/RD#
C2P
C2N
C1P
C1N
VBAT
VSS
SSD1306
C5
C1
C2
R1
C3
C4
MCU Interface Selection:
BS0, BS1 and BS2
Pins connected to MCU interface: CS#, RES#, D/C#, R/W#, E/RD#, and
D0~D7
C1, C3:
C2:
C4, C5:
R1:
0.1μF
2.2μF
4.7μF / 16V, X7R
560kΩ, R1 = (Voltage at IREF – VSS) / IREF
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Univision Technology Inc.
Doc. No: SAS1-9046-B
1.6.2 VCC Generated by Internal DC/DC Circuit
~
Common 31
~ ~ ~
Common 0
Segment 0
Segment 127
~
Common 32
Common 63
Active Area 0.96"
128 x 64 Pixels
C6
C5
C2
C1
VLSS
IREF
VCOMH
VCC
~
D7
D0
VDD
BS0
BS1
BS2
CS#
RES#
D/C#
R/W#
E/RD#
VSS
C2P
C2N
C1P
C1N
VBAT
SSD1306
C3
C4
R1
MCU Interface Selection:
BS0, BS1 and BS2
Pins connected to MCU interface: CS#, RES#, D/C#, R/W#, E/RD#, and
D0~D7
C1, C2, C5, C6:
C3:
C4:
R1:
1μF
2.2μF
4.7μF / 16V, X7R
390kΩ, R1 = (Voltage at IREF – VSS) / IREF
6
Univision Technology Inc.
Doc. No: SAS1-9046-B
2. Absolute Maximum Ratings
Parameter
Symbol
Min
Max
Unit
Notes
Supply Voltage for Logic
VDD
-0.3
4
V
1, 2
Supply Voltage for Display
VCC
0
11
V
1, 2
Supply Voltage for DC/DC
VBAT
-0.3
5
V
1, 2
Operating Temperature
TOP
-30
70
°C
-
Storage Temperature
TSTG
-40
80
°C
-
Note 1: All the above voltages are on the basis of “VSS = 0V”.
Note 2: When this module is used beyond the above absolute maximum ratings,
permanent breakage of the module may occur. Also, for normal operations, it is
desirable to use this module under the conditions according to Section 3.
“Optics & Electrical Characteristics”. If this module is used beyond these
conditions, malfunctioning of the module can occur and the reliability of the
module may deteriorate.
7
Univision Technology Inc.
Doc. No: SAS1-9046-B
3. Optics & Electrical Characteristics
3.1 Optics Characteristics
Characteristics
Symbol
Brightness
Lbr
(VCC Supplied Externally)
Brightness
Lbr
(VCC Generated by Internal DC/DC)
(x)
C.I.E. (White)
(y)
Dark Room Contrast
CR
Conditions
With Polarizer
(Note 3)
With Polarizer
(Note 4)
Without Polarizer
View Angle
Min
Typ
Max Unit
100
120
-
cd/m2
70
90
-
cd/m2
0.28 0.32 0.36
0.29 0.33 0.37
- >2000:1 >160
-
-
degree
* Optical measurement taken at VDD = 2.8V, VCC = 9V & 7.25V.
Software configuration follows Section 4.4 Initialization.
3.2 DC Characteristics
Characteristics
Symbol
Conditions
Min
Typ Max Unit
Supply Voltage for Logic
Supply Voltage for Display
(Supplied Externally)
Supply Voltage for DC/DC
Supply Voltage for Display
(Generated by Internal DC/DC)
High Level Input
VDD
-
1.65
2.8
3.3
V
VCC
Note 3
8.5
9
9.5
V
VBAT
Internal DC/DC Enable
3.5
-
4.2
V
VCC
Note 4
7
7.25
7.5
V
VIH
-
-
VDD
V
Low Level Input
VIL
-
0.8×VDD
0
-
V
High Level Output
VOH
-
Low Level Output
VOL
IOUT = 100μA, 3.3MHz 0.9×VDD
IOUT = 100μA, 3.3MHz 0
0.2×VDD
VDD
Operating Current for VDD
IDD
Operating Current for VCC
(VCC Supplied Externally)
ICC
Operating Current for VBAT
(VCC Generated by Internal DC/DC)
IBAT
V
-
-
-
Note 5
-
0.1×VDD V
180 300 μA
7.3
9.1 mA
Note 6
-
12.3
15.4
mA
Note 7
-
17.3
21.6
mA
Note 8
-
23.1
28.9
mA
Sleep Mode Current for VDD IDD, SLEEP
-
-
1
5
μA
Sleep Mode Current for VCC ICC, SLEEP
-
-
1
5
μA
Note 3 & 4: Brightness (Lbr) and Supply Voltage for Display (VCC) are subject to the
change of the panel characteristics and the customer’s request.
Note 5:
VDD = 2.8V, VCC = 9V, 50% Display Area Turn on.
Note 6:
VDD = 2.8V, VCC = 9V, 100% Display Area Turn on.
Note 7:
VDD = 2.8V, VCC = 7.25V, 50% Display Area Turn on.
Note 8:
VDD = 2.8V, VCC = 7.25V, 100% Display Area Turn on.
8
Univision Technology Inc.
Doc. No: SAS1-9046-B
* Software configuration follows Section 4.4 Initialization.
3.3 AC Characteristics
3.3.1 68XX-Series MPU Parallel Interface Timing Characteristics:
Symbol Description
Min
Max
Unit
300
-
ns
tcycle
Clock Cycle Time
tAS
Address Setup Time
0
-
ns
tAH
Address Hold Time
0
-
ns
tDSW
Write Data Setup Time
40
-
ns
tDHW
Write Data Hold Time
7
-
ns
tDHR
Read Data Hold Time
20
-
ns
tOH
Output Disable Time
-
70
ns
tACC
Access Time
-
140
ns
-
ns
-
ns
PWCSL
PWCSH
Chip Select Low Pulse Width (Read)
120
Chip Select Low Pulse width (Write)
60
Chip Select High Pulse Width (Read)
60
Chip Select High Pulse Width (Write)
60
tR
Rise Time
-
40
ns
tF
Fall Time
-
40
ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25°C)
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Univision Technology Inc.
Doc. No: SAS1-9046-B
3.3.2 80XX-Series MPU Parallel Interface Timing Characteristics:
Symbol Description
Min
Max
Unit
tcycle
Clock Cycle Time
300
-
ns
tAS
Address Setup Time
10
-
ns
tAH
Address Hold Time
0
-
ns
tDSW
Write Data Setup Time
40
-
ns
tDHW
Write Data Hold Time
7
-
ns
tDHR
Read Data Hold Time
20
-
ns
tOH
Output Disable Time
-
70
ns
tACC
Access Time
-
140
ns
tPWLR
Read Low Time
120
-
ns
tPWLW
Write Low Time
60
-
ns
tPWHR
Read High Time
60
-
ns
tPWHW
Write High Time
60
-
ns
tCS
Chip Select Setup Time
0
-
ns
tCSH
Chip Select Hold Time to Read Signal
0
-
ns
tCSF
Chip Select Hold Time
20
-
ns
tR
Rise Time
-
40
ns
tF
Fall Time
-
40
ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25°C)
( Read Timing )
( Write Timing )
10
Univision Technology Inc.
Doc. No: SAS1-9046-B
3.3.3 Serial Interface Timing Characteristics: (4-wire SPI)
Symbol Description
Min
Max
Unit
tcycle
Clock Cycle Time
100
-
ns
tAS
Address Setup Time
15
-
ns
tAH
Address Hold Time
15
-
ns
tCSS
Chip Select Setup Time
20
-
ns
tCSH
Chip Select Hold Time
10
-
ns
tDSW
Write Data Setup Time
15
-
ns
tDHW
Write Data Hold Time
15
-
ns
tCLKL
Clock Low Time
20
-
ns
tCLKH
Clock High Time
20
-
ns
tR
Rise Time
-
40
ns
tF
Fall Time
-
40
ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25°C)
11
Univision Technology Inc.
Doc. No: SAS1-9046-B
3.3.4 Serial Interface Timing Characteristics: (3-wire SPI)
Symbol Description
Min
Max
Unit
tcycle
Clock Cycle Time
100
-
ns
tCSS
Chip Select Setup Time
20
-
ns
tCSH
Chip Select Hold Time
10
-
ns
tDSW
Write Data Setup Time
15
-
ns
tDHW
Write Data Hold Time
15
-
ns
tCLKL
Clock Low Time
20
-
ns
tCLKH
Clock High Time
20
-
ns
tR
Rise Time
-
40
ns
tF
Fall Time
-
40
ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25°C)
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Univision Technology Inc.
Doc. No: SAS1-9046-B
3.3.5 I2C Interface Timing Characteristics:
Symbol Description
tcycle
tHSTART
tHD
Min
Max
Unit
Clock Cycle Time
2.5
-
us
Start Condition Hold Time
0.6
-
us
-
ns
Data Hold Time (for “SDAOUT” Pin)
0
Data Hold Time (for “SDAIN” Pin)
300
100
-
ns
0.6
-
us
tSSTOP
Data Setup Time
Start Condition Setup Time
(Only relevant for a repeated Start
condition)
Stop Condition Setup Time
0.6
-
us
tR
Rise Time for Data and Clock Pin
300
ns
300
ns
-
us
tSD
tSSTART
tF
Fall Time for Data and Clock Pin
Idle Time before a New Transmission
tIDLE
can Start
* (VDD - VSS = 1.65V to 3.3V, Ta = 25°C)
1.3
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4. Functional Specification
4.1. Commands
Refer to the Technical Manual for the SSD1306
4.2 Power down and Power up Sequence
To protect OEL panel and extend the panel life time, the driver IC power up/down
routine should include a delay period between high voltage and low voltage power
sources during turn on/off. It gives the OEL panel enough time to complete the
action of charge and discharge before/after the operation.
4.2.1 Power up Sequence:
1.
2.
3.
4.
5.
6.
Power up VDD
Send Display off command
Initialization
Clear Screen
Power up VCC
Delay 100ms
(When VCC is stable)
7. Send Display on command
VDD on
VCC on
Display on
VCC
VDD
VSS/Ground
4.2.2 Power down Sequence:
1. Send Display off command
2. Power down VCC
3. Delay 100ms
(When VCC is reach 0 and panel
is completely discharges)
4. Power down VDD
Display off
VCC off
VDD off
VCC
VDD
VSS/Ground
4.3 Reset Circuit
When RES# input is low, the chip is initialized with the following status:
1. Display is OFF
2. 128×64 Display Mode
3. Normal segment and display data column and row address mapping (SEG0
mapped to column address 00h and COM0 mapped to row address 00h)
4. Shift register data clear in serial interface
5. Display start line is set at display RAM address 0
6. Column address counter is set at 0
7. Normal scan direction of the COM outputs
8. Contrast control register is set at 7Fh
9. Normal display mode (Equivalent to A4h command)
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4.4 Actual Application Example
Command usage and explanation of an actual example
Set Display Off
0xAE
Set Segment Re-Map
0xA1
Set Entire Display On/Off
0xA4
Set Display Clock Divide Ratio/Oscillator Frequency
0xD5, 0x80
Set COM Output Scan Direction
0xC8
Set Normal/Inverse Display
0xA6
Set Multiplex Ratio
0xA8, 0x3F
Set COM Pins Hardware Configuration
0xDA, 0x12
Clear Screen
Set Display Offset
0xD3, 0x00
* Set Contrast Control
0x81, 0x9F(1) / 0xCF(2)
Set Display On
0xAF
Set Display Start Line
0x40
* Set Pre-Charge Period
0xD9, 0x22(1) / 0xF1(2)
* Set Charge Pump
0x8D, 0x10(1) / 0x14(2)
Set VCOMH Deselect Level
0xDB, 0x40
* Written Value for Parameters
(1)
Î VCC Supplied Externally
(2)
Î VCC Generated by Internal DC/DC Circuit
If the noise is accidentally occurred at the displaying window during the operation,
please reset the display in order to recover the display function.
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5. Reliability
5.1 Contents of Reliability Tests
Item
Conditions
High Temperature Operation
70°C, 240 hrs
Low Temperature Operation
-30°C, 240 hrs
High Temperature Storage
80°C, 240 hrs
Low Temperature Storage
-40°C, 240 hrs
Criteria
The operational
functions work.
High Temperature/Humidity Operation 60°C, 90% RH, 120 hrs
-40°C ⇔ 85°C, 24 cycles
Thermal Shock
60 mins dwell
* The samples used for the above tests do not include polarizer.
* No moisture condensation is observed during tests.
5.2 Lifetime
End of lifetime is specified as 50% of initial brightness reached.
Parameter
Min
Operating Life Time 10,000
Storage Life Time
20,000
Max
Unit
Condition
Notes
-
hr
100 cd/m2, 50% Checkerboard
6
-
hr
Ta = 25°C, 50% RH
-
Note 6: The average operating lifetime at room temperature is estimated by the
accelerated operation at high temperature conditions.
5.3 Failure Check Standard
After the completion of the described reliability test, the samples were left at room
temperature for 2 hrs prior to conducting the failure test at 23±5°C; 55±15% RH.
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6. Outgoing Quality Control Specifications
6.1 Environment Required
Customer’s test & measurement are required to be conducted
conditions:
Temperature:
Humidity:
Fluorescent Lamp:
Distance between the Panel & Lamp:
Distance between the Panel & Eyes of the Inspector:
Finger glove (or finger cover) must be worn by the inspector.
Inspection table or jig must be anti-electrostatic.
under the following
23 ± 5°C
55 ± 15 %RH
30W
≥ 50 cm
≥ 30 cm
6.2 Sampling Plan
Level II, Normal Inspection, Single Sampling, MIL-STD-105E
6.3 Criteria & Acceptable Quality Level
Partition
AQL
Definition
Major
0.65
Defects in Pattern Check (Display On)
Minor
1.0
Defects in Cosmetic Check (Display Off)
6.3.1 Cosmetic Check (Display Off) in Non-Active Area
Check Item
Classification
Criteria
X > 6 mm (Along with Edge)
Y > 1 mm (Perpendicular to edge)
X
Panel
General Chipping
Y
Minor
X
Y
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6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued)
Check Item
Classification
Criteria
Any crack is not allowable.
Panel Crack
Minor
Cupper Exposed
(Even Pin or Film)
Minor
Film or Trace Damage
Minor
Not Allowable by Naked Eye
Inspection
Not Allowable
Terminal Lead Twist
Minor
Not Allowable
Terminal Lead Broken
Minor
Terminal Lead Prober
Mark
Acceptable
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6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued)
Check Item
Classification
Criteria
NG if any bent lead cause lead
shorting.
Minor
Terminal Lead Bent
(Not Twist or Broken)
NG for horizontally bent lead more
than 50% of its width.
Minor
Glue or Contamination
on Pin
(Couldn’t Be Removed
by Alcohol)
Minor
Ink Marking on Back
Side of panel
(Exclude on Film)
Acceptable
Ignore for Any
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6.3.2 Cosmetic Check (Display Off) in Active Area
Check Item
Classification
Any Dirt & Scratch on
Acceptable
Polarizer’s Protective Film
Scratches, Fiber, Line-Shape
Defect
Minor
(On Polarizer)
Dirt, Black Spot, Foreign
Material,
Minor
(On Polarizer)
Dent, Bubbles, White spot
(Any Transparent Spot on
Polarizer)
Criteria
Ignore for not Affect the
Polarizer
W ≤ 0.1
Ignore
W > 0.1, L ≤ 2
n≤1
L>2
n=0
Φ ≤ 0.1
Ignore
0.1