SIT5021AC-2BE-33N-192.000000Y 数据手册
SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
Any frequency between 1 MHz and 220 MHz accurate to 6 decimal
places
LVPECL and LVDS output signaling types
0.6ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidth
Frequency stability as low as ±5 ppm. Contact SiTime for tighter
stability options
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2 x 2.5, 5.0 x 3.2 and 7.0 x 5.0 mm
For frequencies higher than 220 MHz, refer to SiT5022 datasheet
SATA, SAS, 10GB Ethernet, Fibre Channel, PCI-Express
Networking, broadband, instrumentation
Electrical Characteristics
Parameter and Conditions
Symbol
Min.
Typ.
Max.
Unit
Condition
LVPECL and LVDS, Common Electrical Characteristics
Supply Voltage
Output Frequency Range
Initial Tolerance
Stability Over Temperature
Vdd
2.97
3.3
3.63
2.25
2.5
2.75
V
V
2.25
–
3.63
V
f
1
–
220
MHz
F_init
-2
–
2
ppm
At 25°C after two reflows
-5
–
+5
ppm
Over operating temperature range at rated nominal power
supply voltage and load.
F_stab
Termination schemes in Figures 1 and 2 - XX ordering code
Contact SiTime for tighter stability options.
Supply Voltage
F_vdd
–
50
–
ppb
±10% Vdd
Output Load
F_load
–
0.1
–
ppm
15 pF ±10% of load
First Year Aging
F_aging1
-2.5
–
+2.5
ppm
25°C
10-year Aging
F_aging10
-5
–
+5
ppm
25°C
T_use
-40
–
+85
°C
Industrial
-20
–
+70
°C
Extended Commercial
Operating Temperature Range
Pull Range
PR
±12.5, ±25, ±50
ppm
Upper Control Voltage
VC_U
Vdd-0.1
–
–
V
Control Voltage Range
VC_L
–
–
0.1
V
Control Voltage Input Impedance
Z_vc
100
–
–
k
8
kHz
Frequency Change Polarity
Control Voltage -3dB Bandwidth
–
Positive slope
All Vdds. Voltage at which maximum deviation is guaranteed.
–
V_BW
–
–
Input Voltage High
VIH
70%
–
–
Vdd
Input Voltage Low
VIL
–
–
30%
Vdd
Pin 1, OE or ST
Input Pull-up Impedance
Z_in
–
100
250
kΩ
Pin 1, OE logic high or logic low, or ST logic high
Pin 1, ST logic low
Pin 1, OE or ST
2
–
–
MΩ
Start-up Time
T_start
–
6
10
ms
Measured from the time Vdd reaches its rated minimum value.
Resume Time
T_resume
–
6
10
ms
In Standby mode, measured from the time ST pin crosses
DC
45
–
55
%
Contact SiTime for tighter duty cycle
Duty Cycle
LVPECL, DC and AC Characteristics
Current Consumption
Idd
–
61
69
mA
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE Disable Supply Current
I_OE
–
–
35
mA
OE = Low
Output Disable Leakage Current
I_leak
–
–
1
A
OE = Low
Standby Current
I_std
–
–
100
A
ST = Low, for all Vdds
I_driver
–
–
30
mA
Maximum average current drawn from OUT+ or OUT-
Output High Voltage
VOH
Vdd-1.1
–
Vdd-0.7
V
See Figure 1(a)
Output Low Voltage
VOL
Vdd-1.9
–
Vdd-1.5
V
See Figure 1(a)
V_Swing
1.2
1.6
2.0
V
See Figure 1(b)
Rise/Fall Time
Tr, Tf
–
300
500
ps
20% to 80%, see Figure 1(a)
OE Enable/Disable Time
T_oe
–
–
115
ns
f = 212.5 MHz - For other frequencies, T_oe = 100ns + 3 period
RMS Period Jitter
T_jitt
Maximum Output Current
Output Differential Voltage Swing
RMS Phase Jitter (random)
SiTime Corporation
Rev. 1.5
T_phj
–
1.2
1.7
ps
f = 100 MHz, VDD = 3.3V or 2.5V
–
1.2
1.7
ps
f = 156.25 MHz, VDD = 3.3V or 2.5V
–
1.2
1.7
ps
f = 212.5 MHz, VDD = 3.3V or 2.5V
–
0.6
0.85
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdds
990 Almanor Avenue, Sunnyvale, CA 94085
(408) 328-4400
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Revised November 12, 2015
SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
Electrical Characteristics (continued)
Parameter and Conditions
Symbol
Min.
Typ.
Max.
Unit
Condition
LVDS, DC and AC Characteristics
Current Consumption
Idd
–
47
55
mA
OE Disable Supply Current
I_OE
–
–
35
mA
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
Differential Output Voltage
VOD
250
350
450
mV
See Figure 2
Output Disable Leakage Current
I_leak
–
–
1
A
OE = Low
Standby Current
I_std
–
–
100
A
ST = Low, for all Vdds
See Figure 2
VOD
–
–
50
mV
VOS
1.125
1.2
1.375
V
See Figure 2
VOS Magnitude Change
VOS
–
–
50
mV
See Figure 2
Rise/Fall Time
Tr, Tf
–
495
600
ps
20% to 80%, see Figure 2
OE Enable/Disable Time
T_oe
–
–
115
ns
f = 212.5 MHz - For other frequencies, T_oe = 100ns + 3 period
RMS Period Jitter
T_jitt
VOD Magnitude Change
Offset Voltage
RMS Phase Jitter (random)
T_phj
–
1.2
1.7
ps
f = 100 MHz, VDD = 3.3V or 2.5V
–
1.2
1.7
ps
f = 156.25 MHz, VDD = 3.3V or 2.5V
–
1.2
1.7
ps
f = 212.5 MHz, VDD = 3.3V or 2.5V
–
0.6
0.85
ps
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdds
Pin Description
Pin
Map
Functionality
V Control
VC/OE/ST
1
Output Enable
Voltage control
Top View
H or Open: specified frequency output
L: output is high impedance
H or Open: specified frequency output
L: Device goes to sleep mode. Supply current reduces to I_std.
Standby
2
NC
NA
3
GND
Power
4
OUT+
Output
Oscillator output
5
OUT-
Output
Complementary oscillator output
6
VDD
Power
Power supply voltage
VC/OE/ST
1
6
VDD
NC
2
5
OUT-
GND
3
4
OUT+
No Connect; Leave it floating or connect to GND for better heat dissipation
VDD Power Supply Ground
Absolute Maximum
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance of
the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Min.
Max.
Unit
Storage Temperature
Parameter
-65
150
°C
VDD
-0.5
4
V
Electrostatic Discharge (HBM)
–
2000
V
Soldering Temperature (follow standard Pb free soldering guidelines)
–
260
°C
Thermal Consideration
JA, 4 Layer Board
JC, Bottom
7050, 6-pin
142
27
5032, 6-pin
97
20
3225, 6-pin
109
20
Package
(°C/W)
(°C/W)
Environmental Compliance
Parameter
Condition/Test Method
Mechanical Shock
MIL-STD-883F, Method 2002
Mechanical Vibration
MIL-STD-883F, Method 2007
Temperature Cycle
JESD22, Method A104
Solderability
MIL-STD-883F, Method 2003
Moisture Sensitivity Level
MSL1 @ 260°C
Rev. 1.5
Page 2 of 8
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SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
Waveform Diagrams
OUT80%
80%
20%
20%
VOH
OUT+
Tr
VOL
Tf
GND
Figure 1(a). LVPECL Voltage Levels per Differential Pin (OUT+/OUT-)
V _ S w in g
0 V
t
Figure 1(b). LVPECL Voltage Levels Across Differential Pair
OUT80%
80%
VOD
20%
20%
OUT+
VOS
Tr
Tf
GND
Figure 2. LVDS Voltage Levels per Differential Pin (OUT+/OUT-)
Rev. 1.5
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SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
Termination Diagrams
LVPECL:
VDD
Z 0 = 50
OUT+
D+
Receiver Device
L V P E C L D rive r
Z0 = 5 0
OUT-
D50
50
V T T = V D D – 2.0 V
Figure 3. LVPECL Typical Termination
VDD= 3.3V => R1 = 100 to 150
VDD= 2.5V => R1 = 75
VDD
OUT+
100 nF
Z0 = 50
D+
Receiver Device
LVPECL Driver
100 nF
Z0 = 50
OUTR1
R1
D50
50
VTT
Figure 4. LVPECL AC Coupled Termination
VDD = 3.3V => R1 = R3 = 133 and
R2 = R4 = 82
VDD = 2.5V => R1 = R3 = 250 and
R2 = R4 = 62.5
VDD
R1
VDD
OUT+
R3
Z0 = 50
D+
Receiver Device
LVPECL Driver
OUT-
Z0 = 50
DR2
R4
Figure 5. LVPECL with Thevenin Typical Termination
Rev. 1.5
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SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
LVDS:
VDD
OUT+
Z0 = 50
D+
100
LVDS Driver
OUT-
Z0 = 50
Receiver Device
D-
Figure 6. LVDS Single Termination (Load Terminated)
Rev. 1.5
Page 5 of 8
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SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
Dimensions and Patterns
Package Size – Dimensions (Unit: mm)[1]
Recommended Land Pattern (Unit: mm)[2]
3.2 x 2.5x 0.75 mm
3.2±0.05
2.20
#4
#2
#3
#4
#6
0.9
#1
#3
#2
1.00
0.7
YXXXX
2 .2 5
#5
1.6
#5
2.5±0.05
#6
#1
0.6
0.75±0.05
0 .6 5
1 .0 5
5.0 x 3.2 x 0.75 mm
#5
#4
#2
#3
#4
#5
#6
1.20
#6
YXXXX
#1
#3
#2
#1
0.75±0.05
7.0 x 5.0x 0.90 mm
7.0±0.10
5.08
#2
#5
#3
#3
5.08
#6
1.10
YXXXX
#1
#4
#2
3.80
#4
2.60
#5
5.0±0.10
#6
#1
0.90 ±0.10
1.60
1.40
1.60
Notes:
1. Top Marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device.
2. A capacitor of value 0.1 F between Vdd and GND is recommended.
Rev. 1.5
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SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
Ordering Information
SiT5021AC -1CE-33VQ123.123456T
Part Family
Packaging:
“T” for Tape & Reel (3 Ku Reel)
“Y” for Tape & Reel (1 Ku Reel)
Blank for Bulk
“SiT5021”
Revision Letter
“A” is the revision of Silicon
Temperature Range
Frequency
1.000000 MHz to
220.000000 MHz
“C” Extended Commercial, -20 to 70°C
“I” Industrial, -40 to 85°C
Pull Range Options
“-” for No Pull
“Q” for ±12.5 ppm
“M” for ±25 ppm
“B” for ±50 ppm
Signalling Type
“1” = LVPECL
“2” = LVDS
Feature Pin (pin 1)
Package Size
“B” 3.2 x 2.5 mm
“C” 5.0 x 3.2 mm
“D” 7.0 x 5.0 mm
“V” for Voltage Control
“E” for Output Enable
“S” for Standby
“N” for No Connect
Frequency Stability[3]
Supply Voltage
“E” for ±5.0 ppm
“25” for 2.5V ±10%
“33” for 3.3V ±10%
“XX” for 2.5 to 3.3V ±10%
Note:
3. Contact SiTime for tighter stability options.
Ordering Codes for Supported Tape & Reel Packing Method
Device Size
12 mm T&R (3ku)
12 mm T&R (1ku)
12 mm T&R (250u)
16 mm T&R (3ku)
16 mm T&R (1ku)
16 mm T&R (250u)
7.0 x 5.0 mm
–
–
–
T
Y
X
5.0 x 3.2 mm
T
Y
X
–
–
–
3.2 x 2.5 mm
T
Y
X
–
–
–
Frequencies Not Supported
Range 1: From 209.000001 MHz to 210.999999 MHz
Rev. 1.5
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SiT5021
1-220 MHz High Performance Differential (VC) TCXO
The Smart Timing Choice
The Smart Timing Choice
Revision History
Version
Release Date
1.2
8/20/13
Change Summary
Original
1.3
12/16/13
Added input specifications, LVPECL/LVDS waveforms, packaging T&R options
1.4
12/11/14
Modified Thermal Consideration values and Pin Configuration table (pin 1) and drawing
1.5
11/12/15
• Revised stability over temperature and first year aging values in the electrical characteristics table
• Revised frequency stability and supply voltage options
© SiTime Corporation 2015. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a
Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or accident, (iii)
unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv) improper
installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
Disclaimer: SiTime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all express or implied warranties, either in fact or by
operation of law, statutory or otherwise, including the implied warranties of merchantability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing or
usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any SiTime product and any product documentation. Products sold by
SiTime are not suitable or intended to be used in a life support application or component, to operate nuclear facilities, or in other mission critical applications where human life may be involved
or at stake. All sales are made conditioned upon compliance with the critical uses policy set forth below.
CRITICAL USE EXCLUSION POLICY
BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS USED IN LIFE SUPPORT DEVICES OR TO OPERATE NUCLEAR FACILITIES
OR FOR USE IN OTHER MISSION-CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPERTY MAY BE AT STAKE.
SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products
does not convey or imply any license under patent or other rights. SiTime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to the
sale of products or services by SiTime. Unless otherwise agreed to in writing by SiTime, any reproduction, modification, translation, compilation, or representation of this material shall be strictly
prohibited.
Rev. 1.5
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Supplemental Information
The Supplemental Information section is not part of the datasheet and is for informational purposes only.
SiTime Corporation
990 Almanor Avenue, Sunnyvale, CA 94085
(408) 328-4400
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The Smart Timing Choice
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Silicon MEMS Outperforms Quartz
SiTime Corporation
Silicon MEMS Outperforms Quartz Rev. 1.2
990 Almanor Avenue, Sunnyvale, CA 94085
(408) 328-4400
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Revised November 13, 2015
Silicon MEMS Outperforms Quartz
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Best Reliability
Best Electro Magnetic Susceptibility (EMS)
Silicon is inherently more reliable than quartz. Unlike quartz
suppliers, SiTime has in-house MEMS and analog CMOS
expertise, which allows SiTime to develop the most reliable
products. Figure 1 shows a comparison with quartz
technology.
SiTime’s oscillators in plastic packages are up to 54 times
more immune to external electromagnetic fields than quartz
oscillators as shown in Figure 3.
Why is SiTime Best in Class:
• SiTime’s MEMS resonators are vacuum sealed using an
advanced EpiSeal™ process, which eliminates foreign particles and improves long term aging and reliability
• World-class MEMS and CMOS design expertise
Why is SiTime Best in Class:
• Internal differential architecture for best common mode
noise rejection
• Electrostatically driven MEMS resonator is more immune
to EMS
SiTime vs Quartz
Electro Magnetic Susceptibility (EMS)
Reliability (Million Hours)
- 30
IDT
Epson
1,140
38
28
Average Spurs (dB)
- 39
SiTime
- 40
- 40
- 42
- 43
- 45
- 50
- 60
SiTime
54X Better
- 70
- 73
- 80
- 90
Kyocera
Figure 1. Reliability Comparison[1]
Epson
TXC
CW
SiLabs
SiTime
Figure 3. Electro Magnetic Susceptibility (EMS)[3]
Best Aging
Best Power Supply Noise Rejection
Unlike quartz, MEMS oscillators have excellent long term
aging performance which is why every new SiTime product
specifies 10-year aging. A comparison is shown in Figure 2.
SiTime’s MEMS oscillators are more resilient against noise on
the power supply. A comparison is shown in Figure 4.
• SiTime’s MEMS resonators are vacuum sealed using an
advanced EpiSeal process, which eliminates foreign particles and improves long term aging and reliability
• Inherently better immunity of electrostatically driven
MEMS resonator
SiTime MEMS vs. Quartz Aging
10
SiTime MEMS Oscillator
Quartz Oscillator
8.0
Aging (±PPM)
8
SiTime
2X Better
6
4
2
0
3.0
3.5
1.5
1-Year
10-Year
Figure 2. Aging Comparison[2]
Silicon MEMS Outperforms Quartz Rev. 1.2
Why is SiTime Best in Class:
• On-chip regulators and internal differential architecture for
common mode noise rejection
• Best analog CMOS design expertise
Additive Integrated Phase Jitter per mVp-p
Injected Noise (ps/mv)
Why is SiTime Best in Class:
Power Supply Noise Rejection
SiTIme
5.0
NDK
Epson
Kyocera
4.0
3.0
2.0
SiTime
SiTime
3X Better
1.0
0.0
10
100
1,000
Power Supply Noise Frequency (kHz)
10,000
Figure 4. Power Supply Noise Rejection[4]
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Silicon MEMS Outperforms Quartz
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Best Vibration Robustness
Best Shock Robustness
High-vibration environments are all around us. All electronics,
from handheld devices to enterprise servers and storage
systems are subject to vibration. Figure 5 shows a comparison
of vibration robustness.
SiTime’s oscillators can withstand at least 50,000 g shock.
They all maintain their electrical performance in operation
during shock events. A comparison with quartz devices is
shown in Figure 6.
Why is SiTime Best in Class:
Why is SiTime Best in Class:
• The moving mass of SiTime’s MEMS resonators is up to
3000 times smaller than quartz
• Center-anchored MEMS resonator is the most robust
design
• The moving mass of SiTime’s MEMS resonators is up to
3000 times smaller than quartz
• Center-anchored MEMS resonator is the most robust
design
Vibration Sensitivity (ppb/g)
TXC
Epson
Connor Winfield
Kyocera
SiLabs
100.00
10.00
1.00
SiTime
Up to 30x
Better
0.10
10
100
Vibration Frequency (Hz)
Figure 5. Vibration Robustness[5]
1000
Peak Frequency Deviation (PPM)
Vibration Sensitivity vs. Frequency
SiTime
16
14
Differential XO Shock Robustness - 500 g
14.3
12.6
12
10
8
SiTime
Up to 25x
Better
6
3.9
4
2.9
2.5
2
0.6
0
Kyocera
Epson
TXC
CW
SiLabs
SiTime
Figure 6. Shock Robustness[6]
Notes:
1. Data Source: Reliability documents of named companies.
2. Data source: SiTime and quartz oscillator devices datasheets.
3. Test conditions for Electro Magnetic Susceptibility (EMS):
• According to IEC EN61000-4.3 (Electromagnetic compatibility standard)
• Field strength: 3V/m
• Radiated signal modulation: AM 1 kHz at 80% depth
• Carrier frequency scan: 80 MHz – 1 GHz in 1% steps
• Antenna polarization: Vertical
• DUT position: Center aligned to antenna
Devices used in this test:
SiTime, SiT9120AC-1D2-33E156.250000 - MEMS based - 156.25 MHz
Epson, EG-2102CA 156.2500M-PHPAL3 - SAW based - 156.25 MHz
TXC, BB-156.250MBE-T - 3rd Overtone quartz based - 156.25 MHz
Kyocera, KC7050T156.250P30E00 - SAW based - 156.25 MHz
Connor Winfield (CW), P123-156.25M - 3rd overtone quartz based - 156.25 MHz
SiLabs, Si590AB-BDG - 3rd overtone quartz based - 156.25 MHz
4. 50 mV pk-pk Sinusoidal voltage.
Devices used in this test:
SiTime, SiT8208AI-33-33E-25.000000, MEMS based - 25 MHz
NDK, NZ2523SB-25.6M - quartz based - 25.6 MHz
Kyocera, KC2016B25M0C1GE00 - quartz based - 25 MHz
Epson, SG-310SCF-25M0-MB3 - quartz based - 25 MHz
5. Devices used in this test: same as EMS test stated in Note 3.
6. Test conditions for shock test:
• MIL-STD-883F Method 2002
• Condition A: half sine wave shock pulse, 500-g, 1ms
• Continuous frequency measurement in 100 μs gate time for 10 seconds
Devices used in this test: same as EMS test stated in Note 3
7. Additional data, including setup and detailed results, is available upon request to qualified customers. Please contact productsupport@sitime.com.
Silicon MEMS Outperforms Quartz Rev. 1.2
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EMI
Termination recommendations
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If “Yes”, please specify (what and where):
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