SLG59M1603V

SLG59M1603V Dual 4.5A Load Switch with Discharge and Reverse Current Blocking  General Description Pin Configuration The SLG59M1603V is designed for load switching application. The part comes with two 4.5 A rated MOSFETs switched on by two ON control pins. Each MOSFETs turn on time is independently adjusted by an external capacitor. Features MOS1_D 1 14 MOS1_D 2 13 MOS1_S MOS1_S ON_MOS1 3 12 CAP_MOS1 4 11 GND ON_MOS2 5 10 CAP_MOS2 MOS2_D 6 9 MOS2_D 7 8 MOS2_S MOS2_S VDD • Two 4.5 A independent MOSFETs with Reverse Current Blocking • Two Integrated VGS Charge Pumps • Two internal discharges per channel for gate and source • Independent Ramp Control • Protected by thermal shutdown • Pb-Free / RoHS Compliant • Halogen-Free • STDFN 14L, 1 x 3 x 0.55 mm 14-pin STDFN (Top View) Applications • • • • Ideal for switching ON and OFF S0 +5.0 and 3.3 V power rails with associated support circuitry discharges. Ideal for switching ON and OFF power rails 5 V or less. Can use either channel up to 5.5 A with combined maximum current of 8.5 A Maximum load capacitance of 1000 µF for each Channel Source terminal. Block Diagram MOS1_D VDD +2.5 to 5.5 V CAP_MOS1 Charge Pump 1 MOS1_S MOS2_S MOS2_D 4.5 A 4.5 A Reverse Blocking Reverse Blocking VDD Linear Ramp Control Charge Pump 2 Linear Ramp Control CAP_MOS2 Over Temperature Protection ON_MOS1 Over Temperature Protection CMOS Input ON_MOS2 ©2022 Renesas Electronics Corporation 000-0059M1603-103 CMOS Input Rev 1.03 Revised February 4, 2022 SLG59M1603V  Pin Description Pin # Pin Name Type Pin Description 1 MOS1_D MOSFET Drain of MOSFET1 2 MOS1_D MOSFET Drain of MOSFET1 (fused with pin 1) 3 ON_MOS1 Input Turns on MOS1 (4 MΩ pull down resistor) 4 VDD VDD +5VDD Power 5 ON_MOS2 Input Turns on MOS2 (4 MΩ pull down resistor) 6 MOS2_D MOSFET Drain of MOSFET2 7 MOS2_D MOSFET Drain of MOSFET2 (fused with pin 6) 8 MOS2_S MOSFET Source of MOSFET2 (fused with pin 9) 9 MOS2_S MOSFET Source of MOSFET2 10 CAP_MOS2 Input Sets ramp and turn on time for MOSFET2 11 GND GND Ground 12 CAP_MOS1 Input Sets ramp and turn on time for MOSFET1 13 MOS1_S MOSFET Source of MOSFET1 (fused with pin 14) 14 MOS1_S MOSFET Source of MOSFET1 Ordering Information Part Number Type Production Flow SLG59M1603V STDFN 14L Industrial, -40 °C to 85 °C SLG59M1603VTR STDFN 14L (Tape and Reel) Industrial, -40 °C to 85 °C 000-0059M1603-103 Page 2 of 10 SLG59M1603V  Absolute Maximum Ratings Parameter Description VD Power Supply TS Storage Temperature ESDHBM WDIS IDSMAX ESD Protection Conditions Human Body Model Min. Typ. Max. Unit -- -- 6 V -65 -- 150 °C 2000 -- -- V -- -- 1.2 W 4.5 A 6 A Package Power Dissipation Max Operating Current MOSFET IDSPK Peak Current from Drain to Source For no more than 10 continuous seconds out of every 100 seconds -- -- Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Electrical Characteristics TA = -40 °C to 85 °C (unless otherwise stated) Parameter VDD IDD RDSON Description Conditions Power Supply Voltage Min. IDSLKG VD TON_Delay -- 5.5 V -- 0.1 1 µA Power Supply Current ON_MOS_1 & ON_MOS_2 (Steady State) -- 50 100 µA TA 25°C MOSFET1 @100 mA -- 16.0 19.8 mΩ TA 70°C MOSFET1 @100 mA -- 18.7 24.2 mΩ 19.8 25.3 mΩ ON Resistance TA 85°C MOSFET1 @100 mA TA 25°C MOSFET2 @100 mA -- 16.0 19.8 mΩ TA 70°C MOSFET2 @100 mA -- 18.7 24.2 mΩ Current from Drain to Source for each MOSFET 19.8 25.3 mΩ IDS Leakage (Reverse Blocking enabled) Continuous, each channel -- -- 4.5 A VS = 1.0 V to 5.0 V, VDD = VD = 0 V, ON_MOS = LOW, 0 to 85 °C, each channel -- 0.5 1.5 µA VS = 1.0 V to 5.0 V, VDD = VD = 0 V, ON_MOS = LOW, -40 to 0 °C, each channel -- 3 5 µA 0.85 5.0 VDD V 0 300 500 µs Drain Voltage ON pin Delay Time 50% ON to Ramp Begin, RL = 20 Ω, no CL Configurable 1 Total Turn On Time Example: CAP = 4 nF, VDD = VD = 5 V, Source_Cap = 10 µF, RL = 20 Ω -- Slew Rate Example: CAP = 4 nF, VDD = VD = 5 V, Source_Cap = 10 µF, RL = 20 Ω 2.0 ms -- ms Configurable 1 10% VS to 90% VS TSLEWRATE Unit 2.5 50% ON to 90% VS TTotal_ON Max. Power Supply Current when OFF TA 85°C MOSFET2 @100 mA MOSFET IDS Typ. -- V/ms 3.0 -- V/ms -- -- 1000 µF Discharge Resistance 100 150 300 Ω ON_VIH High Input Voltage on ON pin 0.85 -- VDD V ON_VIL Low Input Voltage on ON pin -0.3 0 0.3 V CAPSOURCE Source Cap RDIS 000-0059M1603-103 Source to GND Page 3 of 10 SLG59M1603V  TA = -40 °C to 85 °C (unless otherwise stated) Min. Typ. Max. Unit THERMON2 Thermal shutoff turn-on temperature Parameter -- 125 -- °C THERMOFF Thermal shutoff turn-off temperature -- 100 -- °C THERMTIME Thermal shutoff time -- -- 1 ms -- -- 15 µs TOFF_Delay Description OFF Delay Time Conditions 50% ON to VS Fall, VDD = VD = 5 V, RL = 20 Ω, no CL Notes: 1. Refer to table for configuration details. 2. When device enters thermal shutdown, both channels will turn off. 000-0059M1603-103 Page 4 of 10 SLG59M1603V  TSLEW vs. CAP Slew Rate (V/ms) Vs. Cap, VDD = 5V, TA = 25C 10%VS to 90%VS, RL = 20 ohm, CL = 10 uF 14.000 12.000 10.000 V/ms VD = 1V 8.000 VD = 1.5V 6.000 VD = 2.5V 4.000 VD = 3.3V VD = 5V 2.000 0.000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 Cap (nF) TTOTAL_ON vs. CAP Ttotal_on vs Cap. 50%ON to 90%VS, TA = 25C VDD = 5V, RL = 20 ohm, CL = 10 uF 10.000 9.000 Ttotal_on (ms) 8.000 7.000 6.000 VD = 1V 5.000 VD = 1.5V 4.000 VD = 2.5V 3.000 VD = 3.3V 2.000 VD = 5V 1.000 0.000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 Cap (nF) 000-0059M1603-103 Page 5 of 10 SLG59M1603V  TTotal_ON, TON_Delay and Slew Rate Measurement ON 50% ON 50% ON TOFF_DELAY 90% VS VS 90% VS TON_DELAY 10% VS 10% VS Slew Rate (V/ms) TFALL TTotal_ON 000-0059M1603-103 Page 6 of 10 SLG59M1603V  Package Top Marking System Definition Part Code Pin 1 Identifier PPDDL Lot # Date Code 000-0059M1603-103 Page 7 of 10 SLG59M1603V  Package Drawing and Dimensions 14 Lead STDFN Package 1 mm x 3 mm (Fused Lead) 000-0059M1603-103 Page 8 of 10 SLG59M1603V  Tape and Reel Specifications Package Type # of Pins Nominal Package Size STDFN 14L 14 1x3x0.55mm Trailer A Leader B Pocket Tape (mm) Max Reel & Units per Units Hub Size Reel Pockets Length Pockets Length Width Pitch per Box (mm) (mm) (mm) 3000 3000 178/60 100 400 100 400 8 4 Carrier Tape Drawing and Dimensions Pocket BTM Pocket BTM Length Width Package [mm] [mm] Type STDFN 14L Pocket Depth [mm] Index Hole Pitch [mm] Pocket Pitch [mm] Index Hole Diameter [mm] Index Hole Index Hole to Tape to Pocket Tape Width Edge Center [mm] [mm] [mm] A0 B0 K0 P0 P1 D0 E F W 1.15 3.15 0.7 4 4 1.5 1.75 3.5 8 Recommended Reflow Soldering Profile Please see IPC/JEDEC J-STD-020: latest revision for reflow profile based on package volume of 1.65 mm3 (nominal). More information can be found at www.jedec.org. 000-0059M1603-103 Page 9 of 10 SLG59M1603V  Revision History Date Version 2/4/2022 1.03 Updated Company name and logo Fixed typos 9/29/2015 1.02 Updated Block Diagram 000-0059M1603-103 Change Page 10 of 10 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. 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