SLG59M1600V

SLG59M1600V 7.8 mΩ, 9 A Load Switch with Discharge and Reverse Current Blocking  General Description Pin Configuration The SLG59M1600V is designed for load switching application. The part comes with one 9 A rated MOSFET switched on by an ON control pin. MOSFET turn on time is independently adjusted by an external capacitor. MOS_D 1 14 MOS_D 2 13 MOS_S MOS_S ON_MOS 3 12 CAP_MOS 4 11 GND ON_MOS 5 10 CAP_MOS MOS_D 6 9 MOS_D 7 8 MOS_S MOS_S Features VDD • One 9 A independent MOSFET with reverse current blocking • Integrated VGS Charge Pump • Internal discharge for gate and source • Ramp Control • Protected by thermal shutdown • Pb-Free / RoHS Compliant • Halogen-Free • STDFN 14L, 1 x 3 x 0.55 mm 14-pin STDFN (Top View) Block Diagram 9 A @ 7.8 mΩ Reverse Blocking MOS_D +2.5 to 5.5 V CAP_MOS Charge Pump PIN10 MOS_S Linear Ramp Control PIN12 Over Temperature Protection PIN3 ON_MOS CMOS Input PIN5 ©2022 Renesas Electronics Corporation 000-0059M1600-104 Rev 1.04 Revised February 10, 2022 SLG59M1600V  Pin Description Pin # Pin Name Type Pin Description 1 MOS_D MOSFET 2 MOS_D MOSFET 3 ON_MOS Input Turns on MOS (4 MΩ pull down resistor). Tied to Pin 5 on PCB. 4 VDD VDD +5VDD Power 5 ON_MOS Input Turns on MOS (4 MΩ pull down resistor). Tied to Pin 3 on PCB. 6 MOS_D MOSFET Drain of MOSFET 7 MOS_D MOSFET Drain of MOSFET 8 MOS_S MOSFET Source of MOSFET 9 MOS_S MOSFET Source of MOSFET 10 CAP_MOS Input Sets ramp and turn on time for MOSFET. Tied to Pin 12 on PCB. 11 GND GND Ground 12 CAP_MOS Input Sets ramp and turn on time for MOSFET. Tied to Pin 10 on PCB. 13 MOS_S MOSFET Source of MOSFET 14 MOS_S MOSFET Source of MOSFET Drain of MOSFET Drain of MOSFET Ordering Information Part Number Type Production Flow SLG59M1600V STDFN 14L Industrial, -40 °C to 85 °C SLG59M1600VTR STDFN 14L (Tape and Reel) Industrial, -40 °C to 85 °C 000-0059M1600-104 Page 2 of 11 SLG59M1600V  Absolute Maximum Ratings Parameter Description VD Power Supply TS Storage Temperature Conditions Min. Typ. Max. Unit -- -- 6 V -65 -- 150 °C ESDHBM ESD Protection Human Body Model 2000 -- -- V ESDCDM ESD Protection Charged Device Model 1000 -- -- V MSL Moisture Sensitivity Level Package Thermal Resistance, Junction-to-Ambient θJA WDIS 1 1mm x 3mm 14L STDFN; Determined using 1 in2, 1.2 oz. copper pads under VIN and VOUT on FR4 pcb material Package Power Dissipation IDSMAX -- 71 -- °C/W -- -- 1.2 W 9 A 12 A Max Operating Current MOSFET IDSPK For no more than 10 continuous seconds Peak Current from Drain to Source out of every 100 seconds -- -- Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Electrical Characteristics TA = -40 °C to 85 °C (unless otherwise stated) Parameter VDD IDD Description Conditions Min. Typ. Max. 2.5 -- 5.5 V Power Supply Current when OFF -- 0.1 1 µA Power Supply Current, ON_MOS_1 & ON_MOS_2 (Steady State) -- 40 70 µA -- 7.8 10.5 mΩ Power Supply Voltage TA 25°C MOSFET @100 mA RDSON MOSFET IDS IDSLKG VD TON_Delay ON Resistance TA 70°C MOSFET @100 mA -- 8.4 12.1 mΩ TA 85°C MOSFET @100 mA -- 9.0 12.7 mΩ Current from Drain to Source for each Continuous MOSFET -- -- 9 A IDS Leakage (Reverse Blocking enabled) -- 0.5 5.0 µA 0.85 5.0 VDD V 0 270 500 µs VS = 1.0 V to 5.0 V, VDD = VD = 0 V, ON_MOS = LOW, Full temp range Drain Voltage ON pin Delay Time 50% ON to Ramp Begin, RL = 20 Ω, no CL Configurable 1 50% ON to 90% VS TTotal_ON Total Turn On Time Example: CAP (Pin 10 & 12) share a single 4nF capacitor, VDD = VD = 5 V, Source_Cap = 10 µF, RL = 20 Ω -- Slew Rate CAPSOURCE Source Cap 1.1 ms -- ms Configurable 1 10% VS to 90% VS TSLEWRATE Unit V/ms Example: CAP (Pin 10 & 12) share a single 4nF capacitor, VDD = VD = 5 V, Source_Cap = 10 µF, RL = 20 Ω -- 6.0 -- V/ms Source to GND -- -- 1000 µF 50 113 150 Ω ON_VIH High Input Voltage on ON pin 0.85 -- VDD V ON_VIL Low Input Voltage on ON pin RDIS Discharge Resistance -0.3 0 0.3 V THERMON Thermal shutoff turn-on temperature -- 125 -- °C THERMOFF Thermal shutoff turn-off temperature -- 100 -- °C 000-0059M1600-104 Page 3 of 11 SLG59M1600V  Electrical Characteristics (continued) TA = -40 °C to 85 °C (unless otherwise stated) Parameter Description Conditions THERMTIME Thermal shutoff time TOFF_Delay OFF Delay Time 50% ON to VS Fall, VDD = VD = 5 V, RL = 20 Ω, no CL Min. Typ. Max. Unit -- -- 1 ms -- 1.7 3 µs Notes: 1. Refer to table for configuration details. 000-0059M1600-104 Page 4 of 11 SLG59M1600V  TSLEW vs. CAP Slew Rate (V/ms) Vs. Cap, VDD = 5V, TA = 25C 10%VS to 90%VS, RL = 20 ohm, CL = 10 uF 30.000 25.000 20.000 V/ms VD = 1.5V 15.000 VD = 2.5V 10.000 VD = 3.3V VD = 5V 5.000 0.000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 Cap (nF) TTOTAL_ON vs. CAP Ttotal_on vs Cap. 50%ON to 90%VS, TA = 25C VDD = 5V, RL = 20 ohm, CL = 10 uF 6.000 Ttotal_on (ms) 5.000 4.000 VD = 1.5V 3.000 VD = 2.5V 2.000 VD = 3.3V VD = 5V 1.000 0.000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 Cap (nF) 000-0059M1600-104 Page 5 of 11 SLG59M1600V  TTotal_ON, TON_Delay and Slew Rate Measurement ON 50% ON 50% ON TOFF_DELAY 90% VS VS 90% VS TON_DELAY 10% VS 10% VS Slew Rate (V/ms) TFALL TTotal_ON 000-0059M1600-104 Page 6 of 11 SLG59M1600V  Package Top Marking System Definition Part Code Pin 1 Identifier PPDDL Lot # Date Code 000-0059M1600-104 Page 7 of 11 SLG59M1600V  Package Drawing and Dimensions 14 Lead STDFN Package 1 mm x 3 mm (Fused Lead) 000-0059M1600-104 Page 8 of 11 SLG59M1600V  Tape and Reel Specifications Package Type # of Pins Nominal Package Size STDFN 14L 1x3mm 0.4P FC 14 1x3x0.55mm Trailer A Leader B Pocket Tape (mm) Max Reel & Units per Units Hub Size Reel Pockets Length Pockets Length Width Pitch per Box (mm) (mm) (mm) 3000 3000 178/60 100 400 100 400 8 4 Carrier Tape Drawing and Dimensions Pocket BTM Pocket BTM Length Width Package [mm] [mm] Type STDFN 14L 1x3mm 0.4P FC Pocket Depth [mm] Index Hole Pitch [mm] Pocket Pitch [mm] Index Hole Diameter [mm] Index Hole Index Hole to Tape to Pocket Tape Width Edge Center [mm] [mm] [mm] A0 B0 K0 P0 P1 D0 E F W 1.15 3.15 0.7 4 4 1.5 1.75 3.5 8 Recommended Reflow Soldering Profile Please see IPC/JEDEC J-STD-020: latest revision for reflow profile based on package volume of 1.65 mm3 (nominal). More information can be found at www.jedec.org. 000-0059M1600-104 Page 9 of 11  SLG59M1600V Recommended Land Pattern and PCB Layout 000-0059M1600-104 Page 10 of 11 SLG59M1600V  Revision History Date Version Change 2/10/2022 1.04 Renesas rebranding Fixed typos 3/15/2016 1.03 Fixed RDSon values 11/30/2015 1.02 Updated Abs. Max and Electrical Characteristics Tables 9/29/2015 1.01 Updated Block Diagram 000-0059M1600-104 Page 11 of 11 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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