BLC8G27LS-60AVY

BLC8G27LS-60AV; BLC8G27LS-60AVH Power LDMOS transistor Rev. 4 — 2 December 2016 Product data sheet 1. Product profile 1.1 General description 60 W LDMOS packaged asymmetrical Doherty power transistor for base station applications at frequencies from 2300 MHz to 2690 MHz. Table 1. Typical performance Typical RF performance at Tcase = 25 C in the Doherty demo board. f VDS PL(AV) Gp D ACPR (MHz) (V) (W) (dB) (%) (dBc) 1-carrier W-CDMA 2496 to 2690 28 7 15.2 47 30 [1] IS-95 2300 to 2400 26 7 13.6 48 30 [1] Test signal [1] Test signal: 3GPP test model 1; 1 to 64 DPCH; PAR = 7.2 dB at 0.01 % probability on CCDF. 1.2 Features and benefits          Excellent ruggedness High efficiency Low thermal resistance providing excellent thermal stability Decoupling leads to enable improved video bandwidth Lower output capacitance for improved performance in Doherty applications Designed for low memory effects providing excellent pre-distortability Internally matched for ease of use Integrated ESD protection Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) 1.3 Applications  RF power amplifier for LTE base stations and multi carrier applications in the 2300 MHz to 2690 MHz frequency range BLC8G27LS-60AV(H) Power LDMOS transistor 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol BLC8G27LS-60AV (SOT1275-3) 1 drain1 (main) 2 drain2 (peak) 3 gate1 (main) 4 gate2 (peak) 5 1 2 6 1, 5 3 7 5 video decoupling (main) 6 video decoupling (peak) 7 source 7 4 3 4 2, 6 [1] aaa-007731 BLC8G27LS-60AVH (SOT1275-1) 1 drain1 (main) 2 drain2 (peak) 3 gate1 (main) 4 gate2 (peak) 5 6 1, 5 3 video decoupling (main) 6 video decoupling (peak) [1] 2 7 5 7 1 7 4 3 4 2, 6 [1] source aaa-007731 Connected to flange. 3. Ordering information Table 3. Ordering information Type number Package Name Description Version BLC8G27LS-60AV - air cavity plastic earless flanged package; 6 leads SOT1275-3 BLC8G27LS-60AVH - air cavity plastic earless flanged package; 6 leads SOT1275-1 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS Min Max Unit drain-source voltage - 65 V VGS gate-source voltage 0.5 +13 V Tstg storage temperature 65 +150 C - 225 C Tj [1] Conditions junction temperature [1] Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF calculator. BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 2 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 5. Thermal characteristics Table 5. Symbol Thermal characteristics Parameter Conditions Rth(j-case) thermal resistance from junction to case Typ Unit PL = 7 W 1.84 K/W PL = 16 W 1.25 K/W Tcase = 80 C; IDq = 100 mA; VGS(amp) peak = 1 V 6. Characteristics Table 6. DC characteristics Tj = 25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Main device V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 0.18 mA 65.25 - - V VGS(th) gate-source threshold voltage VDS = 10 V; ID = 18 mA 1.45 1.9 2.35 V VGSq gate-source quiescent voltage VDS = 28 V; ID = 108 mA 1.75 2.2 2.65 V IDSS drain leakage current VGS = 0 V; VDS = 28 V - - 1.2 A IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V - 3.2 - A IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 120 nA gfs forward transconductance VDS = 10 V; ID = 18 mA - 0.16 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 0.63 A - 792 1260 m 65.25 - - V Peak device V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 0.4 mA VGS(th) gate-source threshold voltage VDS = 10 V; ID = 40 mA 1.45 1.9 2.35 V VGSq gate-source quiescent voltage VDS = 28 V; ID = 240 mA 1.45 1.9 2.35 V IDSS drain leakage current VGS = 0 V; VDS = 28 V - - 1.2 A IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V - 7.0 - A IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 120 nA gfs forward transconductance VDS = 10 V; ID = 40 mA - 0.4 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 1.4 A - 356 573 m Table 7. RF characteristics Test signal: 1-carrier W-CDMA; PAR = 7.2 dB at 0.01 % probability on the CCDF; 3GPP test model 1; 1 to 64 DPCH; f1 = 2496 MHz; f2 = 2690 MHz; RF performance at VDS = 28 V; IDq = 100 mA (main); VGS(amp)peak = 0.5 V; Tcase = 25 C; unless otherwise specified; in an asymmetrical Doherty production test circuit at frequencies from 2496 MHz to 2690 MHz. Symbol Parameter Conditions Min Typ Max Unit Gp power gain PL(AV) = 7 W 13.8 15 - dB RLin input return loss PL(AV) = 7 W - 10 7 dB D drain efficiency PL(AV) = 7 W 40 44 - % ACPR adjacent channel power ratio PL(AV) = 7 W - 28 23 dBc BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 3 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor Table 8. RF characteristics Test signal: pulsed CW; tp = 100 s;  = 10 %; f = 2690 MHz; RF performance at VDS = 28 V; IDq = 100 mA (main); VGS(amp)peak = 0.5 V; Tcase = 25 C; unless otherwise specified; in an asymmetrical Doherty production test circuit at frequencies from 2496 MHz to 2690 MHz. Symbol Parameter Conditions PL(3dB) output power at 3 dB gain compression Min Typ Max Unit 42 50 - W 7. Test information 7.1 Ruggedness in Doherty operation The BLC8G27LS-60AV and BLC8G27LS-60AVH are capable of withstanding a load mismatch corresponding to a VSWR = 10 : 1 through all phases under the following conditions: VDS = 28 V; IDq = 100 mA (main); VGS(amp)peak = 0.5 V; PL = 20 W (CW); f = 2496 MHz. 7.2 Impedance information Table 9. Typical impedance of main device Measured load-pull data of main device; IDq = 100 mA (main); VDS = 28 V. f ZS [1] ZL [1] PL [2] D [2] Gp [2] (MHz) () () (W) (%) (dB) Maximum power load 2496 6.3  j11.2 18.4  j12.7 23 60 18.8 2600 8.9  j12.3 17.5  j12.4 23 58 19.1 2690 10.7  j9.5 16.0  j12.5 22 56 19.4 Maximum drain efficiency load 2496 6.3  j11.2 28.0  j0.0 17 67.0 20.9 2600 8.9  j12.3 24.4  j1.7 16 65.5 21.2 2690 10.7  j9.5 19.4  j0.0 17 64.5 21.3 [1] ZS and ZL defined in Figure 1. [2] at 3 dB gain compression. Table 10. Typical impedance of peak device Measured load-pull data of peak device; IDq = 240 mA (peak); VDS = 28 V. f ZS [1] ZL [1] PL [2] D [2] Gp [2] (MHz) () () (W) (%) (dB) 17.6 Maximum power load 2496 4.5  j9.9 5.8  j9.8 51 55.9 2600 4.7  j9.8 6.0  j9.7 51 56.9 18.3 2690 2.5  j5.3 6.6  j10.4 52 57.0 17.8 BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 4 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor Table 10. Typical impedance of peak device …continued Measured load-pull data of peak device; IDq = 240 mA (peak); VDS = 28 V. f ZS [1] ZL [1] PL [2] D [2] Gp [2] (MHz) () () (W) (%) (dB) Maximum drain efficiency load 2496 4.5  j9.9 11.6  j5.8 36.5 64.1 20.3 2600 4.7  j9.8 10.2  j4.6 34.4 63.3 20.7 2690 2.5  j5.3 9.1  j4.9 35.1 62.3 20.5 [1] ZS and ZL defined in Figure 1. [2] at 3 dB gain compression. drain ZL gate ZS 001aaf059 Fig 1. Definition of transistor impedance 7.3 Recommended impedances for Doherty design Table 11. Typical impedance of main device at 1 : 1 load Measured load-pull data of main device; IDq = 100 mA (main); VDS = 28 V. f ZS [1] ZL [1] PL [2] D [3] Gp [3] (MHz) () () (dBm) (%) (dB) 2496 6.3  j11.2 25.0  j9.2 43.2 37.0 20.0 2600 8.9  j12.3 21.5  j7.6 43.2 37.3 20.2 2690 10.7  j9.5 20.7  j8.8 43.2 37.1 20.2 [1] ZS and ZL defined in Figure 1. [2] at 3 dB gain compression. [3] at PL(AV) = 38.5 dBm. Table 12. Typical impedance of main device at 1 : 2.5 load Measured load-pull data of main device; IDq = 100 mA (main); VDS = 28 V. f ZS [1] ZL [1] PL [2] D [3] Gp [3] (MHz) () () (dBm) (%) (dB) 2496 6.3  j11.2 24.5  j17.8 40.0 52.0 22.0 2600 8.9  j12.3 18.0  j11.5 40.2 51.5 22.2 2690 10.7  j9.5 16.9  j8.2 40.6 52.1 22.0 [1] ZS and ZL defined in Figure 1. [2] at 3 dB gain compression. [3] at PL(AV) = 38.5 dBm. BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 5 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 7.4 VBW in Doherty operation The BLC8G27LS-60AV and BLC8G27LS-60AVH show 100 MHz (typical) video bandwidth in Doherty demo board in 2600 MHz at VDS = 28 V; IDq = 100 mA and VGS(amp)peak = 0.5 V. 7.5 Test circuit 40 mm 40 mm C18 C11 C2 C14 C13 C1 C20 R1 C5 C8 R3 C10 C9 76 mm C6 C19 C7 C3 C16 R2 C12 C4 C15 C17 aaa-019652 Printed-Circuit Board (PCB): Rogers RO4350B; r = 3.5; thickness = 0.508 mm; thickness copper plating = 35 m. See Table 13 for a list of components. Fig 2. Component layout Table 13. List of components See Figure 2 for component layout. Component Description Value Remarks C1, C2, C3, C4, C5, C6, multilayer ceramic chip capacitor C7 10 pF [1] C8, C9 0.2 pF [1] ATC 600F electrolytic capacitor 11 pF [1] ATC 600F C11, C12, C13, C14, C15, C16 multilayer ceramic chip capacitor 10 F, 50 V [2] Murata C17, C18 electrolytic capacitor 1000 F, 100 V multilayer ceramic chip capacitor C10 BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 ATC 600F © Ampleon Netherlands B.V. 2016. All rights reserved. 6 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor Table 13. List of components …continued See Figure 2 for component layout. Component Description Value C19, C20 multilayer ceramic chip capacitor 1 F, 50 V R1, R2 resistor 5.1  SMD 0805 R3 resistor 50  SMD 0805 [1] American Technical Ceramics type 600F or capacitor of same quality [2] Murata or capacitor of same quality Remarks [2] Murata 7.6 Graphical data 7.6.1 CW aaa-019644 20 Gp (dB) 60 ηD (%) ηD 18 50 (1) (2) 16 40 (1) (2) 14 30 Gp 12 20 10 10 38 40 42 44 46 48 50 PL (dBm) 52 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V. (1) f = 2496 MHz (2) f = 2690 MHz Fig 3. Power gain and drain efficiency as function of output power; typical values BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 7 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 7.6.2 Pulsed CW aaa-019645 20 Gp (dB) RLin (dB) 60 16 aaa-019646 25 ηD (%) ηD 18 70 (2) 20 50 15 14 (1) 40 (1) (1) (2) (2) 10 Gp 12 30 10 5 20 8 10 37 39 41 43 45 47 49 51 PL (dBm) 0 53 38 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V. 40 42 46 48 50 PL (dBm) 52 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V. (1) f = 2496 MHz (1) f = 2496 MHz (2) f = 2690 MHz (2) f = 2690 MHz Fig 4. 44 Power gain and drain efficiency as function of output power; typical values Fig 5. Input return loss as a function of output power; typical values 7.6.3 1-Carrier W-CDMA aaa-019647 20 60 Gp (dB) ηD (%) 18 55 16 50 aaa-019648 10 PAR (dB) 8 (1) 6 (2) (1) (1) (2) (2) 14 45 4 12 40 10 35 8 2 30 39 40 41 42 43 PL (dBm) 0 44 39 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V. 41 42 43 PL (dBm) 44 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V. (1) f = 2496 MHz (1) f = 2496 MHz (2) f = 2690 MHz Fig 6. 40 (2) f = 2690 MHz Power gain and drain efficiency as function of output power; typical values Fig 7. Peak-to-average power ratio as a function of output power; typical values BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 8 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor aaa-019649 30 RLin (dB) 25 20 aaa-019650 0 ACPR5M (dBc) -10 -20 (2) 15 (2) -30 (1) (1) 10 -40 5 -50 0 -60 39 40 41 42 43 PL (dBm) 44 39 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V. 40 42 43 PL (dBm) 44 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V. (1) f = 2496 MHz (1) f = 2496 MHz (2) f = 2690 MHz (2) f = 2690 MHz Fig 8. 41 Input return loss as a function of output power; typical values Fig 9. Adjacent channel power ratio (5 MHz) as a function of output power; typical values 7.6.4 2-Tone VBW aaa-019651 -10 IMD (dBc) -20 (1) (2) IMD3 -30 (1) (2) IMD5 -40 (1) (2) -50 IMD7 -60 -70 1 10 carrier spacing (MHz) 102 VDS = 28 V; IDq = 100 mA (main device); VGS(amp)peak = 0.6 V; fc = 2600 MHz. (1) IMD low (2) IMD high Fig 10. VBW capability in Doherty demo board BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 9 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 8. Package outline Air cavity plastic earless flanged package; 6 leads SOT1275-3 K D X A F 7 w1 D1 B detail X L b1 v B U1 A c H1 5 1 2 6 y Į Z1 Z H U2 E1 E A 3 4 w2 b B Q e 0 5 10 mm K y v W1 W2 0.24 0.1 0.5 0.5 0.5 scale Dimensions Unit mm A max 4.01 nom min 3.40 b 3.94 b1 c D D1 1.14 0.178 20.42 20.37 E E1 9.8 9.75 e H1 L Q(1) U1 U2 Z Z1 Į 1.14 19.53 12.8 25.5 1.68 20.7 9.91 3.17 5.79 65° 0.94 19.33 12.6 25.2 1.45 20.5 9.70 2.67 5.29 61° F H 8.89 3.68 0.89 0.127 20.12 20.17 9.5 9.55 Note 1. Dimension Q is measured 0.1 mm away from the flange. 2. Ringframe and/or ringframe glue shall not overhang at the side of the flange. Outline version References IEC JEDEC JEITA sot1275-3_po European projection Issue date 15-04-02 16-11-15 SOT1275-3 Fig 11. Package outline SOT1275-3 BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 10 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor Air cavity plastic earless flanged package; 6 leads SOT1275-1 D F A 7 w1 D1 B L U1 b1 v B A c H1 5 1 2 6 Į Z1 Z U2 H E1 E A 3 4 b e Q w2 0 B 5 10 mm v w1 w2 0.5 0.5 0.5 Z Z1 Į scale Dimensions Unit mm A max 4.01 nom min 3.40 b b1 3.94 1.14 c D D1 E 0.178 20.42 20.37 9.80 E1 e 9.75 F H H1 L Q(1) U1 1.14 19.53 12.80 25.40 1.68 20.70 9.91 3.17 5.79 65° 0.94 19.33 12.60 25.20 1.45 20.50 9.70 2.67 5.29 61° 8.89 3.68 0.89 0.127 20.12 20.17 9.50 9.55 Note 1. Dimension Q is measured 0.1 mm away from the flange. 2. Ringframe and/or ringframe glue shall not overhang at the side of the flange. Outline version U2 References IEC JEDEC JEITA sot1275-1_po European projection Issue date 15-04-01 16-11-15 SOT1275-1 Fig 12. Package outline SOT1275-1 BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 11 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 9. Handling information CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices. Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or equivalent standards. Table 14. ESD sensitivity ESD model Class Charged Device Model (CDM); According to ANSI/ESDA/JEDEC standard JS-002 C2A [1] Human Body Model (HBM); According to ANSI/ESDA/JEDEC standard JS-001 0B [2] [1] CDM classification C2A is granted to any part that passes after exposure to an ESD pulse of 500 V, but fails after exposure to an ESD pulse of 750 V. [2] HBM classification 0B is granted to any part that passes after exposure to an ESD pulse of 125 V, but fails after exposure to an ESD pulse of 250 V. 10. Abbreviations Table 15. Abbreviations Acronym Description 3GPP 3rd Generation Partnership Project CCDF Complementary Cumulative Distribution Function CW Continuous Wave DPCH Dedicated Physical CHannel ESD ElectroStatic Discharge IS-95 Interim Standard 95 LDMOS Laterally Diffused Metal-Oxide Semiconductor LTE Long Term Evolution MTF Median Time to Failure PAR Peak-to-Average Ratio SMD Surface Mounted Device VBW Video BandWidth VSWR Voltage Standing Wave Ratio W-CDMA Wideband Code Division Multiple Access BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 12 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 11. Revision history Table 16. Revision history Document ID Release date Data sheet status Change notice Supersedes BLC8G27LS-60AV_27LS-60AVH v.4 20161202 Product data sheet - Modifications: BLC8G27LS-60AV_27LS-60AVH v.3 • • • BLC8G27LS-60AV_27LS60AVH v.3 Figure 11 on page 10: updated package outline drawing SOT1275-3 Figure 12 on page 11: updated package outline drawing SOT1275-1 Section 9 on page 12: updated Handling information 20160408 Product data sheet - BLC8G27LS-60AV_27LS60AVH v.2 BLC8G27LS-60AV_27LS-60AVH v.2 20151027 Product data sheet - BLC8G27LS-60AV v.1 BLC8G27LS-60AV v.1 20150330 Objective data sheet - - BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 13 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.ampleon.com. 12.2 Definitions Draft — The document is a draft version only. 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Customer is responsible for doing all necessary testing for the customer’s applications and products using Ampleon products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Ampleon does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 14 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor Non-automotive qualified products — Unless this data sheet expressly states that this specific Ampleon product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Ampleon accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Ampleon’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Ampleon’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Ampleon for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Ampleon’ standard warranty and Ampleon’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Any reference or use of any ‘NXP’ trademark in this document or in or on the surface of Ampleon products does not result in any claim, liability or entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of the NXP group of companies and any reference to or use of the ‘NXP’ trademarks will be replaced by reference to or use of Ampleon’s own trademarks. 13. Contact information For more information, please visit: http://www.ampleon.com For sales office addresses, please visit: http://www.ampleon.com/sales BLC8G27LS-60AV_27LS-60AVH All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 2 December 2016 © Ampleon Netherlands B.V. 2016. All rights reserved. 15 of 16 BLC8G27LS-60AV(H) Power LDMOS transistor 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 7.2 7.3 7.4 7.5 7.6 7.6.1 7.6.2 7.6.3 7.6.4 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 4 Ruggedness in Doherty operation . . . . . . . . . . 4 Impedance information . . . . . . . . . . . . . . . . . . . 4 Recommended impedances for Doherty design 5 VBW in Doherty operation . . . . . . . . . . . . . . . . 6 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Graphical data . . . . . . . . . . . . . . . . . . . . . . . . . 7 CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pulsed CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 8 2-Tone VBW . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Handling information. . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © Ampleon Netherlands B.V. 2016. All rights reserved. For more information, please visit: http://www.ampleon.com For sales office addresses, please visit: http://www.ampleon.com/sales Date of release: 2 December 2016 Document identifier: BLC8G27LS-60AV_27LS-60AVH