BUJ103AX,127

DISCRETE SEMICONDUCTORS DATA SHEET BUJ103AX Silicon Diffused Power Transistor Product specification August 2018 WeEn Semiconductors Product specification Silicon Diffused Power Transistor BUJ103AX GENERAL DESCRIPTION High-voltage, high-speed planar-passivated npn power switching transistor in a plastic full-pack envelope intended for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor control systems, etc. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT VCESM VCBO VCEO IC ICM Ptot VCEsat hFEsat tf Collector-emitter voltage peak value Collector-Base voltage (open emitter) Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage DC current gain Fall time VBE = 0 V 0.25 12.5 33 700 700 400 4 8 26 1.0 80 V V V A A W V ns MIN. MAX. UNIT -65 - 700 400 700 4 8 2 4 26 150 150 V V V A A A A W ˚C ˚C TYP. MAX. UNIT - 4.8 K/W 55 - K/W PINNING - SOT186A PIN base 2 collector 3 emitter IC = 3 A; VCE = 5 V Ic=2A,IB1=0.4A PIN CONFIGURATION DESCRIPTION 1 Ths ≤ 25 ˚C SYMBOL mb 2 1 3 mb isolated 1 2 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER CONDITIONS VCESM VCEO VCBO IC ICM IB IBM Ptot Tstg Tj Collector to emitter voltage Collector to emitter voltage (open base) Collector to base voltage (open emitter) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature VBE = 0 V Ths ≤ 25 ˚C THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS Rth j-hs Junction to heatsink with heatsink compound Rth j-a Junction to ambient in free air August 2018 1 Rev 1.100 WeEn Semiconductors Product specification Silicon Diffused Power Transistor BUJ103AX ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS Visol R.M.S. isolation voltage from all three terminals to external heatsink f = 50-60 Hz; sinusoidal waveform; R.H. ≤ 65% ; clean and dustfree Cisol Capacitance from T2 to external f = 1 MHz heatsink MIN. TYP. - MAX. UNIT 2500 V - 10 - pF MIN. TYP. MAX. UNIT VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 ˚C - - 1.0 2.0 mA mA - - 0.1 0.1 mA mA 400 - 0.1 - mA V 10 12 13.5 - 0.25 0.97 17 20 16 12.5 1.0 1.5 32 32 20 - V V TYP. MAX. UNIT 0.52 2.7 0.3 0.6 3.2 0.43 µs µs µs 1.2 33 1.33 80 µs ns - 1.8 200 µs ns STATIC CHARACTERISTICS Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS 1 ICES ICES Collector cut-off current ICBO ICEO Collector cut-off current 1 VCBO = VCESMmax(700V) VCEO = VCEOMmax(400V) IEBO VCEOsust Emitter cut-off current Collector-emitter sustaining voltage VCEsat VBEsat hFE hFE hFEsat Collector-emitter saturation voltage Base-emitter saturation voltage DC current gain VEB = 7 V; IC = 0 A IB = 0 A; IC = 10 mA; L = 25 mH IC = 3.0 A; IB = 0.6 A IC = 3.0 A; IB = 0.6 A IC = 1 mA; VCE = 5 V IC = 0.5 A; VCE = 5 V IC = 2 A; VCE = 5 V IC = 3 A; VCE = 5 V DC current gain DYNAMIC CHARACTERISTICS Ths = 25 ˚C unless otherwise specified SYMBOL ton ts tf PARAMETER CONDITIONS Switching times (resistive load) ICon = 2.5 A; IBon = -IBoff = 0.5 A; RL = 75 ohms; VBB2 = 4 V; Turn-on time Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time ICon = 2 A; IBon = 0.4 A; LB = 1 µH; -VBB = 5 V ICon = 2 A; IBon = 0.4 A; LB = 1 µH; -VBB = 5 V; Tj = 100 ˚C 1 Measured with half sine-wave voltage (curve tracer). August 2018 2 Rev 1.100 WeEn Semiconductors Product specification Silicon Diffused Power Transistor BUJ103AX ICon 90 % + 50v 100-200R 90 % IC 10 % Horizontal ts ton IBon IB Vertical tf toff Oscilloscope 10 % 300R 1R tr 6V 30-60 Hz 30ns -IBoff Fig.1. Test circuit for VCEOsust. Fig.4. Switching times waveforms with resistive load. VCC IC / mA LC 250 200 IBon LB 100 T.U.T. -VBB 0 min VCE / V VCEOsust Fig.2. Oscilloscope display for VCEOsust. Fig.5. Test circuit inductive load. VCC = 300 V; -VBE = 5 V; LC = 200 uH; LB = 1 uH VCC ICon 90 % IC RL VIM RB 0 10 % T.U.T. ts toff tp IB tf t IBon T t -IBoff Fig.6. Switching times waveforms with inductive load. Fig.3. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 µs; δ = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements. August 2018 3 Rev 1.100 WeEn Semiconductors Product specification Silicon Diffused Power Transistor 120 110 BUJ103AX Normalised Derating % with heatsink compound VBEsat/V 100 1.4 90 1.2 80 70 1.0 60 0.8 P tot 50 40 0.6 30 0.4 20 10 0.2 0 0 20 40 60 80 Ths / C 100 120 0.0 140 0.1 Fig.7. Normalised power dissipation. PD% = 100⋅PD/PD 25˚C = f (Ths) 100 1 IC/A 10 Fig.10. Base-Emitter saturation voltage. Solid lines = typ values, VBEsat = f(IC); at IC/IB =4. h FE VCEsat/V 5V 0.5 0.4 10 0.3 0.2 Tj = 25 C 1V 0.1 1 0.01 0.1 1 10 0.0 IC / A 0.1 Fig.8. Typical DC current gain. hFE = f(IC) parameter VCE 1 IC/A 10 Fig.11. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IC); at IC/IB =4. VCEsat/V 10 2.0 Zth / (K/W) BU1706AX 0.5 1.6 IC=1A 2A 3A 4A 1 0.2 0.1 0.05 0.1 0.02 1.2 0.8 PD 0.4 0.10 1.00 10.00 0.001 IB/A Fig.9. Collector-Emitter saturation voltage. Solid lines = typ values, VCEsat = f(IB); Tj=25˚C. August 2018 D= tp T 0.01 D=0 0.0 0.01 tp 1u t T 10u 100u 1m 10m 100m t/s 1 10 100 Fig.12. Transient thermal impedance. Zth j-hs = f(t); parameter D = tp/T 4 Rev 1.100 WeEn Semiconductors Product specification Silicon Diffused Power Transistor BUJ103AX IC (A) IC (A) 9 100 8 7 Duty Cycle = 0.01 6 10 5 Icm max 4 Ic max tp = 20us II 3 (1) 1 2 50us 100us 1 0 200us 0 100 200 300 400 500 600 700 800 900 VCEclamp (V) I 0.1 Fig.13. Reverse bias safe operating area. Tj ≤ Tj max 500us 1ms 2ms (2) DC III 0.01 VCC 0.001 1 10 100 1,000 VCEclamp (V) LC Fig.15. Forward bias safe operating area. Ths ≤ 25 ˚C IBon -VBB VCL LB (1) (2) I II III T.U.T. NB: Fig.14. Test circuit for reverse bias safe operating area. Vcl ≤ 1000V; Vcc = 150V; VBB = -5V; LB = 1µH; Lc = 200µH August 2018 5 Ptot max and Ptot peak max lines. Second breakdown limits. Region of permissible DC operation. Extension for repetitive pulse operation. Extension during turn-on in single transistor converters provided that RBE ≤ 100 Ω and tp ≤ 0.6 µs. Mounted with heatsink compound and 30 ± 5 newton force on the centre of the envelope. Rev 1.100 WeEn Semiconductors Product specification Silicon Diffused Power Transistor BUJ103AX MECHANICAL DATA August 2018 6 Rev 1.100 WeEn Semiconductors Legal information Data sheet status Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". 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