74AXP8T245PWJ

74AXP8T245 8-bit dual supply translating transceiver; 3-state Rev. 1 — 11 February 2020 Product data sheet 1. General description The 74AXP8T245 is an 8-bit dual supply translating transceiver with 3-state outputs that enable bidirectional level translation. It features two data input-output ports (pins An and Bn), a direction control input (DIR), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/µs and 5.5 V/s. Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated. The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn are in the high-impedance OFF-state. 2. Features and benefits • • • • • • • • • • • • • Wide supply voltage range: • VCC(A): 0.9 V to 5.5 V • VCC(B): 0.9 V to 5.5 V Low input capacitance; CI = 1.5 pF (typical) Low output capacitance; CO = 3.8 pF (typical) Low dynamic power consumption; CPD = 10 pF (typical) Low static power consumption; ICC = 2 μA (25 °C maximum) High noise immunity Complies with JEDEC standard: • JESD8-12 (1.1 V to 1.3 V; inputs) • JESD8-11 (1.4 V to 1.6 V) • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) • JESD12-6 (4.5 V to 5.5 V) ESD protection: • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV Latch-up performance exceeds 100 mA per JESD78D Class II Inputs accept voltages up to 5.5 V Low noise overshoot and undershoot < 10% of VCCO IOFF circuitry provides partial power-down mode operation Specified from -40 °C to +125 °C 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AXP8T245PW -40 °C to +125 °C TSSOP24 plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 74AXP8T245BQ -40 °C to +125 °C DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm SOT815-1 4. Functional diagram B1 B2 21 VCC(A) OE DIR Fig. 1. B3 20 B4 19 B5 18 B6 17 B7 16 B8 15 14 VCC(B) 22 2 3 4 5 6 7 8 9 A1 A2 A3 A4 A5 A6 A7 10 A8 001aai472 Logic symbol DIR OE A1 B1 VCC(A) VCC(B) to other seven channels Fig. 2. 001aai473 Logic diagram (one channel) 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 2 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 5. Pinning information 5.1. Pinning 1 terminal 1 index area 24 VCC(B) VCC(A) 74AXP8T245 74AXP8T245 VCC(A) 1 DIR 2 24 VCC(B) 23 VCC(B) A1 3 22 OE A2 4 21 B1 A3 5 20 B2 A4 6 19 B3 A5 7 18 B4 A6 8 17 B5 A7 9 16 B6 A8 10 15 B7 GND 11 14 B8 GND 12 13 GND 2 23 VCC(B) A1 3 22 OE A2 4 21 B1 A3 5 20 B2 A4 6 19 B3 A5 7 18 B4 A6 8 17 B5 A7 9 16 B6 GND(1) A8 10 15 B7 GND 13 14 B8 GND 12 GND 11 aaa-029980 Transparent top view (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. aaa-029979 Fig. 3. DIR Pin configuration SOT355-1 (TSSOP24) Fig. 4. Pin configuration SOT815-1 (DHVQFN24) 5.2. Pin description Table 2. Pin description Symbol Pin Description VCC(A) 1 supply voltage A (An, OE and DIR are referenced to VCC(A)) DIR 2 direction control A1 to A8 3, 4, 5, 6, 7, 8, 9, 10 data input or output GND[1] 11, 12, 13 ground (0 V) B1 to B8 21, 20, 19, 18, 17, 16, 15, 14 data input or output OE 22 output enable input (active LOW) VCC(B)[2] 23, 24 supply voltage B (Bn is referenced to VCC(B)) [1] [2] All GND pins must be connected to ground (0 V). All VCC(B) pins must be connected to VCC(B). 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 3 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Supply voltage Input VCC(A), VCC(B) OE[2] DIR[2] An[2] Bn[2] 0.9 V to 5.5 V L L An = Bn input 0.9 V to 5.5 V L H input Bn = An 0.9 V to 5.5 V H X Z Z GND[1] X X Z Z [1] [2] Input/output[1] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode. An, DIR and OE are referenced to VCC(A); Bn is referenced to VCC(B). 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC(A) supply voltage A Conditions -0.5 +6.5 V VCC(B) supply voltage B -0.5 +6.5 V IIK input clamping current -20 - VI input voltage [1] -0.5 +6.5 IOK output clamping current VO < 0 V VO output voltage Active mode [1][2][3] -0.5 Suspend or 3-state mode [1] -0.5 +6.5 V [2] - ±25 mA - 100 mA -100 - mA -65 +150 °C - 500 mW VI < 0 V IO output current VO = 0 V to VCCO ICC supply current ICC(A) or ICC(B); per VCC pin IGND ground current per GND pin Tstg storage temperature Ptot total power dissipation [1] [2] [3] [4] -20 Tamb = -40 °C to +125 °C [4] - mA V mA VCCO + 0.5 V The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed. VCCO is the supply voltage associated with the output port. VCCO + 0.5 V should not exceed 6.5 V. For SOT355-1 (TSSOP24) package: Ptot derates linearly with 12.4 mW/K above 110 °C. For SOT815-1 (DHVQFN24) package: Ptot derates linearly with 15.0 mW/K above 117 °C. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 4 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VCC(A) supply voltage A 0.9 5.5 V VCC(B) supply voltage B 0.9 5.5 V VI input voltage 0 5.5 V VO output voltage 0 VCCO V 0 5.5 V -40 +125 °C - 20 ns/V VCCI = 1.2 V - 20 ns/V VCCI = 1.4 V to 1.95 V - 20 ns/V VCCI = 2.3 V to 2.7 V - 20 ns/V VCCI = 3 V to 3.6 V - 10 ns/V VCCI = 4.5 V to 5.5 V - 8 ns/V Active mode [1] Suspend or 3-state mode Tamb ambient temperature Δt/ΔV input transition rise and fall rate [1] [2] VCCI = 0.9 V [2] VCCO is the supply voltage associated with the output port. VCCI is the supply voltage associated with the input port. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 5 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH VIL Parameter HIGH-level input voltage LOW-level input voltage -40 °C to +125 °C Conditions HIGH-level output voltage 74AXP8T245 Product data sheet -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Max Max VCCI = 0.9 V 0.7VCCI - - - - V VCCI = 1.1 V to 1.95 V 0.65VCCI - - - - V VCCI = 2.3 V to 2.7 V 1.6 - - - - V VCCI = 3.0 V to 3.6 V 2.0 - - - - V VCCI = 4.5 V to 5.5 V 0.7VCCI - - - - V VCCI = 0.9 V - - 0.3VCCI 0.3VCCI 0.3VCCI V VCCI = 1.1 V to 1.95 V - - 0.35VCCI 0.35VCCI 0.35VCCI V VCCI = 2.3 V to 2.7 V - - 0.7 0.7 0.7 V VCCI = 3.0 V to 3.6 V - - 0.8 0.8 0.8 V - - 0.3VCCI 0.3VCCI 0.3VCCI V VCCO - 0.1 0.9 - - - V IO = -1.5 mA; VCCO = 1.1 V 0.825 - - - - V IO = -3 mA; VCCO = 1.4 V 1.05 - - - - V IO = -4.5 mA; VCCO = 1.65 V 1.2 - - - - V IO = -8 mA; VCCO = 2.3 V 1.7 - - - - V IO = -10 mA; VCCO = 3.0 V 2.2 - - - - V IO = -12 mA; VCCO = 4.5 V 3.7 - - - - V An, Bn, DIR, OE input An, Bn, DIR, OE input [1] [1] VCCI = 4.5 V to 5.5 V VOH +25 °C VI = VIH IO = -0.1 mA; VCCO = 0.9 V to 5.5 V [2] [3] All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 6 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Symbol VOL Parameter LOW-level output voltage -40 °C to +125 °C Conditions VI = VIL +25 °C Min Typ Max -40 °C to +85 °C -40 °C to +125 °C Max Max Unit [2] IO = 0.1 mA; VCCO = 0.9 V to 5.5 V - 0 0.1 0.1 0.1 V IO = 1.5 mA; VCCO = 1.1 V [3] - - 0.275 0.275 0.275 V IO = 3 mA; VCCO = 1.4 V - - 0.35 0.35 0.35 V IO = 4.5 mA; VCCO = 1.65 V - - 0.45 0.45 0.45 V IO = 8 mA; VCCO = 2.3 V - - 0.7 0.7 0.7 V IO = 10 mA; VCCO = 3.0 V - - 0.8 0.8 0.8 V IO = 8 mA; VCCO = 4.5 V - - 0.5 0.5 0.5 V IO = 12 mA; VCCO = 4.5 V - - 0.8 0.8 0.8 V - - ±0.1 ±0.5 ±1 μA II input leakage current DIR, OE input; VI = 0 V to 5.5 V; VCCI = 0.9 V to 5.5 V IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCCO = 0.9 V to 5.5 V [2] - - ±0.1 ±0.5 ±2 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 5.5 V; VCC(B) = 0 V [2] - - ±0.1 ±0.5 ±2 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 5.5 V [2] - - ±0.1 ±0.5 ±2 μA - - 0.1 0.5 2 μA A port; VI or VO = 0 V to 5.5 V; VCC(A) = 0 V; VCC(B) = 0.9 V to 5.5 V - - 0.1 0.5 2 μA B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0.9 V to 5.5 V - - 0.1 0.5 2 μA - - ±0.1 ±0.5 ±2 μA - - ±0.1 ±0.5 ±2 μA - - ±0.1 ±0.5 ±2 μA IOFF ΔIOFF DIR, OE input; VI = 0 V to 5.5 V; VCC(A) = 0 V; power-off leakage current VCC(B) = 0.9 V to 5.5 V DIR, OE input; VI = 0 V or 5.5 V; VCC(A) = 0 V to 0.1 V; additional VCC(B) = 0.9 V to 5.5 V power-off leakage current A port; V = 0 V or 5.5 V; V O CC(A) = 0 V to 0.1 V; VCC(B) = 0.9 V to 5.5 V; VI = 0 V or 5.5 V B port; VO = 0 V or 5.5 V; VCC(B) = 0 V to 0.1 V; VCC(A) = 0.9 V to 5.5 V; VI = 0 V or 5.5 V 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 7 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Symbol ICC Parameter supply current -40 °C to +125 °C Conditions +25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Max Max VCC(A), VCC(B) = 0.9 V to 5.5 V - - 2 13 35 μA VCC(A) = 5.5 V; VCC(B) = 0 V - - 2 13 35 μA VCC(A) = 0 V; VCC(B) = 5.5 V - - -0.1 -0.8 -2 μA VCC(A), VCC(B) = 0.9 V to 5.5 V - - 2 13 35 μA VCC(B) = 5.5 V; VCC(A) = 0 V - - 2 13 35 μA VCC(B) = 0 V; VCC(A) = 5.5 V - - -0.1 -0.8 -2 μA - 2 100 150 200 μA A port; VI = 0 V or VCCI; IO = 0 A [1] B port; VI = 0 V or VCCI; IO = 0 A ΔICC [1] [2] [3] [4] additional supply current per input; other pins at VCCI or ground (0 V); IO = 0 A; VCC(A), VCC(B) = 4.5 V to 5.5 V; VI = VCCI - 0.6 V [4] VCCI is the supply voltage associated with the control inputs or input port. VCCO is the supply voltage associated with the output port. Typical values for VOL and VOH are measured at VCCO is 0.9 V. Typical values for ΔICC are measured at VCC(A), VCC(B) = 5 V. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 8 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Table 7. Typical total supply current ICC(A) at Tamb = 25 °C Voltages are referenced to GND (ground = 0 V). VCC(A) VCC(B) Unit 0V 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V 0V 0.00 0.01 0.01 0.01 0.01 0.01 0.01 0.01 μA 0.9 V 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 μA 1.2 V 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 μA 1.5 V 0.01 0.02 0.01 0.01 0.01 0.01 0.01 0.01 μA 1.8 V 0.01 0.07 0.03 0.01 0.01 0.01 0.01 0.01 μA 2.5 V 0.01 0.19 0.17 0.13 0.07 0.01 0.01 0.01 μA 3.3 V 0.01 0.39 0.37 0.34 0.29 0.12 0.01 0.01 μA 5.0 V 0.01 0.95 0.94 0.92 0.89 0.76 0.53 0.01 μA Table 8. Typical total supply current ICC(B) at Tamb = 25 °C Voltages are referenced to GND (ground = 0 V). VCC(A) VCC(B) Unit 0V 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V 0V 0.00 0.01 0.01 0.01 0.01 0.01 0.01 0.01 μA 0.9 V 0.01 0.01 0.01 0.03 0.07 0.19 0.39 0.94 μA 1.2 V 0.01 0.01 0.01 0.01 0.03 0.17 0.37 0.94 μA 1.5 V 0.01 0.01 0.01 0.01 0.01 0.13 0.34 0.92 μA 1.8 V 0.01 0.01 0.01 0.01 0.01 0.07 0.29 0.89 μA 2.5 V 0.01 0.01 0.01 0.01 0.01 0.01 0.12 0.76 μA 3.3 V 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.53 μA 5.0 V 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 μA 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 9 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 10. Dynamic characteristics Table 9. Typical dynamic characteristics at VCC(A) = 0.9 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. Symbol Parameter tpd propagation delay tdis disable time ten [1] enable time Conditions VCC(B) Unit 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V An to Bn [1] 34 21 17 15 13 12.5 12 ns Bn to An [1] 34 21 17 15 13 12.5 12 ns OE to An [1] 34 34 34 34 34 34 34 ns OE to Bn [1] 40 28 25 24 22 23 21 ns OE to An [1] 49 49 49 49 49 49 49 ns OE to Bn [1] 42 27 24 22 22 22 24 ns tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Table 10. Typical dynamic characteristics at VCC(B) = 0.9 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. Symbol Parameter Conditions 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V tpd propagation delay An to Bn [1] 34 31 30 30 30 30 30 ns Bn to An [1] 34 31 30 30 30 30 30 ns OE to An [1] 34 17 12.5 11.5 8.6 9.2 6.6 ns OE to Bn [1] 40 31 29 29 28 28 28 ns OE to An [1] 49 19.5 12 9.1 6.1 4.8 3.8 ns OE to Bn [1] 42 32 30 28 28 27 28 ns tdis disable time ten [1] enable time VCC(A) Unit tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Table 11. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C [1] [2]Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7. Symbol Parameter Conditions VCC(A) and VCC(B) Unit 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V CPD power dissipation capacitance A port: (direction A to B); B port: (direction B to A) 0.5 0.5 0.5 0.5 0.5 0.7 0.9 pF A port: (direction B to A); B port: (direction A to B) 9.0 9.3 9.5 9.7 9.9 10.2 10.9 pF CI input capacitance VI = 0 V or VCCI; VCCI = 0 V to 5.5 V 1.2 1.2 1.2 1.2 1.2 1.2 1.2 pF CI/O input/output capacitance VO = 0 V; VCCO = 0 V 3.6 3.6 3.6 3.6 3.6 3.6 3.6 pF [1] [2] CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of the outputs. fi = 1 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 10 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Table 12. Dynamic characteristics for temperature range -40 °C to +85 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. Symbol tpd Parameter Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max 4 38 3.6 25 3.4 21 3.1 16 2.9 14.5 2.7 14.5 ns VCC(A) = 1.5 V ± 0.1 V 3.5 33 3 21 2.8 16.5 2.6 12.5 2.4 10.5 2.2 9.8 ns VCC(A) = 1.8 V ± 0.15 V 3.1 32 2.7 19 2.4 15 2.2 11 2.1 9 1.9 8.2 ns VCC(A) = 2.5 V ± 0.2 V 2.8 31 2.4 17.5 2.1 13.5 1.9 9.1 1.7 7.5 1.6 6.6 ns VCC(A) = 3.3 V ± 0.3 V 2.7 31 2.3 17 2 13 1.8 8.5 1.6 6.9 1.4 5.8 ns VCC(A) = 5.0 V ± 0.5 V 2.7 31 2.2 16.5 1.9 12.5 1.6 8.1 1.4 6.4 1.2 5 ns VCC(A) = 1.2 V ± 0.1 V 4 38 3.5 33 3.1 32 2.8 31 2.7 31 2.7 31 ns VCC(A) = 1.5 V ± 0.1 V 3.6 25 3 21 2.7 19 2.4 17.5 2.3 17 2.2 16.5 ns VCC(A) = 1.8 V ± 0.15 V 3.4 21 2.8 16.5 2.4 15 2.1 13.5 2 13 1.9 12.5 ns VCC(A) = 2.5 V ± 0.2 V 3.1 16 2.6 12.5 2.2 11 1.9 9.1 1.8 8.5 1.6 8.1 ns VCC(A) = 3.3 V ± 0.3 V 2.9 14.5 2.4 10.5 2.1 9 1.7 7.5 1.6 6.9 1.4 6.4 ns VCC(A) = 5.0 V ± 0.5 V 2.7 14.5 2.2 9.8 1.9 8.2 1.6 6.6 1.4 5.8 1.2 5 ns propagation An to Bn delay VCC(A) = 1.2 V ± 0.1 V [1] Bn to An 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 11 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Symbol ten Parameter enable time Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 4.6 48 4.6 48 4.6 48 4.6 48 4.6 48 4.6 48 ns VCC(A) = 1.5 V ± 0.1 V 3.6 24 3.6 24 3.6 24 3.6 24 3.6 24 3.6 24 ns VCC(A) = 1.8 V ± 0.15 V 2.9 17.5 2.9 17.5 2.9 17.5 2.9 17.5 2.9 17.5 2.9 17.5 ns VCC(A) = 2.5 V ± 0.2 V 2.3 11 2.3 11 2.3 11 2.3 11 2.3 11 2.3 11 ns VCC(A) = 3.3 V ± 0.3 V 2 8.1 2 8.1 2 8.1 2 8.1 2 8.1 2 8.1 ns VCC(A) = 5.0 V ± 0.5 V 1.8 6 1.8 6 1.8 6 1.8 6 1.8 6 1.8 6 ns VCC(A) = 1.2 V ± 0.1 V 5 46 4.6 32 4.1 27 4.1 24 4 25.5 4.1 26 ns VCC(A) = 1.5 V ± 0.1 V 4.2 40 3.8 24 3.5 19.5 3.3 16 3.3 15 3.3 14.5 ns VCC(A) = 1.8 V ± 0.15 V 3.9 36 3.3 21 3 17.5 2.8 13.5 2.8 12 2.8 11.5 ns VCC(A) = 2.5 V ± 0.2 V 3.4 35 2.8 18.5 2.5 14.5 2.3 11 2.2 9.3 2.2 8.4 ns VCC(A) = 3.3 V ± 0.3 V 3.2 34 2.7 17.5 2.3 13.5 2.1 9.5 1.9 8.1 1.9 7.1 ns VCC(A) = 5.0 V ± 0.5 V 3.1 37 2.4 17 2.1 13 1.9 8.7 1.8 7.3 1.7 6.1 ns OE to An [1] OE to Bn 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 12 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Symbol Parameter Conditions Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 4.9 36 4.9 36 4.9 36 4.9 36 4.9 36 4.9 36 ns VCC(A) = 1.5 V ± 0.1 V 3.9 22 3.9 22 3.9 22 3.9 22 3.9 22 3.9 22 ns VCC(A) = 1.8 V ± 0.15 V 4 19 4 19 4 19 4 19 4 19 4 19 ns VCC(A) = 2.5 V ± 0.2 V 2.9 13 2.9 13 2.9 13 2.9 13 2.9 13 2.9 13 ns VCC(A) = 3.3 V ± 0.3 V 3.5 13 3.5 13 3.5 13 3.5 13 3.5 13 3.5 13 ns VCC(A) = 5.0 V ± 0.5 V 2.4 9.7 2.4 9.7 2.4 9.7 2.4 9.7 2.4 9.7 2.4 9.7 ns VCC(A) = 1.2 V ± 0.1 V 5.6 41 4.8 32 5.1 30 4.4 26 5.1 27 4.1 24 ns VCC(A) = 1.5 V ± 0.1 V 5.1 34 4.4 25 4.6 23 3.8 18.5 4.6 19.5 3.6 17 ns VCC(A) = 1.8 V ± 0.15 V 4.7 32 4 23 4.3 21 3.4 16.5 4.2 17.5 3.3 15 ns VCC(A) = 2.5 V ± 0.2 V 4.3 29.5 3.6 20.6 3.9 18.5 3 14.5 3.9 15 2.9 12.1 ns VCC(A) = 3.3 V ± 0.3 V 4.2 29 3.5 19.5 3.7 17.5 2.9 13.5 3.7 14 2.7 11 ns VCC(A) = 5.0 V ± 0.5 V 4.1 28 3.3 19 3.6 16.5 2.7 12.5 3.5 13 2.5 10 ns 1 - 1 - 1 - 1 - 1 - 1 - ns disable time OE to An tdis VCC(B) [1] OE to Bn tt [1] transition time An, Bn output VCC(A) = 1.1 V to 5.5 V tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 13 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Table 13. Dynamic characteristics for temperature range -40 °C to +125 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. Symbol tpd Parameter Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max 4 38 3.6 26 3.4 22 3.1 17 2.9 15 2.7 15 ns VCC(A) = 1.5 V ± 0.1 V 3.5 33 3 22 2.8 17.5 2.6 13.5 2.4 11.5 2.2 10.5 ns VCC(A) = 1.8 V ± 0.15 V 3.1 32 2.7 20 2.4 16 2.2 12 2.1 9.7 1.9 9.4 ns VCC(A) = 2.5 V ± 0.2 V 2.8 31 2.4 18.5 2.1 14.5 1.9 9.8 1.7 8.1 1.6 7.1 ns VCC(A) = 3.3 V ± 0.3 V 2.7 31 2.3 18 2 14 1.8 9.2 1.6 7.5 1.4 6.3 ns VCC(A) = 5.0 V ± 0.5 V 2.7 31 2.2 17.5 1.9 13.5 1.6 8.8 1.4 6.9 1.2 5.5 ns VCC(A) = 1.2 V ± 0.1 V 4 38 3.5 33 3.1 32 2.8 31 2.7 31 2.7 31 ns VCC(A) = 1.5 V ± 0.1 V 3.6 26 3 22 2.7 20 2.4 18.5 2.3 18 2.2 17.5 ns VCC(A) = 1.8 V ± 0.15 V 3.4 22 2.8 17.5 2.4 16 2.1 14.5 2 14 1.9 13.5 ns VCC(A) = 2.5 V ± 0.2 V 3.1 17 2.6 13.5 2.2 12 1.9 9.8 1.8 9.2 1.6 8.8 ns VCC(A) = 3.3 V ± 0.3 V 2.9 15 2.4 11.5 2.1 9.7 1.7 8.1 1.6 7.5 1.4 6.9 ns VCC(A) = 5.0 V ± 0.5 V 2.7 15 2.2 10.5 1.9 9.4 1.6 7.1 1.4 6.3 1.2 5.5 ns propagation An to Bn delay VCC(A) = 1.2 V ± 0.1 V [1] Bn to An 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 14 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Symbol ten Parameter enable time Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 4.6 48 4.6 48 4.6 48 4.6 48 4.6 48 4.6 48 ns VCC(A) = 1.5 V ± 0.1 V 3.6 25 3.6 25 3.6 25 3.6 25 3.6 25 3.6 25 ns VCC(A) = 1.8 V ± 0.15 V 2.9 18.5 2.9 18.5 2.9 18.5 2.9 18.5 2.9 18.5 2.9 18.5 ns VCC(A) = 2.5 V ± 0.2 V 2.3 11.5 2.3 11.5 2.3 11.5 2.3 11.5 2.3 11.5 2.3 11.5 ns VCC(A) = 3.3 V ± 0.3 V 2 8.7 2 8.7 2 8.7 2 8.7 2 8.7 2 8.7 ns VCC(A) = 5.0 V ± 0.5 V 1.8 6.5 1.8 6.5 1.8 6.5 1.8 6.5 1.8 6.5 1.8 6.5 ns VCC(A) = 1.2 V ± 0.1 V 5 46 4.6 32 4.1 28 4.1 25 4 26 4.1 26 ns VCC(A) = 1.5 V ± 0.1 V 4.2 40 3.8 25 3.5 21 3.3 17 3.3 16 3.3 15.5 ns VCC(A) = 1.8 V ± 0.15 V 3.9 36 3.3 23 3 19 2.8 14.5 2.8 13 2.8 12.5 ns VCC(A) = 2.5 V ± 0.2 V 3.4 35 2.8 19.5 2.5 15.5 2.3 12 2.2 10.5 2.2 9.1 ns VCC(A) = 3.3 V ± 0.3 V 3.2 34 2.7 18.5 2.3 14.5 2.1 10.5 1.9 8.7 1.9 7.6 ns VCC(A) = 5.0 V ± 0.5 V 3.1 37 2.4 18 2.1 14 1.9 9.4 1.8 7.9 1.7 6.7 ns OE to An [1] OE to Bn 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 15 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Symbol Parameter Conditions Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 4.9 36 4.9 36 4.9 36 4.9 36 4.9 36 4.9 36 ns VCC(A) = 1.5 V ± 0.1 V 3.9 23 3.9 23 3.9 23 3.9 23 3.9 23 3.9 23 ns VCC(A) = 1.8 V ± 0.15 V 4 20 4 20 4 20 4 20 4 20 4 20 ns VCC(A) = 2.5 V ± 0.2 V 2.9 14 2.9 14 2.9 14 2.9 14 2.9 14 2.9 14 ns VCC(A) = 3.3 V ± 0.3 V 3.5 14 3.5 14 3.5 14 3.5 14 3.5 14 3.5 14 ns VCC(A) = 5.0 V ± 0.5 V 2.4 10.2 2.4 10.2 2.4 10.2 2.4 10.2 2.4 10.2 2.4 10.2 ns VCC(A) = 1.2 V ± 0.1 V 5.6 41 4.8 33 5.1 31 4.4 27 5.1 28 4.1 25 ns VCC(A) = 1.5 V ± 0.1 V 5.1 35 4.4 27 4.6 25 3.8 20 4.6 21 3.6 18 ns VCC(A) = 1.8 V ± 0.15 V 4.7 33 4 24 4.3 22 3.4 17.5 4.2 18.5 3.3 16 ns VCC(A) = 2.5 V ± 0.2 V 4.3 31 3.6 22 3.9 19.5 3 15.5 3.9 16 2.9 13 ns VCC(A) = 3.3 V ± 0.3 V 4.2 30 3.5 21 3.7 18.5 2.9 14.5 3.7 15 2.7 11.5 ns VCC(A) = 5.0 V ± 0.5 V 4.1 29 3.3 20 3.6 17.5 2.7 13.5 3.5 13.5 2.5 10.5 ns 1 - 1 - 1 - 1 - 1 - 1 - ns disable time OE to An tdis VCC(B) [1] OE to Bn tt [1] transition time An, Bn output VCC(A) = 1.1 V to 5.5 V tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 16 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 10.1. Waveforms and test circuit VI VM An, Bn input GND tPHL tPLH VOH VM Bn, An output VOL 001aai475 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The data input (An, Bn) to output (Bn, An) propagation delay times VI OE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCCO VM VX VOL tPZH tPHZ output HIGH-to-OFF OFF-to-HIGH VOH VY VM GND outputs enabled outputs enabled outputs disabled 001aai474 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. Enable and disable times Table 14. Measurement points Supply voltage Input [1] Output [2] VCC(A), VCC(B) VM VM VX VY 0.9 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH - 0.1 V 1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH - 0.15 V 3.0 V to 5.5 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH - 0.3 V [1] [2] VCCI is the supply voltage associated with the data input port. VCCO is the supply voltage associated with the output port. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 17 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VEXT VCC G VI RL VO DUT RT CL RL 001aae331 Test data is given in Table 15. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 15. Test data Supply voltage Load Input VEXT VCC(A), VCC(B) CL RL tr, tf VI [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ [2] 0.9 V to 5.5 V 5 pF 10 kΩ ≤3.0 ns VCCI GND GND 2VCCO [1] [2] VCCI is the supply voltage associated with the data input port. VCCO is the supply voltage associated with the output port. 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 18 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 10.2. Additional propagation delay versus load capacitance graphs tpd (ns) aaa-029962 6 aaa-029963 8 tpd (ns) (3) 5 (3) 6 4 (2) 3 (2) 4 (1) (1) 2 2 1 0 0 20 40 60 0 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 5.5 V (2) Typical: Tamb = 25 °C; VCCO = 5 V (3) Maximum: VCCO = 4.5 V Fig. 8. aaa-029964 tpd (ns) 8 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 3.6 V (2) Typical: Tamb = 25 °C; VCCO = 3.3 V (3) Maximum: VCCO = 3 V Additional propagation delay versus load capacitance 10 0 Fig. 9. Additional propagation delay versus load capacitance aaa-029965 12 tpd (ns) 10 (3) (3) 8 6 (2) 6 (2) (1) 4 (1) 4 2 0 2 0 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 2.7 V (2) Typical: Tamb = 25 °C; VCCO = 2.5 V (3) Maximum: VCCO = 2.3 V Product data sheet 0 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 1.95 V (2) Typical: Tamb = 25 °C; VCCO = 1.8 V (3) Maximum: VCCO = 1.65 V Fig. 10. Additional propagation delay versus load capacitance 74AXP8T245 0 Fig. 11. Additional propagation delay versus load capacitance All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 19 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state aaa-029966 16 tpd (ns) aaa-029967 30 tpd (ns) 25 (3) (3) 12 20 8 15 (2) (2) 10 (1) 4 (1) 5 0 0 20 40 60 0 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 1.6 V (2) Typical: Tamb = 25 °C; VCCO = 1.5 V (3) Maximum: VCCO = 1.4 V 0 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 1.3 V (2) Typical: Tamb = 25 °C; VCCO = 1.2 V (3) Maximum: VCCO = 1.1 V Fig. 12. Additional propagation delay versus load capacitance Fig. 13. Additional propagation delay versus load capacitance aaa-029968 32 tpd (ns) 24 16 8 0 0 20 40 60 80 100 CL (pF) Tamb = 25 °C; VCCO = 0.9 V For tPLH, tPHL, tPZH and tPZL Fig. 14. Additional propagation delay versus load capacitance 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 20 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 11. Application information 11.1. Unidirectional logic level-shifting application The circuit given in Fig. 15 is an example of the 74AXP8T245 being used in an unidirectional logic level-shifting application. VCC1 VCC1 VCC(A) GND An 1 23,24 11,12,13 74AXP8T45 3,4,5,6,7,8,9,10 2 14,15,16,17,18,19,20,21 22 VCC2 VCC(B) DIR VCC2 Bn OE system-1 system-2 aaa-029981 Schematic given for one channel. Fig. 15. Unidirectional logic level-shifting application Table 16. Description unidirectional logic level-shifting application Name Function Description 74AXP8T245 Product data sheet VCC(A) VCC1 supply voltage of system-1 (0.9 V to 5.5 V) GND GND device GND A OUT output level depends on VCC1 voltage B IN input threshold value depends on VCC2 voltage DIR DIR the GND (LOW level) determines B port to A port direction VCC(B) VCC2 supply voltage of system-2 (0.9 V to 5.5 V) OE OE The GND (LOW level) enables the output ports All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 21 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 11.2. Bidirectional logic level-shifting application Fig. 16 shows the 74AXP8T245 being used in a bidirectional logic level-shifting application. VCC1 VCC1 VCC2 VCC(A) I/O-1 PULL-UP/DOWN GND A 1 23,24 11,12,13 74AXP8T45 3,4,5,6,7,8,9,10 2 14,15,16,17,18,19,20,21 22 VCC2 VCC(B) DIR I/O-2 PULL-UP/DOWN B OE OE DIR CTRL system-1 system-2 aaa-029982 Schematic given for one channel. Pull-up or pull-down only needed for 74AXP8T245. Fig. 16. Bidirectional logic level-shifting application Table 17 gives a sequence that will illustrate data transmission from system-1 to system-2 and then from system-2 to system-1. Table 17. Description bidirectional logic level-shifting application H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 74AXP8T245 Product data sheet State DIR CTRL OE I/O-1 I/O-2 Description 1 H L output input system-1 data to system-2 2 H H Z Z system-2 is getting ready to send data to system-1. I/O-1 and I/O-2 are disabled. The bus-line state depends on bus hold. 3 L H Z Z DIR bit is set LOW. I/O-1 and I/O-2 still are disabled. The bus-line state depends on bus hold. 4 L L input output system-2 data to system-1 All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 22 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 12. Package outline TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm D SOT355-1 E A X c HE y v M A Z 13 24 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 7.9 7.7 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT355-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig. 17. Package outline SOT355-1 (TSSOP24) 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 23 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm D B SOT815-1 A A E A1 c detail X terminal 1 index area C e1 terminal 1 index area e 2 y1 C v M C A B w M C b 11 y L 12 1 e2 Eh 24 13 23 14 X Dh 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 e2 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 5.6 5.4 4.25 3.95 3.6 3.4 2.25 1.95 0.5 4.5 1.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT815-1 --- --- --- EUROPEAN PROJECTION ISSUE DATE 03-04-29 Fig. 18. Package outline SOT815-1 (DHVQFN24) 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 24 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 13. Abbreviations Table 18. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model 14. Revision history Table 19. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AXP8T245 v.1 Product data sheet - - 74AXP8T245 Product data sheet 20200211 All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 25 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. 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Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74AXP8T245 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 26 / 27 74AXP8T245 Nexperia 8-bit dual supply translating transceiver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 4 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................5 9. Static characteristics....................................................6 10. Dynamic characteristics.......................................... 10 10.1. Waveforms and test circuit...................................... 17 10.2. Additional propagation delay versus load capacitance graphs............................................................ 19 11. Application information............................................21 11.1. Unidirectional logic level-shifting application............ 21 11.2. Bidirectional logic level-shifting application.............. 22 12. Package outline........................................................ 23 13. Abbreviations............................................................ 25 14. Revision history........................................................25 15. Legal information......................................................26 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 11 February 2020 74AXP8T245 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 February 2020 © Nexperia B.V. 2020. All rights reserved 27 / 27