A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
Document Title
High Performance 315/433/868/915MHz FSK/GFSK Transceiver with 2K ~ 250Kbps
Revision History
Rev. No.
History
Issue Date
Remark
0.1
Initial issue
Feb., 2011
Preliminary,
0.2
Update technical data and add GFSK modulation.
Apr., 2011
0.3
Add TX power setting and modify Figure 12.2
July, 2011
0.4
Modify GRS bit (00h), Figure 12.2, Strobe command and
tape reel information. Add Shenzhen office address.
July, 2011
0.5
Modify TX matching (L2) to reduce TX current for 868MHz.
Add 315MHz RF data and schematic.
Modify description of CH9 (PLL II, WRCKS, PCS), Ch 12
and Ch 13. Correct Figure 12.1.
Sep., 2011
0.6
Jan., 2012
Important Notice:
AMICCOM reserves the right to make changes to its products or to discontinue any integrated circuit product or service
without notice. AMICCOM integrated circuit products are not designed, intended, authorized, or warranted to be suitable
for use in life-support applications, devices or systems or other critical applications. Use of AMICCOM products in such
applications is understood to be fully at the risk of the customer.
Jan., 2012, Version 0.6
1
AMICCOM Electronics Corporation
A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
Table of contents
1. General Description................................................................................................................................................. 4
2. Typical Applications................................................................................................................................................. 4
3. Features ................................................................................................................................................................. 4
4. Pin Configurations ................................................................................................................................................... 5
5. RF Chip Block Diagram ........................................................................................................................................... 5
6. Pin Descriptions ...................................................................................................................................................... 6
7. Absolute Maximum Ratings ..................................................................................................................................... 6
8. Specification............................................................................................................................................................ 7
9. Control Register .................................................................................................................................................... 10
9.1 Control Register Table .................................................................................................................................. 10
9.2 Control Register Description.......................................................................................................................... 11
9.2.1 System clock (Address: 00h) ............................................................................................................... 11
9.2.2 PLL I (Address: 01h) ........................................................................................................................... 11
9.2.3 PLL II (Address: 02h) .......................................................................................................................... 12
9.2.4 PLL III (Address: 03h) ......................................................................................................................... 12
9.2.5 PLL IV (Address: 04h) ......................................................................................................................... 12
9.2.6 Crystal (Address: 05h)......................................................................................................................... 13
9.2.7 TX I (Address: 06h) Page 0 ................................................................................................................. 13
9.2.7.1 WOR I (Address: 06h) Page 1 .......................................................................................................... 14
9.2.7.2 WOR II (Address: 06h) Page 2 ......................................................................................................... 14
9.2.7.3 RF Current (Address: 06h) Page 3.................................................................................................... 15
9.2.7.4 Power Manage (Address: 06h) Page 4.............................................................................................. 15
9.2.7.5 AGC RSSI Threshold (Address: 06h) Page 5 .................................................................................... 16
9.2.7.6 AGC Control 1 (Address: 06h) Page 6.............................................................................................. 16
9.2.7.7 AGC Control 2(Address: 06h) Page 7............................................................................................... 17
9.2.7.8 GPIO (Address: 06h) Page 8 ........................................................................................................... 17
9.2.7.9 CKO (Address: 06h) Page 9 ............................................................................................................. 18
9.2.7.10 VCO current (Address: 06h) Page 10.............................................................................................. 19
9.2.7.11 Channel Group (I) (Address: 06h) Page 11...................................................................................... 19
9.2.7.12 Channel Group (II) (Address: 06h) Page 12..................................................................................... 20
9.2.8 TX II (Address: 07h) ............................................................................................................................ 20
9.2.9 RX I (Address: 08h)............................................................................................................................. 21
9.2.10 RX II (Address: 09h).......................................................................................................................... 21
9.2.11 ADC (Address: 0Ah).......................................................................................................................... 22
9.2.12 FIFO (Address: 0Bh) ......................................................................................................................... 23
9.2.13 Code (Address: 0Ch)......................................................................................................................... 23
9.2.14 Pin Control (Address: 0Dh)................................................................................................................ 23
9.2.15 Calibration (Address: 0Eh)................................................................................................................. 24
9.2.16 Mode control (Address: 0Fh) ............................................................................................................. 25
10. SPI Format......................................................................................................................................................... 27
10.1 SPI Format ................................................................................................................................................. 27
10.2 SPI Timing Chart ........................................................................................................................................ 28
10.3 Control register access ............................................................................................................................... 28
10.4 SPI Timing Specification ............................................................................................................................. 28
10.5 Reset Command......................................................................................................................................... 29
10.6 Reset TX FIFO Pointer................................................................................................................................ 29
10.7 Reset Rx FIFO Pointer................................................................................................................................ 29
10.8 ID Read/Write Command ............................................................................................................................ 29
10.9 FIFO R/W Command .................................................................................................................................. 30
11 Crystal Oscillator .................................................................................................................................................. 31
11.1 Use External Crystal ................................................................................................................................... 31
11.2 Use External Clock ..................................................................................................................................... 31
12. System Clock ...................................................................................................................................................... 32
12.1 Clock Domain ............................................................................................................................................. 32
12.2 System Clock and IF Filter .......................................................................................................................... 33
12.3 Example of 10Kbps data rate by 12.8MHz Xtal ............................................................................................ 33
12.3 Example of special data rate by 19.6608MHz Xtal........................................................................................ 34
13. Tranceiver Frequency .......................................................................................................................................... 36
14. State machine ..................................................................................................................................................... 37
14.1 Key Strobe Commands ............................................................................................................................... 37
14.2 FIFO mode ................................................................................................................................................. 37
14.3 Direct mode................................................................................................................................................ 39
Jan., 2012, Version 0.6
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AMICCOM Electronics Corporation
A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
15. Calibration........................................................................................................................................................... 42
15.1 IF Calibration Process................................................................................................................................. 42
15.2. VCO band Calibration Process................................................................................................................... 42
16. FIFO (First In First Out)........................................................................................................................................ 43
16.1 Packet Format ............................................................................................................................................ 43
16.2 Bit Stream Process ..................................................................................................................................... 43
16.3 Transmission Time...................................................................................................................................... 44
16.4 Usage of TX and RX FIFO .......................................................................................................................... 44
16.4.1 Easy FIFO Mode............................................................................................................................... 45
17. Analog Digital Converter ...................................................................................................................................... 46
17.1 Temperature Measurement ......................................................................................................................... 46
17.2 RSSI Measurement..................................................................................................................................... 46
17.3 Carrier detect.............................................................................................................................................. 47
18. Battery Detect ..................................................................................................................................................... 47
19. Application Circuit................................................................................................................................................ 48
19.1 MD7108-A90 (915MHz Band) ..................................................................................................................... 48
19.2 MD7108-A80 (868MHz Band) ..................................................................................................................... 48
19.3 MD7108-A40 (433MHz Band) ..................................................................................................................... 49
19.4 MD7108-A30 (315MHz Band) ..................................................................................................................... 49
19.5 MD7108-A50 (470MHz ~ 510MBand) .......................................................................................................... 50
20. Abbreviations ...................................................................................................................................................... 50
21. Ordering Information............................................................................................................................................ 50
22. Package Information............................................................................................................................................ 52
23. Top Marking Information ...................................................................................................................................... 53
24. Reflow Profile ...................................................................................................................................................... 54
25. Tape Reel Information ......................................................................................................................................... 55
26. Product Status..................................................................................................................................................... 57
Jan., 2012, Version 0.6
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AMICCOM Electronics Corporation
A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
1. General Description
A7108 is a monolithic low-IF architecture CMOS FSK/GFSK TRX for wireless applications in the 315/433/470/510/868/
915MHz ISM bands. In addition, this device is especially suitable for the 470MHz ~ 510MHz wireless AMR (Auto Meter
Reading) in China.
A7108 is one of AMICCOM’s high performance Sub 1GHz family chips. This device offers a low cost solution with
advanced radio features such as high output power amplifier up to 20 dBm (433MHz band, excluding LPF and HPF) and
low phase noise receiver (- 114 dBm @ 10Kbps, -110dBm @50Kbps). Therefore, A7108 is very suitable for long LOS
(line-of-sight) applications without the need to add an external LNA or PA.
The on-chip data rate divider supports programmable on-air data rates from 2K to 250Kbps to satisfy different system
requirements. For a battery powered system, A7108 supports fast PLL settling time (35 us), Xtal settling time (500 us)
and on-chip Regulator settling time (450 us) to reduce average power consumption.
For packet handling, A7108 supports direct mode as well as FIFO mode. In the RX direct mode, GIO1 or GIO2 can be
serially output the raw data from the digital demodulator. In the TX direct mode, MCU can serially feed the digital data to
GIO1 or GIO2 which is connected to the modulator. In the other hand, a packet in FIFO mode, the preamble is self
generated and the physical packet ID is programmable up to 8 bytes. The built-in separated 64-bytes TX/RX FIFO is
treated as payload for data buffering including CRC of error detection, FEC of error correction, data whitening for data
encryption / decryption, and Manchester encoding.
Additional device features such as on-chip regulator, low battery detect, carrier detect, preamble detect, frame sync in
FIFO mode, AGC (Auto Gain Control), AFC (Auto Frequency compensation), Auto calibration (VCO and IF Filter),
programmable IF Filter, multi Xtal sources, on-chip Xtal compensated capacitors, and RSSI for the clear channel
assistance are used to simplify system development and cost. Overall, A7108 is a high performance and a highly
integrated ISM bands TRX with low BOM cost.
2. Typical Applications
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Wireless ISM band data communication
Remote Control
RKE (Remote Keyless Entry)
Wireless Energy Management
Home Automation
AMR (Auto Meter Reading)
3. Features
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Small size (QFN 4X4, 20 pins).
Frequency band: 315/433/470/868/915 MHz.
FSK and GFSK modulation.
Supports 3-wire or 4-wire SPI.
Deep sleep current (0.2uA).
Low sleep current (2 uA).
TX Current consumption 433MHz: 30mA @ 10dBm, 70mA @ 17dBm.
TX Current consumption 868MHz: 37mA @ 10dBm, 52mA @ 13dBm.
RX Current consumption (AGC Off) 434MHz: 13.5 mA and 868MHz: 14 mA.
On chip regulator, supports input voltage 2.0 ~ 3.6 V.
Programmable data rate from 2Kbps to 250Kbps.
Physical 64 bytes TX/RX FIFO buffers.
FIFO extension up to 256 bytes.
High RX sensitivity 433.92MHz.
u
-117dBm at 2Kbps on-air data rate.
u
-114dBm at 10Kbps on-air data rate.
u
-110dBm at 50Kbps on-air data rate.
u
-107dBm at 100Kbps on-air data rate.
u
-106dBm at 150Kbps on-air data rate.
u
-103dBm at 250Kbps on-air data rate.
Fast PLL settling time (35 us).
On-chip full range VCO and Fractional-N PLL synthesizer.
On-chip low power RC oscillator for WOR (Wake on RX) function.
AFC (Auto Frequency Compensation) for frequency drift due to Xtal aging.
Supports low cost crystal (12,8 / 16 MHz).
On chip 9-bit ADC and RSSI (Received Signal Strength Indicator).
Programmable IF filter bandwidth (50K / 100K / 150KHz / 250KHz).
Programmable threshold of carrier detect.
Jan., 2012, Version 0.6
4
AMICCOM Electronics Corporation
A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
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Frame synchronization recognition in FIFO mode.
FEC / Manchester / data whitening / CRC-16 (CRC-CCITT).
4. Pin Configurations
Figure 4.1 QFN4x4 Package Top View
5. RF Chip Block Diagram
Figure 5.1 Block Diagram
Jan., 2012, Version 0.6
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AMICCOM Electronics Corporation
A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
6. Pin Descriptions
Note: I (input), O(output), G(Ground), D(Digital).
Pin No.
Symbol
I/O
1
BP_RSSI
I/O
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
RFI
RFO
GND
VDD_VCO
CP
GND_PLL
VDD_PLL
XO
XI
VDD_D
SCS
SCK
SDIO
GIO1
GIO2
CKO
REGI
BP_BG
VDD_A
I
O
G
I
O
O
I
O
I
O
DI
DI
DI/O
DI/O
DI/O
DO
I
O
O
Back side plate
G
Function Description
I: ADC input.
O: RSSI bypass. Connect to bypass capacitor.
RF input. Connect to matching circuit.
RF output. Connect to matching circuit. (recommend powered by VDD directly).
Ground.
VCO supply voltage input.
Charge-pump output. Connect to loop filter.
PLL ground pin.
PLL supply voltage input driven by pin 11, VDD_D.
Crystal oscillator output. Connect to tank capacitor.
Crystal oscillator input. Connect to tank capacitor.
Digital supply voltage output. Connect to bypass capacitor.
SPI chip select input.
SPI clock input.
SPI data IO.
Multi-function IO 1 / SPI data output.
Multi-function IO 2 / SPI data output.
Multi-function clock output.
Regulator input. Connect to VDD supply.
Band-gap bypass. Connect to bypass capacitor.
Analog supply voltage output. Connect to bypass capacitor.
Ground. Back side plate shall be well-solder to ground; otherwise, it will
impact RF performance.
7. Absolute Maximum Ratings
Parameter
With respect to
Rating
Unit
Supply voltage range (VDD)
GND
-0.3 ~ 3.6
V
Digital IO pins range
GND
-0.3 ~ VDD+0.3
V
Voltage on the analog pins range
GND
-0.3 ~ 2.1
V
10
dBm
-55 ~ 125
°C
HBM*
± 2K
V
MM*
± 100
V
Max. Input RF level
Storage Temperature range
ESD Rating
*Stresses above those listed under “Absolute Maximum Rating” may cause permanent damage to the device. These are stress ratings
only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
*Device is ESD sensitive. Use appropriate ESD precautions. HBM (Human Body Mode) is tested under MIL-STD-883F Method 3015.7.
MM (Machine Mode) is tested under JEDEC EIA/JESD22-A115-A.
*Device is Moisture Sensitivity Level III (MSL 3).
* RFO pin is MM ± 25V and HBM ± 500V
Jan., 2012, Version 0.6
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AMICCOM Electronics Corporation
A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
8. Specification
(Ta=25℃, VDD=3.3V, FXTAL =12.8MHz, FSK modulation with Matching circuit and low/high pass filter, On Chip Regulator = 1.8V, RFO
is powered by VDD = 3.3V, unless otherwise noted.)
Parameter
Description
Min.
Typ.
Max.
Unit
85
°C
V
uA
General
Operating Temperature
Supply Voltage
Current Consumption
Current Consumption
433MHz band
-40
2.0
Deep Sleep Mode
(no register retention) 1
Sleep Mode 1
Idle Mode(Xtal off)
Standby Mode(Xtal on)
3.6
PLL mode
2
0.25
1.5
8.5
uA
mA
mA
mA
RX mode (AGC Off)
13.5
mA
RX mode (AGC On)
14.5
mA
TX -12dBm (TBG=0, TDC=0, PAC=0)
16
mA
TX 1dBm (TBG=1, TDC=0, PAC=0)
20
mA
TX 5dBm (TBG=2, TDC=0, PAC=0)
22
mA
TX 10dBm
30
mA
39
48
55
70
78
70
mA
mA
mA
mA
mA
mA
PLL mode
8.5
mA
RX mode (AGC Off)
14
mA
RX mode (AGC On)
15.5
mA
16
mA
20
mA
(TBG=3, TDC=0, PAC=0)
TX 13dBm (TBG=4, TDC=0, PAC=0)
TX 15dBm (TBG=5, TDC=0, PAC=0)
TX 16dBm (TBG=6, TDC=0, PAC=0)
TX 17dBm (TBG=7, TDC=2, PAC=1)
TX 17.5dBm (TBG=7, TDC=3, PAC=3)
Current Consumption
315MHz band
Current Consumption
868MHz band
3.3
0.2
TX 20dBm
(TBG=7, TDC=2, PAC=1)
Without LPF and HPF.
TX -16dBm
TX -2dBm
(TBG=0, TDC=0, PAC=0)
(TBG=3, TDC=0, PAC=0)
TX 2dBm
(TBG=4, TDC=0, PAC=0)
23
mA
TX 6dBm
(TBG=5, TDC=0, PAC=0)
29
mA
mA
TX 10dBm
(TBG=6, TDC=0, PAC=0)
37
TX 12dBm
(TBG=7, TDC=0, PAC=0)
45
mA
TX 13dBm
(TBG=6, TDC=1, PAC=0)
52
mA
TX 15dBm
TX 16dBm
TX 17dBm
TX 18dBm
(TBG=7, TDC=1, PAC=0)
60
70
75
93
mA
mA
mA
mA
0.5
12.8/16
16
12.582912
19.6608
ms
MHz
MHz
MHz
MHz
(TBG=7, TDC=2, PAC=0)
(TBG=7, TDC=3, PAC=0)
(TBG=7, TDC=2, PAC=3)
Phase Locked Loop
X’TAL Settling Time 2
X’TAL frequency
Jan., 2012, Version 0.6
Idle to standby, 49US type
General case
Data rate = 250Kbps
Data rate = 32.768K or 16.384Kbps
Data rate = 38.4Kbps
7
AMICCOM Electronics Corporation
A7108
315/433/510/868/915MHz FSK/GFSK Transceiver
X’TAL ESR
X’TAL Capacitor Load (Cload)
433MHz PLL Phase noise
(loop component:
R1=820,C1=33nF,C2=2.2nF)
868MHz PLL Phase noise
(loop component:
R1=560,C1=47nF,C2=3.3nF)
PLL Settling Time @settle to 25kHz
Reference spur
Recommended
PN @100k offset
PN @1M offset
PN @10M offset
PN @100k offset
PN @1M offset
PN @10M offset
Standby to PLL
100
Ohm
pF
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
us
dBc
20
20
dB
dB
-36
-54
ms
dBm
dBm
-30
-30
-30
dBm
dBm
dBm
20
90
110
130
85
105
125
35
80
Transmitter
TX Power Range
TX Settling Time
TX Spurious Emission
1. Pout = 12 dBm
2. With LPF and HPF
433MHz (excluding LPF and HPF)
868MHz (excluding LPF and HPF)
PLL to TX
f < 1GHz (RBW =100kHz)
47MHz< f