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FR9889SPCTR

FR9889SPCTR

  • 厂商:

    FITIPOWER(天鈺科技)

  • 封装:

    HSOP8

  • 描述:

    FR9889SPCTR

  • 数据手册
  • 价格&库存
FR9889SPCTR 数据手册
FR9889 23V, 3A, 340KHz Synchronous Step-Down DC/DC Converter Description The FR9889 is a synchronous step-down DC/DC converter that provides wide 4.5V to 23V input voltage range and 3A continuous load current capability. At light load condition, the FR9889 can operate at power saving mode to support high efficiency and reduce power lose. The FR9889 fault protection includes cycle-by-cycle current limit, UVLO, output overvoltage protection and thermal shutdown. The soft-start function prevents inrush current at turn-on. This device uses current mode control scheme which provides fast transient response. Internal compensation function reduces external compensation components and simplifies the design process. In shutdown mode, the supply current is about 1µA. Features Low RDS(ON) Integrated Power MOSFET (120mΩ /100mΩ) Internal Compensation Function Internal Power Good Function Wide Input Voltage Range: 4.5V to 23V Adjustable Output Voltage Down to 0.925V 3A Output Current 340kHz Switching Frequency External Programmable Soft-Start or Internal 600µs Soft-Start Cycle-by-Cycle Current Limit Over-Temperature Protection with Auto Recovery OVP, UVLO Hiccup Short Circuit Protection SOP-8 Exposed Pad Package The FR9889 is available in a SOP-8 exposed pad package, which provides good thermal conductance. Applications Pin Assignments Ordering Information SP Package (SOP-8 Exposed Pad) FR9889□□□ STB (Set-Top-Box) LCD Display, TV Distributed Power System Networking, XDSL Modem TR: Tape/Reel C: Green Package Type SP: SOP-8 (Exposed Pad) Figure 1. Pin Assignment of FR9889 FR9889-1.1-MAY-2016 1 FR9889 Typical Application Circuit Figure 2. CIN /COUT use Ceramic Capacitors Application Circuit Figure 3. CIN/COUT use Electrolytic Capacitors Application Circuit VIN=12V, the recommended BOM list is as below. VOUT 1.2V 1.8V 2.5V 3.3V 5V 1.2V 1.8V 2.5V 3.3V 5V R1 3kΩ 9.53kΩ 16.9kΩ 26.1kΩ 44.2kΩ 3kΩ 9.53kΩ 16.9kΩ 26.1kΩ 44.2kΩ R2 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ C6 10pF~10nF 10pF~10nF 10pF~10nF 10pF~10nF 10pF~10nF ------ L1 4.7µH 4.7µH 6.8µH 10µH 10µH 4.7µH 4.7µH 6.8µH 10µH 10µH C2 22µF MLCC x2 22µF MLCC x2 22µF MLCC x2 22µF MLCC x2 22µF MLCC x2 100µF EC x1 100µF EC x1 100µF EC x1 100µF EC x1 100µF EC x1 Table 1. Recommended Component Values FR9889-1.1-MAY-2016 2 FR9889 Functional Pin Description Pin Name Pin No. Pin Function BST 1 High Side Gate Drive Boost Pin. A capacitor rating between 10nF~100nF must be connected from this pin to LX. It can boost the gate drive to fully turn on the internal high side NMOS. VIN 2 Power Supply Input Pin. Placed input capacitors as close as possible from VIN to GND to avoid noise influence. LX 3 Power Switching Node. Connect an external inductor to this switching node. GND 4 Ground Pin. Connect GND to exposed pad. FB 5 Voltage Feedback Input Pin. Connect FB and VOUT with a resistive voltage divider. This IC senses feedback voltage via FB and regulates it at 0.925V. PG 6 Open Drain Power Good Output Pin. SHDN 7 Enable Input Pin. Pull high to turn on IC, and pull low to turn off IC. Connect VIN with a 100kΩ resistor for self-startup. SS 8 Soft-start Pin. This pin controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. If disconnect capacitor from SS to GND, the internal soft-start time will be 600µs. Exposed Pad 9 Ground Pin. The exposed pad must be soldered to a large PCB area and connected to GND for maximum power dissipation. Block Diagram Figure 4. Block Diagram of FR9889 FR9889-1.1-MAY-2016 3 FR9889 Absolute Maximum Ratings (Note 1) ● Supply Voltage VIN ----------------------------------------------------------------------------------------- -0.3V to +25V ● Enable Voltage VSHDN ----------------------------------------------------------------------------------- -0.3V to +25V ● LX Voltage VLX ---------------------------------------------------------------------------------------------- -1V to VIN+0.3V ● BST Pin Voltage VBST ------------------------------------------------------------------------------------- VLX-0.3V to VLX+6.5V ● All Other Pins Voltage ------------------------------------------------------------------------------------ -0.3V to +6V ● Maximum Junction Temperature (TJ) ----------------------------------------------------------------- +150°C ● Storage Temperature (TS) ------------------------------------------------------------------------------- -65°C to +150°C ● Lead Temperature (Soldering, 10sec.) --------------------------------------------------------------- +260°C ● Power Dissipation @TA=25°C, (PD) (Note 2) SOP-8 (Exposed Pad) ------------------------------------------------------------------------ 2.08W ● Package Thermal Resistance, (θJA) SOP-8 (Exposed Pad) ------------------------------------------------------------------------ 60°C/W ● Package Thermal Resistance, (θJC) SOP-8 (Exposed Pad) ------------------------------------------------------------------------ 15°C/W Note 1:Stresses beyond this listed under “Absolute Maximum Ratings" may cause permanent damage to the device. 2 Note 2:PCB heat sink copper area = 10mm . Recommended Operating Conditions ● Supply Voltage VIN ----------------------------------------------------------------------------------------- +4.5V to +23V ● Operation Temperature Range ------------------------------------------------------------------------- -40°C to +85°C FR9889-1.1-MAY-2016 4 FR9889 Electrical Characteristics (VIN=12V, TA=25°C, unless otherwise specified.) Parameter Symbol Conditions Min Typ Max Unit 0.8 1 mA 1 10 µA 0.925 0.944 V VIN Quiescent Current IDDQ VSHDN =2V, VFB=1.0V VIN Shutdown Supply Current ISD VSHDN =0V Feedback Voltage VFB 4.5V≦ VIN≦ 23V Feedback OVP Threshold Voltage VOVP 1.25 V RDS(ON) 120 mΩ RDS(ON) 100 mΩ High-Side MOSFET RDS(ON) Low-Side MOSFET RDS(ON) (Note 3) (Note 3) High-Side MOSFET Leakage Current High-Side MOSFET Current Limit (Note 3) Oscillation Frequency VSHDN =0V, VLX=0V ILIMIT(HS) Minimum Duty FOSC Short Circuit Oscillation Frequency Maximum Duty Cycle Minimum On Time ILX(leak) FOSC(short) DMAX (Note 3) 0.906 10 4 4.7 280 340 VUVLO(Vth) Input Supply Voltage UVLO Threshold Hysteresis VUVLO(HYS) Soft-Start Current ISS Internal Soft-Start Period TSS A 400 kHz VFB=0V 110 kHz VFB=0.8V 88 % 110 ns 4.2 V 400 mV 6 µA 600 µs TMIN Input Supply Voltage UVLO Threshold µA VIN Rising VSS=0V PG High Threshold VPG (H) VFB Rising 92 % PG Low Threshold VPG (L) VFB Falling 82 % IPG VPG=0.3V 1 mA PG Sink Current SHDN Input Low Voltage VSHDN(L) SHDN Input High Voltage VSHDN(H) ISHDN SHDN Input Current Thermal Shutdown Threshold (Note 3) TSD 0.4 2 VSHDN =2V V V 2 µA 165 °C Note 3:Not production tested. FR9889-1.1-MAY-2016 5 FR9889 Typical Performance Curves (Continued) VIN=12V, VOUT=3.3V, C1=10µF×2, C2=22µF×2, L1=10µH, TA=+25°C, unless otherwise noted. IOUT=0A IOUT=3A VIN 20mV/div. VOUT 20mV/div. VIN 100mV/div. IL 1A/div. VOUT 20mV/div. VLX 5V/div. IL 1A/div. VLX 5V/div. 4ms/div. 4µs/div. Figure 5. Steady State Waveform Figure 6. Steady State Waveform IOUT=0A VIN 5V/div. VOUT IL IOUT=3A VIN 1V/div. VOUT 5V/div. 1V/div. 1A/div. IL VLX 5V/div. 1A/div. VLX 5V/div. 4ms/div. 4ms/div. Figure 7. Power On through VIN Waveform Figure 8. Power On through VIN Waveform IOUT=3A IOUT=0A VIN 10V/div. VOUT IL 1V/div. VIN 10V/div. VOUT 1V/div. 1A/div. IL VLX 5V/div. VLX 1A/div. 5V/div. 100ms/div. 100ms/div. Figure 9. Power Off through VIN Waveform Figure 10. Power Off through VIN Waveform FR9889-1.1-MAY-2016 6 FR9889 Typical Performance Curves (Continued) VIN=12V, VOUT=3.3V, C1=10µF×2, C2=22µF×2, L1=10µH, TA=+25°C, unless otherwise noted. IOUT=0A VSHDN 5V/div. VOUT IL IOUT=3A VSHDN VOUT 1V/div. IL 1A/div. VLX 1V/div. 1A/div. VLX 5V/div. 5V/div. 4ms/div. 5V/div. 4ms/div. Figure 11. Power On through SHDN Waveform IOUT=0A Figure 12. Power On through SHDN Waveform IOUT=3A VSHDN VOUT IL VLX VSHDN 5V/div. 1V/div. VOUT IL 1A/div. 4ms/div. Figure 13. Power Off through SHDN Waveform 1V/div. 1A/div. VLX 5V/div. 5V/div. 5V/div. 80µs/div. Figure 14. Power Off through SHDN Waveform IOUT=0.1A to 3A VOUT 200mV/div. IL 1A/div. VOUT IL 1V/div. 2A/div. 400us/div. 10ms/div. Figure 15. Load Transient Waveform Figure 16. Short Circuit Test FR9889-1.1-MAY-2016 7 FR9889 Typical Performance Curves VIN=12V, VOUT=3.3V, C1=10µF×2, C2=22µF×2, L1=10µH, TA=+25°C, unless otherwise noted. 90 90 80 80 70 70 Efficiency(%) 100 Efficiency(%) 100 60 50 40 30 20 0.1 1 40 30 5V to 3.3V 12V to 3.3V 19V to 3.3V 10 12V to 1.2V 0 0.01 50 20 5V to 1.2V 10 60 0 0.01 10 0.1 Figure 17. Efficiency vs. Load Current 10 Figure 18. Efficiency vs. Load Current 100 0.95 90 0.945 Feedback Voltage (V) 80 Efficiency(%) 1 Load Current(A) Load Current(A) 70 60 50 40 30 20 12V to 5V 10 IOUT=400mA 0.94 0.935 0.93 0.925 0.92 0.915 0.91 0.905 19V to 5V 0.9 0 0.01 0.1 1 10 Load Current(A) Figure 19. Efficiency vs. Load Current -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Ambient Temperature (℃) Figure 20. Feedback Voltage vs. Temperature 400 Switching Frequency (kHz) IOUT=400mA 380 360 340 320 300 280 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Ambient Temperature (℃) Figure 21. Switching Frequency vs. Temperature FR9889-1.1-MAY-2016 8 FR9889 Function Description The FR9889 is a high efficiency, internal compensation and constant frequency current mode step-down synchronous DC/DC converter. It has integrated high-side (120mΩ, typ) and low-side (100mΩ, typ) power switches, and provides 3A continuous load current. It regulates input voltage from 4.5V to 23V, and down to an output voltage as low as 0.925V. Input Under Voltage Lockout When the FR9889 is power on, the internal circuits will be held inactive until VIN voltage exceeds the input UVLO threshold voltage. And the regulator will be disabled when VIN is below the input UVLO threshold voltage. The hysteretic of the UVLO comparator is 400mV (typ). Over Current Protection Control Loop Under normal operation, the output voltage is sensed by FB pin through a resistive voltage divider and amplified through the error amplifier. The voltage of error amplifier output is compared to the switch current to control the RS latch. At the beginning of each clock cycle, the high-side NMOS will turn on when the oscillator sets the RS latch, and turn off when current comparator resets the RS latch. Then the low-side NMOS will turn on until the clock period ends. The FR9889 over current protection function is implemented by using cycle-by-cycle current limit architecture. The inductor current is monitored by measuring the high-side MOSFET series sense resistor voltage. When the load current increases, the inductor current will also increase. When the peak inductor current reaches the current limit threshold, the output voltage will start to drop. When the over current condition is removed, the output voltage will return to the regulated value. Short Circuit Protection Enable The FR9889 SHDN pin provides digital control to turn on/turn off the regulator. When the voltage of SHDN exceeds the threshold voltage, the regulator will start the soft start function. If the SHDN pin voltage is below the shutdown threshold voltage, the regulator will turn into the shutdown mode and the shutdown current will be smaller than 1µA. For auto start-up operation, connect SHDN to VIN through a 100kΩ resistor. Soft Start The FR9889 employs internal and programmable external soft start functions to reduce input inrush current during start up. When SS pin doesn’t connect to CSS capacitor, the internal soft start time will be 600µs. When SS pin connects to CSS capacitor, the CSS capacitor will be charged by a 6µA current. The equation for the soft start time is shown as below: TSS ms = CSS nF ×VFB ISS µA The VFB voltage is 0.925V and the ISS current is 6µA. If a 0.1µF capacitor is connected from SS pin to GND, the soft start time will be 15ms. Output Over Voltage Protection When the FB pin voltage exceeds 1.25V, the output over voltage protection function will be triggered and turn off the high-side/low-side MOSFET. FR9889-1.1-MAY-2016 The FR9889 provides short circuit protection function to prevent the device damage from short condition. When the short condition occurs and the feedback voltage drops lower than 0.4V, the oscillator frequency will be reduced to 110kHz and hiccup mode will be triggered to prevent the inductor current increasing beyond the current limit. Once the short condition is removed, the frequency will return to normal. Over Temperature Protection The FR9889 incorporates an over temperature protection circuit to protect itself from overheating. When the junction temperature exceeds the thermal shutdown threshold temperature, the regulator will be shutdown. And the hysteretic of the over temperature protection is 50°C (typ). Internal Compensation Function The stability of the feedback circuit is controlled through internal compensation circuits. This internal compensation function is optimized for most applications, and this function can reduce external R, C components. PG Signal Output PG pin is an open-drain output and requires a pull up resistor. When the sensed output voltage is below 82% of nominal point, PG is actively held low in soft-start, standby and shutdown. It is released when the output voltage rises above 92% of nominal regulation point. 9 FR9889 Application Information Output Voltage Setting The output voltage VOUT is set by using a resistive divider from the output to FB. The FB pin regulated voltage is 0.925V. Thus the output voltage is: VOUT =0.925V× 1+ 1 R1 R2 2 Output Capacitor Selection Table 2 lists recommended values of R1 and R2 for most used output voltage. Table 2 A low ESR capacitor is required to keep the noise minimum. Ceramic capacitors are better, but tantalum or low ESR electrolytic capacitors may also suffice. When using tantalum or electrolytic capacitors, a 0.1µF µF ceramic capacitor should be placed as close e to the IC as possible. Recommended Resistance Values VOUT R1 R2 5V 44.2kΩ 10kΩ 3.3V 26.1kΩ 10kΩ 2.5V 16.9kΩ 10kΩ 1.8V 9.53kΩ 10kΩ 1.2V 3kΩ 10kΩ The output capacitor is used to keep the DC output voltage and supply the load transient current. When operating in constant current mode, the output ripple is determined by four components: VRIPPLE t =VRIPPLE(C) t +VRIPPLE(ESR) (t) RIPPLE +VRIPPLE(ESL) (t)+V VNOISE (t) The following figures show the form of the ripple contributions. VRIPPLE(ESR)(t) Place resistors R1 and R2 close to FB pin to prevent stray pickup. Input Capacitor Selection The use of the input capacitor is filtering the input voltage ripple and the MOSFETS switching spike voltage. Because the input current to the step-down down converter is discontinuous, the input capacitor is required uired to supply the current to the converter to keep the DC input voltage. The capacitor voltage rating should be 1.25 to 1.5 times greater than the maximum input voltage. The input capacitor ripple current RMS value is calculated as: + VRIPPLE(ESL) (t) (t) + VRIPPLE(C) (t) (t) + VNOISE (t) (t) ICIN(RMS) =IOUT × D× 1-D D D= VOUT VIN Where D is the duty cycle of the power MOSFET. This function reaches the maximum value at D=0.5, D=0.5 and the equivalent RMS current is equal to IOUT/2. The following diagram is the graphical representation of above equation. 1.75 3A ICIN(RMS) (A) 1.5 1.25 = VRIPPLE(t) 2A 1 0.75 1A 0.5 (t) 0.25 0 10 20 30 40 50 60 70 80 90 D (%) FR9889-1.1-MAY-2016 10 FR9889 Application Information (Continued) VRIPPLE(ESR, p-p) = VOUT VOUT × 1×ESR FOSC ×L VIN VRIPPLE(ESL, p-p) = ESL ×V L+ESL IN ∆IL= VOUT VOUT × 18×FOSC2 ×L×COUT VIN Where FOSC is the switching frequency, L is the inductance value, VIN is the input voltage, ESR is the equivalent series resistance value of the output capacitor, ESL is the equivalent series inductance value of the output capacitor and the COUT is the output capacitor. Low ESR capacitors are preferred to use. Ceramic, tantalum or low ESR electrolytic capacitors can be used depending on the output ripple requirements. When using the ceramic capacitors, the ESL component is usually negligible. It is important to use the proper method to eliminate high frequency noise when measuring the output ripple. The figure shows how to locate the probe across the capacitor when measuring output ripple. Remove the scope probe plastic jacket in order to expose the ground at the tip of the probe. It gives a very short connection from the probe ground to the capacitor and eliminating noise. Probe Ground VOUT VOUT × 1FOSC ×L VIN The following diagram is an example to graphical represent ∆IL equation. 2 L=4.7µH 1.8 1.6 ∆IL (A) VRIPPLE(C, p-p) = That will lower ripple current and result in lower output ripple voltage. The ∆IL is inductor peak-to-peak ripple current: 1.4 L=6.8µH 1.2 1 L=10µH 0.8 0.6 0.4 0.2 5 8 11 14 17 20 23 VIN (V) VOUT=3.3V, FOSC=340kHz A good compromise value between size and efficiency is to set the peak-to-peak inductor ripple current ∆IL equal to 30% of the maximum load current. But setting the peak-to-peak inductor ripple current ∆IL between 20%~50% of the maximum load current is also acceptable. Then the inductance can be calculated with the following equation: ∆IL=0.3×IOUT(MAX) L= VOUT GND Ceramic Capacitor VIN -VOUT ×VOUT VIN ×FOSC ×∆IL To guarantee sufficient output current, peak inductor current must be lower than the FR9889 high-side MOSFET current limit. The peak inductor current is as below: IPEAK =IOUT(MAX) + ∆IL 2 Inductor Selection The output inductor is used for storing energy and filtering output ripple current. But the trade-off condition often happens between maximum energy storage and the physical size of the inductor. The first consideration for selecting the output inductor is to make sure that the inductance is large enough to keep the converter in the continuous current mode. FR9889-1.1-MAY-2016 11 FR9889 Application Information (Continued) Feedforward Capacitor Selection PCB Layout Recommendation Internal compensation function allows users saving time in design and saving cost by reducing the number of external components. The use of a feedforward capacitor C6 in the feedback network is recommended to improve the transient response or higher phase margin. The device’s performance and stability are dramatically affected by PCB layout. It is recommended to follow these general guidelines shown as below: 1. Place the input capacitors and output capacitors as close to the device as possible. The traces which connect to these capacitors should be as short and wide as possible to minimize parasitic inductance and resistance. 2. Place feedback resistors close to the FB pin. 3. Keep the sensitive signal (FB) away from the switching signal (LX). For optimizing the feedforward capacitor, knowing the cross frequency is the first thing. The cross frequency (or the converter bandwidth) can be determined by using a network analyzer. When getting the cross frequency with no feedforward capacitor identified, the value of feedforward capacitor C6 can be calculated with the following equation: C6= 4. The exposed pad of the package should be soldered to an equivalent area of metal on the PCB. This area should connect to the GND plane and have multiple via connections to the back of the PCB as well as connections to intermediate PCB layers. The GND plane area connecting to the exposed pad should be maximized to improve thermal performance. 5. Multi-layer PCB design is recommended. 1 1 1 1 × × + 2π×FCROSS R1 R1 R2 Where FCROSS is the cross frequency. To reduce transient ripple, the feedforward capacitor value can be increased to push the cross frequency to higher region. Although this can improve transient response, it also decreases phase margin and causes more ringing. In the other hand, if more phase margin is desired, the feedforward capacitor value can be decreased to push the cross frequency to lower region. In general, the feedforward capacitor range is between 10pF to 10nF. Figure 22. Recommended PCB Layout Diagram External Diode Selection For 5V input applications, it is recommended to add an external boost diode. This helps improving the efficiency. The boost diode can be a low cost one, such as 1N4148. FR9889-1.1-MAY-2016 12 FR9889 Outline Information SOP-8 (Exposed Pad) Package (Unit: mm) SYMBOLS UNIT DIMENSION IN MILLIMETER MIN MAX A 1.25 1.70 A1 0.00 0.15 A2 1.25 1.55 B 0.31 0.51 D 4.80 5.00 D1 3.04 3.50 E 3.80 4.00 E1 2.15 2.41 e 1.20 1.34 H 5.80 6.20 L 0.40 1.27 Note:Followed From JEDEC MO-012-E. Carrier Dimensions Life Support Policy Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems. FR9889-1.1-MAY-2016 13
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